FAIRCHILD 74LCXZ2245_05

Revised March 2005
74LCXZ2245
Low Voltage Bidirectional Transceiver
with 5V Tolerant Inputs and Outputs
and 26: Series Resistors in B Outputs
General Description
Features
The LCXZ2245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage
(2.7V and 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The T/R input determines
the direction of data flow through the device. The OE input
disables both the A and B ports by placing them in a high
impedance state. The 26: series resistor in the B Port output helps reduce output overshoot and undershoot.
■ 5V tolerant inputs and outputs
The LCXZ2245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintaining CMOS low power dissipation.
When VCC is between 0 and 1.5V, the LCXZ2245 is on the
high impedance state during power up or power down. This
places the outputs in the high impedance (Z) state preventing intermittent low impedance loading or glitching in bus
oriented applications.
■ Latch-up performance exceeds 500 mA
■ 2.7V–3.6V VCC specifications provided
■ 7.0 ns tPD max (VCC
3.3V), 10 PA ICC max
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal (Note 1)
■ r12 mA output drive on the B Port (VCC
3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Equivalent 26: series resistor on all B Port outputs
■ ESD performance:
Human body model ! 2000V
Machine model ! 200V
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
Package Number
74LCXZ2245WM
74LCXZ2245SJ
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
M20D
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCXZ2245MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LCXZ2245MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
Description
OE
Output Enable Input
T/R
Transmit/Receive Input
A0–A7
Side A Inputs or 3-STATE Outputs
B0–B7
Side B Inputs or 3-STATE Outputs
© 2005 Fairchild Semiconductor Corporation
DS500410
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74LCXZ2245 Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs and 26: Series
Resistors in B Outputs
October 2000
74LCXZ2245
Truth Table
Inputs
Outputs
OE
T/R
L
L
Bus B0 – B7 Data to Bus A0 – A7
L
H
Bus A0 – A7 Data to Bus B0 – B7
H
X
HIGH Z State on A0 – A7, B0 – B7 (Note 2)
H HIGH Voltage Level
L LOW Voltage Level
X Immaterial
Z High Impedance
Note 2: Unused bus terminals during HIGH Z State must be held HIGH or LOW.
Logic Diagram
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2
Symbol
Parameter
VCC
Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
Value
IO
DC Output Source/Sink Current
ICC
DC Supply Current per Supply Pin
IGND
DC Ground Current per Ground Pin
TSTG
Storage Temperature
Conditions
0.5 to 7.0
0.5 to 7.0
0.5 to 7.0
0.5 to VCC 0.5
50
50
50
r50
r100
r100
65 to 150
Units
V
V
Output in 3-STATE
Output in HIGH or LOW State (Note 4)
VI GND
V
mA
VO GND
mA
VO ! VCC
mA
mA
mA
qC
Recommended Operating Conditions (Note 5)
Symbol
Parameter
VCC
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOH/IOL
Min
Max
2.7
3.6
V
0
5.5
V
HIGH or LOW State
0
VCC
3-STATE
0
5.5
Operating
Output Current in IOH/IOL - A Outputs
Output Current in IOH/IOL - B Outputs
TA
Free-Air Operating Temperature
't/'V
Input Edge Rate, VIN
0.8V 2.0V, VCC
VCC
3.0V 3.6V
VCC
2.7V 3.0V
VCC
3.0V 3.6V
VCC
2.7V 3.0V
r24
r12
r12
r8
Units
V
mA
mA
40
85
qC
0
10
ns/V
3.0V
Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 4: IO Absolute Maximum Rating must be observed.
Note 5: Unused inputs or I/O pins must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
Conditions
VCC
TA
(V)
Min
2.0
VIH
HIGH Level Input Voltage
2.7 - 3.6
VIL
LOW Level Input Voltage
2.7 - 3.6
VOH
40qC to 85qC
HIGH Level Output Voltage
IOH
100 PA
2.7 - 3.6
VCC 0.2
IOH
4 mA
2.7
2.2
IOH
6 mA
3.0
2.4
IOH
8 mA
2.7
2.0
IOH
12 mA
3.0
2.0
IOH
100 PA
2.7 - 3.6
VCC 0.2
A Outputs
IOH
12 mA
2.7
2.2
IOH
18 mA
3.0
2.4
IOH
24 mA
3.0
2.2
3
Units
V
0.8
B Outputs
HIGH Level Output Voltage
Max
V
V
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74LCXZ2245
Absolute Maximum Ratings(Note 3)
74LCXZ2245
DC Electrical Characteristics
Symbol
VOL
Parameter
(Continued)
Conditions
Min
40qC to 85qC
IOL
100 PA
IOL
4 mA
2.7
0.4
IOL
6 mA
3.0
0.55
IOL
8 mA
2.7
0.6
IOL
12 mA
3.0
0.8
IOL
100 PA
2.7 - 3.6
0.2
0.4
2.7 - 3.6
0.2
V
IOL
12 mA
2.7
IOL
16 mA
3.0
0.4
IOL
24 mA
3.0
0.55
2.7 - 3.6
r5.0
PA
2.7 - 3.6
r5.0
PA
0
10
PA
0 - 1.5
r5.0
PA
II
Input Leakage Current
0 d VI d 5.5V
IOZ
3-STATE I/O Leakage
0 d VO d 5.5V
IOFF
Power-Off Leakage Current
VI or VO
IPU/PD
Power Up/Down
VO
0.5V to VCC
3-STATE Output Current
VI
VCC or GND
Quiescent Supply Current
VI
VCC or GND
VI
VIH or VIL
5.5V
3.6V d VI, VO d 5.5V (Note 6)
Increase in ICC per Input
Units
Max
LOW Level Output Voltage
A Outputs
'ICC
TA
(V)
B Outputs
LOW Level Output Voltage
ICC
VCC
VIH
VCC 0.6V
2.7 - 3.6
225
2.7 - 3.6
r225
2.7 - 3.6
500
PA
PA
Note 6: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
TA
Symbol
VCC
Parameter
tPHL
Propagation Delay
tPLH
A to B
tPHL
Propagation Delay
tPLH
B to A
tPZL
Output Enable Time
tPZH
A to B
tPZL
Output Enable Time
tPZH
B to A
tPLZ
Output Disable Time
tPHZ
A to B
tPLZ
Output Disable Time
tPHZ
B to A
tOSHL
Output to Output Skew
tOSLH
(Note 7)
CL
40qC to 85qC, RL
3.3V r 0.3V
50 pF
500:
VCC
2.7V
CL
50 pF
Units
Min
Max
Min
Max
1.5
8.0
1.5
9.0
1.5
7.0
1.5
8.0
1.5
9.5
1.5
10.5
ns
1.5
8.5
1.5
9.5
ns
1.5
7.5
1.5
8.5
ns
1.5
7.5
1.5
8.5
ns
1.0
ns
ns
Note 7: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
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4
Symbol
VOLP
Parameter
Quiet Output Dynamic Peak VOL
B to A
Quiet Output Dynamic Peak VOL
A to B
VOLV
Quiet Output Dynamic Valley VOL
B to A
Quiet Output Dynamic Valley VOL
A to B
VCC
(V)
Conditions
25qC
TA
Typical
CL
50 pF, VIH
3.3V, VIL
0V
3.3
0.8
CL
50 pF, VIH
3.3V, VIL
0V
3.3
0.5
CL
50 pF, VIH
3.3V, VIL
0V
2.5
0.8
CL
50 pF, VIH
3.3V, VIL
0V
3.3
0.5
Units
V
V
Capacitance
Symbol
Parameter
Conditions
CIN
Input Capacitance
VCC
Open, VI
CI/O
Input/Output Capacitance
VCC
3.3V, VI
0V or VCC
CPD
Power Dissipation Capacitance
VCC
3.3V, VI
0V or VCC, f
5
0V or VCC
10 MHz
Typical
Units
7
pF
8
pF
25
pF
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74LCXZ2245
Dynamic Switching Characteristics
74LCXZ2245
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
CL
VI
6V for VCC
3.3V, 2.7V
50 pF
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
trise and tfall
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tR = tF = 3ns)
VCC
Symbol
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3.3V r 0.3V
2.7V
Vmi
1.5V
1.5V
Vmo
1.5V
1.5V
Vx
VOL 0.3V
VOL 0.3V
Vy
VOH 0.3V
VOH 0.3V
6
74LCXZ2245
Schematic Diagram Generic for LCX Family
7
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74LCXZ2245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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8
74LCXZ2245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
9
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74LCXZ2245
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
Package Number MSA20
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10
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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11
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74LCXZ2245 Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs and 26: Series
Resistors in B Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)