VISHAY SIHFZ44S

IRFZ44S, IRFZ44L, SiHFZ44S, SiHFZ44L
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Halogen-free According to IEC 61249-2-21
Definition
• Advanced Process Technology
• Surface Mount (IRFZ44S, SiHFZ44S)
• Low-Profile Through-Hole (IRFZ44L, SiHFZ44L)
• 175 °C Operating Temperature
• Fast Switching
• Compliant to RoHS Directive 2002/95/EC
60
RDS(on) ()
VGS = 10 V
Qg (Max.) (nC)
0.028
67
Qgs (nC)
18
Qgd (nC)
25
Configuration
Single
DESCRIPTION
Third generation Power MOSFETs from Vishay utilize
advanced processing techniques to achieve extermely low
on resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
power MOSFETs are well known for, provides the designer
with an extermely efficient reliabel deviece for use in a wide
variety of applications.
The D2PAK is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and lowest possible on-resistance
in any existing surface mount package. The D2PAK is
suitable for high current applications because of its low
internal connection resistance and can dissipate up to 2.0 W
in a typical surface mount application.
The through-hole version (IRFZ44L, SiHFZ44L) is available
for low profile applications.
D
D2PAK (TO-263)
I2PAK (TO-262)
G
G
D
S
G
D
S
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
D2PAK (TO-263)
SiHFZ44S-GE3
IRFZ44SPbF
SiHFZ44S-E3
D2PAK (TO-263)
SiHFZ44STRR-GE3a
IRFZ44STRRPbFa
SiHFZ44STR-E3a
D2PAK (TO-263)
SiHFZ44STRL-GE3a
IRFZ44STRLPbFa
SiHFZ44STL-E3a
I2PAK (TO-262)
IRFZ44LPbF
SiHFZ44L-E3
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltagef
Gate-Source Voltagef
Continuous Drain Currente
Continuous Drain Current
Pulsed Drain Currenta, e
Linear Derating Factor
Single Pulse Avalanche Energyb
Maximum Power Dissipation
Peak Diode Recovery dV/dtc, f
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperatured)
SYMBOL
VDS
VGS
VGS at 10 V
TC = 25 °C
TC = 100 °C
ID
IDM
EAS
TA = 25 °C
TC = 25 °C
PD
dV/dt
TJ, Tstg
for 10 s
LIMIT
60
± 20
50
36
200
1.0
100
3.7
150
4.5
- 55 to + 175
300
UNIT
V
A
W/°C
mJ
W
V/ns
°C
Notes
a.
b.
c.
d.
e.
Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
VDD = 25 V; starting TJ = 25 °C, L = 44 μH, Rg = 25 , IAS = 51 A (see fig. 12).
ISD  51 A, dI/dt  250 A/μs, VDD  VDS, TJ  175 °C.
1.6 mm from case.
Calculated continuous current based on maximum allowable junction temperature.
f. Uses IRFZ44, SiHFZ44 data and test conditions.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91293
S11-1063-Rev. C, 30-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFZ44S, IRFZ44L, SiHFZ44S, SiHFZ44L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
(PCB Mounted, steady-state)a
RthJA
-
40
Maximum Junction-to-Case
RthJC
-
1.0
UNIT
°C/W
Note
a. When mounted on 1” square PCB (FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0, ID = 250 μA
60
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.06
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
2.0
-
4.0
V
nA
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
VGS = ± 20 V
-
-
± 100
VDS = 60 V, VGS = 0 V
-
-
25
VDS = 48 V, VGS = 0 V, TJ = 150 °C
-
-
250
-
-
0.028

15
-
-
S
-
1900
-
-
920
-
-
170
-
-
-
67
-
-
18
-
-
25
IGSS
IDSS
RDS(on)
gfs
ID = 31 Ab
VGS = 10 V
VDS = 25 V, ID = 31
Ab
μA
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Rise Time
Turn-Off Delay Time
tr
td(off)
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5 d
VGS = 10 V
ID = 51 A, VDS = 48 V,
see fig. 6 and 13b
-
14
-
VDD = 30 V, ID = 51 A,
Rg = 9.1 , RD = 0,55 ,
see fig. 10b
-
110
-
-
45
-
Fall Time
tf
-
92
-
Internal Source Inductance
LS
Between lead, and center of die contact
-
7.5
-
IS
MOSFET symbol
showing the
integral reverse
p - n junction diode
-
-
50d
-
-
200
pF
nC
ns
nH
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
Body Diode Voltage
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
D
A
G
TJ = 25 °C, IS = 51 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 51 A, dI/dt = 100 A/μsb, d
-
-
2.5
V
-
120
180
ns
-
530
800
nC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.
c. Uses IRFZ44, SiHFZ44 data and test conditions.
d. Calculated continuous current based on maximum allowable junction temperature.
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Document Number: 91293
S11-1063-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFZ44S, IRFZ44L, SiHFZ44S, SiHFZ44L
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91293
S11-1063-Rev. C, 30-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFZ44S, IRFZ44L, SiHFZ44S, SiHFZ44L
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
’
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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Fig. 8 - Maximum Safe Operating Area
Document Number: 91293
S11-1063-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFZ44S, IRFZ44L, SiHFZ44S, SiHFZ44L
Vishay Siliconix
rD
VDS
VGS
D.U.T.
Rg
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
tr
td(off) tf
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91293
S11-1063-Rev. C, 30-May-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFZ44S, IRFZ44L, SiHFZ44S, SiHFZ44L
Vishay Siliconix
VDS
L
Vary tp to obtain
required IAS
VDS
tp
VDD
D.U.T
Rg
+
-
IAS
V DD
VDS
10 V
tp
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
IAS
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91293
S11-1063-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFZ44S, IRFZ44L, SiHFZ44S, SiHFZ44L
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91293.
Document Number: 91293
S11-1063-Rev. C, 30-May-11
www.vishay.com
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
TO-263AB (HIGH VOLTAGE)
A
(Datum A)
3
A
4
4
L1
B
A
E
c2
H
Gauge
plane
4
0° to 8°
5
D
B
Detail A
Seating plane
H
1
2
C
3
C
L
L3
L4
Detail “A”
Rotated 90° CW
scale 8:1
L2
B
A1
B
A
2 x b2
c
2xb
E
0.010 M A M B
± 0.004 M B
2xe
Plating
5
b1, b3
Base
metal
c1
(c)
D1
4
5
(b, b2)
Lead tip
MILLIMETERS
DIM.
MIN.
MAX.
View A - A
INCHES
MIN.
4
E1
Section B - B and C - C
Scale: none
MILLIMETERS
MAX.
DIM.
MIN.
INCHES
MAX.
MIN.
MAX.
A
4.06
4.83
0.160
0.190
D1
6.86
-
0.270
-
A1
0.00
0.25
0.000
0.010
E
9.65
10.67
0.380
0.420
6.22
-
0.245
-
b
0.51
0.99
0.020
0.039
E1
b1
0.51
0.89
0.020
0.035
e
b2
1.14
1.78
0.045
0.070
H
14.61
15.88
0.575
0.625
b3
1.14
1.73
0.045
0.068
L
1.78
2.79
0.070
0.110
2.54 BSC
0.100 BSC
c
0.38
0.74
0.015
0.029
L1
-
1.65
-
0.066
c1
0.38
0.58
0.015
0.023
L2
-
1.78
-
0.070
c2
1.14
1.65
0.045
0.065
L3
D
8.38
9.65
0.330
0.380
L4
0.25 BSC
4.78
5.28
0.010 BSC
0.188
0.208
ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.
Document Number: 91364
Revision: 15-Sep-08
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Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree
to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and
damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay
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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
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Document Number: 91000
Revision: 11-Mar-11
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