PD -97773
IRFR812TRPbF
HEXFET® Power MOSFET
Applications
• Zero Voltage Switching SMPS
• Uninterruptible Power Supplies
• Motor Control applications
VDSS RDS(on) typ. Trr typ.
500V
Parameter
75ns
1.85Ω
3.6A
D
Features and Benefits
• Fast body diode eliminates the need for external
diodes in ZVS applications.
• Lower Gate charge results in simpler drive requirements.
• Higher Gate voltage threshold offers improved noise
immunity.
Absolute Maximum Ratings
S
G
D-Pak
IRFR812TRPbF
Max.
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V
ID
Units
3.6
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
c
2.3
Pulsed Drain Current
14.4
78
W
Linear Derating Factor
Gate-to-Source Voltage
0.63
± 20
W/°C
V
32
-55 to + 150
V/ns
IDM
PD @TC = 25°C Power Dissipation
VGS
e
dv/dt
TJ
Peak Diode Recovery dv/dt
TSTG
Storage Temperature Range
Operating Junction and
°C
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
10lb in (1.1N m)
x
Mounting torque, 6-32 or M3 screw
Diode Characteristics
Symbol
Parameter
A
x
Min. Typ. Max. Units
Continuous Source Current
–––
–––
ISM
(Body Diode)
Pulsed Source Current
–––
––– 14.4
showing the
integral reverse
VSD
(Body Diode)
Diode Forward Voltage
–––
–––
1.2
V
p-n junction diode.
TJ = 25°C, IS = 3.6A, VGS = 0V
trr
Reverse Recovery Time
–––
75
110
ns
TJ = 25°C, IF = 3.6A
Qrr
Reverse Recovery Charge
–––
–––
94
135
140
200
nC
TJ = 125°C, di/dt = 100A/μs
TJ = 25°C, IS = 3.6A, VGS = 0V
f
IRRM
Reverse Recovery Current
–––
–––
220
3.2
330
4.8
A
TJ = 125°C, di/dt = 100A/μs
TJ = 25°C, IS = 3.6A, VGS = 0V
f
c
3.6
Conditions
IS
MOSFET symbol
A
D
G
f
f
S
f
di/dt = 100A/μs
ton
Forward Turn-On Time
Notes through are on page 2
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Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
1
4/10/12
IRFR812TRPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
V(BR)DSS
ΔV(BR)DSS/ΔTJ
RDS(on)
VGS(th)
IDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
500
–––
–––
3.0
–––
–––
–––
–––
–––
0.37
1.85
–––
–––
–––
–––
–––
–––
–––
2.2
5.0
25
2.0
100
-100
Conditions
V VGS = 0V, ID = 250μA
V/°C Reference to 25°C, ID = 250μA
Ω VGS = 10V, ID = 2.2A
V VDS = VGS, ID = 250μA
μA VDS = 500V, VGS = 0V
mA VDS = 400V, VGS = 0V, TJ = 125°C
nA VGS = 20V
VGS = -20V
f
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Coss eff. (ER)
Parameter
Min. Typ. Max. Units
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Effective Output Capacitance
7.6
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
14
22
24
17
810
47
7.3
610
16
5.9
37
–––
20
7.3
7.1
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
ns
Conditions
VDS = 50V, ID = 2.2A
ID = 3.6A
VDS = 400V
VGS = 10V, See Fig.14a &14b
VDD = 250V
ID = 3.6A
RG = 17Ω
VGS = 10V, See Fig. 15a & 15b
VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig. 5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
f
f
pF
VGS = 0V,VDS = 0V to 400V
g
(Energy Related)
Avalanche Characteristics
Symbol
EAS
IAR
EAR
Parameter
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
c
d
c
Typ.
–––
–––
–––
Max.
150
1.8
7.8
Units
mJ
A
mJ
Typ.
Max.
Units
–––
–––
–––
1.6
40
110
°C/W
Thermal Resistance
Symbol
RθJC
RθJA
RθJA
Parameter
h
Junction-to-Case
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
h
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
Starting TJ = 25°C, L = 93mH, RG = 25Ω,
IAS = 1.8A. (See Figure 13).
ISD = 3.6A, di/dt ≤ 520A/μs, VDDV(BR)DSS,
TJ ≤ 150°C.
2
hi
Pulse width ≤ 300μs; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff.(ER) is a fixed capacitance that stores the same energy
as Coss while VDS is rising from 0 to 80% VDSS .
Rθ is measured at TJ approximately 90°C
When mounted on 1" square PCB (FR-4 or G-10 Material)
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IRFR812TRPbF
100
100
10
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
6.2V
5.9V
5.8V
5.6V
5.5V
5.3V
1
0.1
5.3V
BOTTOM
0.01
≤60μs PULSE WIDTH
1
Tj = 150°C
0.1
10
100
1
VDS, Drain-to-Source Voltage (V)
10
Fig 2. Typical Output Characteristics
100
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig 1. Typical Output Characteristics
≤60μs PULSE WIDTH
10
TJ = 150°C
1
100
V DS, Drain-to-Source Voltage (V)
VDS = 50V
ID, Drain-to-Source Current(A)
5.3V
1
≤60μs PULSE WIDTH
Tj = 25°C
0.1
10
VGS
15V
10V
6.2V
5.9V
5.8V
5.6V
5.5V
5.3V
TJ = 25°C
ID = 3.6A
2.5
VGS = 10V
2.0
1.5
1.0
0.5
0.0
0.1
4
5
6
7
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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8
-60 -40 -20 0
20 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
100000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
C, Capacitance (pF)
10000
Coss = Cds + Cgd
1000
Ciss
100
Coss
Crss
10
1
1
10
100
1000
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
IRFR812TRPbF
650
Id = 250uA
600
550
500
-60 -40 -20 0
VDS, Drain-to-Source Voltage (V)
T J , Temperature ( °C )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typ. Breadown Voltage
vs. Temperature
100
16
VDS= 400V
VDS= 250V
12
ISD, Reverse Drain Current (A)
VGS, Gate-to-Source Voltage (V)
ID= 3.6A
VDS= 100V
8
4
T J = 150°C
10
1
T J = 25°C
VGS = 0V
0
0
4
8
12
QG Total Gate Charge (nC)
4
20 40 60 80 100 120 140 160
16
0.1
0.2
0.4
0.6
0.8
1.0
VSD, Source-to-Drain Voltage (V)
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IRFR812TRPbF
RDS (on) , Drain-to-Source On Resistance (Ω)
ID , Drain Current (A)
4
3
2
1
0
25
50
75
100
125
150
3.0
2.5
VGS = 20V
VGS = 10V
2.0
1.5
0
1
T C , CaseTemperature (°C)
2
3
4
5
6
7
ID , Drain Current (A)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 9. Typical Rdson Vs. Drain Current
Thermal Response ( Z thJC )
10
1
D = 0.50
0.20
0.10
0.1
0.05
0.02
0.01
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR812TRPbF
ID, Drain-to-Source Current (A)
100
EAS, Single Pulse Avalanche Energy (mJ)
700
OPERATION IN THIS AREA
LIMITED BY R DS(on)
10
100μsec
1msec
1
10msec
0.1
Tc = 25°C
Tj = 150°C
Single Pulse
ID
0.4A
0.7A
BOTTOM 1.8A
TOP
600
500
400
300
200
100
0
DC
25
0.01
1
10
100
1000
VDS, Drain-toSource Voltage (V)
Fig 12. Maximum Safe Operating Area
50
75
100
125
150
Starting T J, Junction Temperature (°C)
Fig 13. Maximum Avalanche Energy
vs. Drain Current
V(BR)DSS
15V
tp
DRIVER
L
VDS
D.U.T
RG
+
V
- DD
IAS
20V
tp
A
0.01Ω
I AS
Fig 13a. Unclamped Inductive Test Circuit
Fig 13b. Unclamped Inductive Waveforms
Id
Vds
Vgs
L
DUT
0
1K
S
VCC
Vgs(th)
Qgs1 Qgs2
Fig 14a. Gate Charge Test Circuit
6
Qgd
Qgodr
Fig 14b. Gate Charge Waveform
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IRFR812TRPbF
RD
VDS
VDS
90%
V GS
D.U.T.
RG
+
- VDD
10%
VGS
V10V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1
td(on)
Fig 15a. Switching Time Test Circuit
D.U.T
td(off)
Driver Gate Drive
+
P.W.
-
Reverse
Recovery
Current
VDD
P.W.
Period
D.U.T. ISD Waveform
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D=
*
•
•
•
•
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
tf
Fig 15b. Switching Time Waveforms
+
RG
tr
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
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7
IRFR812TRPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120
WITH AS S EMBLY
LOT CODE 1234
AS S EMBLED ON WW 16, 2001
IN THE AS S EMBLY LINE "A"
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" in as s embly line pos ition
indicates "Lead-F ree"
IRFR120
12
116A
34
AS S EMBLY
LOT CODE
DATE CODE
YEAR 1 = 2001
WEEK 16
LINE A
"P" in as s embly line position indicates
"Lead-Free" qualification to the cons umer-level
OR
INT ERNATIONAL
RE CT IFIER
LOGO
PART NUMBER
IRF R120
12
AS S EMBLY
LOT CODE
34
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
P = DES IGNAT ES LEAD-FREE
PRODUCT QUALIF IED TO THE
CONS UMER LEVEL (OPTIONAL)
YEAR 1 = 2001
WEEK 16
A = AS S EMBLY S ITE CODE
D-Pak (TO-252AA) packages are not recommended for Surface Mount Application.
Note:For the most current drawing please refer to IR website at http://www.irf.com/package/
8
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IRFR812TRPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 101N Sepulveda., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.04/12
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9