TC74HC4538AP/AF/AFN/AFT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4538AP,TC74HC4538AF,TC74HC4538AFN,TC74HC4538AFT Dual Retriggerable Monostable Multivibrator The TC74HC4538A is a high speed CMOS MONOSTABLE MULTIVIBRATOR fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. There are two trigger inputs, A input (positive edge input), and B input (negative edge input). These inputs are valid for a slow rise/fall time signal (tr = tf = 1 s) as they are schmitt trigger inputs. After triggering, the output stays in a MONOSTABLE state for the time period determined by the external resistor and capacitor (RX, CX). A low level at CD input breaks this STABLE STATE. In the MONOSTABLE state, if a new trigger is applied, it makes the MONOSTABLE period longer (retrigger mode). Limitations for CX and RX are as follows: External capacitor CX ........... No limitation External resistor RX .............. VCC = 2.0 V more than 5 kΩ VCC ≥ 3.0 V more than 1 kΩ All inputs are equipped with protection circuits against static discharge or transient excess voltage. TC74HC4538AP TC74HC4538AF TC74HC4538AFN Features (Note) • High speed: tpd = 25 ns (typ.) at VCC = 5 V • Low power dissipation Stand by state: ICC = 4 μA (max) at Ta = 25°C Active state: ICC = 300 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Output drive capability: 10 LSTTL loads • • Symmetrical output impedance: |IOH| = IOL = 4 mA (min) ∼ tpHL Balanced propagation delays: tpLH − • Wide operating voltage range: VCC (opr) = 2 V to 6 V • Pin and function compatible with 4538B Note: Note: The JEDEC SOP (FN) is not available in Japan. TC74HC4538AFT In the case of using only one circuit, CD should be tied to GND, T1·T2·Q· Q should be tied to OPEN, the other inputs should be tied to VCC or GND. Weight DIP16-P-300-2.54A SOP16-P-300.1.27A SOL16-P-150-1.27 TSSOP16-P-0044-0.65A 1 : 1.00 g (typ.) : 0.18 (typ.) : 0.13 g (typ.) : 0.06 g (typ. 2007-10-01 TC74HC4538AP/AF/AFN/AFT Pin Assignment IEC Logic Symbol 1T1 1 16 VCC 1A 1B 1T2 2 15 2T1 1CD 1CD 3 14 2T2 1T1 1T2 1A 4 13 2CD 5 12 2A 1B 2A 2B 2CD 1Q 6 11 2B 1Q 7 10 2Q GND 8 9 2Q 2T1 2T2 (4) (5) (3) (1) (2) (12) (11) (13) (15) (14) & (6) R CX RX/CX & R CX RX/CX (7) 1Q 1Q (10) 2Q (9) 2Q (top view) Truth Table Inputs A Outputs Q CD H H X L H L H H X H L H L X Output Enable H X L Note Q B Inhibit Inhibit Output Enable L H Reset X: Don’t care 2 2007-10-01 TC74HC4538AP/AF/AFN/AFT Block Diagram (Note 1)(Note 2) DX DX CX 1 T1 A B RX 2 T2 CX VCC 15 6 7 14 T1 T2 Q 4 5 VCC RX A B 10 9 Q 3 Q 12 11 Q 13 CD CD Note 1: CX, RX, DX are external. Capacitor, resistor, and diode, respectively. Note 2: External clamping diode, DX The external capacitor is charged to VCC level in the wait state, i.e. when no trigger is applied. Supply voltage is turned off and CX is discharged mainly through the internal (parasitic) diode. If CX is sufficiently large and VCC drops rapidly, there will be some possibility of damaging the IC by rush current or latch-up. If the capacitance of the supply voltage filter is large enough and VCC drops slowly, the rush current is automatically limited and damage to the IC is avoided. The maximum value of forward current through the parasitic diode is ±20 mA. In the case of a large CX, the limitation of fall time of the supply voltage is determined as follows: tf ≥ (VCC − 0.7) CX/20 mA (tf is the time from the voltage supply turning off to the level of supply voltage reaching 0.4 VCC.) In the care of a system that does not satisfy the above condition, an external clamping diode is needed to protect the IC from rush current. 3 2007-10-01 TC74HC4538AP/AF/AFN/AFT System Diagram VCC VrefL VrefH C1 QP C2 T2 QN VCC T1 D R Q A CK B Q F/F Q Q CD Timing Chart trr VIH A VIL VIH B VIL T2 VCC VrefH VrefL GND CD VIH VIL VOH Q VOL VOH Q twOUT twOUT twOUT + trr 4 VOL 2007-10-01 TC74HC4538AP/AF/AFN/AFT Functional Description (1) (2) (3) (4) Stand-by state The external capacitor is fully charge to VCC in the stand-by state. That means, before triggering, QP and QN transistors which are connected to the T2 node are in the off state. Two comparators that relate to the timing of the output pulse, and two reference voltage supplies stop their operation. The total supply current is only leakage current. Trigger operation Trigger operation is effective in either of the following two cases. One is the condition where the A input is low, and the B input has a falling signal. The other, where the B input is high, and the A input has a rising signal. After trigger becomes effective, comparators C1 and C2 start operating, and QN is turned on. The external capacitor discharges through QN. The voltage level at the T2 node drops. If the T2 voltage level falls to the internal reference voltage VrefL, the output of C1 becomes low. The flip-flop is then reset and QN turns off. At that moment C1 stops but C2 continues operating. After QN turns off, the voltage at T2 start rising at a rate determined by the time constant of external capacitor CX and resistor RX. After the triggering, output Q becomes high, following some delay time of the internal F/F and gates. It stays high even if the voltage of T2 changes from falling to rising. When T2 reaches the internal reference voltage VrefH, the output of C2 becomes low, the output Q goes low and C2 stops its operation. That means, after triggering, when the voltage level of T2 reaches VrefH, the IC returns to its MONOSTABLE state. In the case of large value of CX and RX, and ignoring the discharge time of the capacitor and internal delays of the IC, the width of the output pulse, (twOUT), is as follows: twOUT = 0.70·CX·RX Retrigger operation When another new trigger is applied to input A or B while in the MONOSTABLE state, it is effective only if the IC is charging CX. The voltage level of T2 then falls to VrefL level again. Therefore the Q output stays high if the next trigger comes in before the time period set by CX and RX. If the 2nd trigger is very close to previous trigger, such as application during the discharge cycle, the nd 2 trigger will not be effective. The minimum time for effective 2nd trigger, trr (min), depends on VCC and CX. Reset operation In normal operation, CD input is held high. If CD is low, a trigger has no effect because the Q output is held low and the trigger control F/F is reset. Also QP turns on and CX is charged rapidly to VCC. This means if CD input is set low, the IC goes into a wait state. 5 2007-10-01 TC74HC4538AP/AF/AFN/AFT Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit Supply voltage range VCC −0.5 to 7 V DC input voltage VIN −0.5 to VCC + 0.5 V VOUT −0.5 to VCC + 0.5 V DC output voltage Input diode current IIK ±20 mA Output diode current IOK ±20 mA DC output current IOUT ±25 mA DC VCC/ground current ICC ±50 mA Power dissipation PD 500 (DIP) (Note 2)/180 (SOP/TSSOP) mW Storage temperature Tstg −65 to 150 °C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = −40°C to 65°C. From Ta = 65°C to 85°C a derating factor of −10 mW/°C should be applied up to 300 mW. Operating Ranges (Note 1) Characteristics Symbol Rating Unit Supply voltage VCC 2 to 6 V Input voltage VIN 0 to VCC V VOUT 0 to VCC V Topr −40 to 85 °C Output voltage Operating temperature Input rise and fall time ( CD only) 0 to 1000 (VCC = 2.0 V) 0 to 500 (VCC = 4.5 V) tr, tf ns 0 to 400 (VCC = 6.5 V) External capacitor CX External resistor RX No limitation (Note 2) ≥ 5 k (Note 5) (VCC = 2.0 V) ≥ 1 k (Note 5) (VCC ≥ 3.0 V) F Ω Note 1: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Note 2: The maximum allowable values of CX and RX are a function of leakage of capacitor CX, the leakage of TC74HC4538A, and leakage due to board layout and surface resistance. Susceptibility to externally induced noise signals may occur for RX > 1 MΩ. 6 2007-10-01 TC74HC4538AP/AF/AFN/AFT Electrical Characteristics DC Characteristics Test Condition Characteristics High-level input voltage Low-level input voltage High-level output voltage Symbol VIH VOH (Q, Q ) Low-level output voltage VOL (Q, Q ) VCC (V) Min Typ. Max Min Max 2.0 1.50 ― ― 1.50 ― 4.5 3.15 ― ― 3.15 ― 6.0 4.20 ― ― 4.20 ― 2.0 ― ― 0.50 ― 0.50 4.5 ― ― 1.35 ― 1.35 6.0 ― ― 1.80 ― 1.80 2.0 1.9 2.0 ― 1.9 ― 4.5 4.4 4.5 ― 4.4 ― 6.0 5.9 6.0 ― 5.9 ― IOH = −4 mA 4.5 4.18 4.31 ― 4.13 ― IOH = −5.2 mA 6.0 5.68 5.80 ― 5.63 ― 2.0 ― 0.0 0.1 ― 0.1 4.5 ― 0.0 0.1 ― 0.1 6.0 ― 0.0 0.1 ― 0.1 IOL = 4 mA 4.5 ― 0.17 0.26 ― 0.33 IOL = 5.2 mA 6.0 ― 0.18 0.26 ― 0.33 ― VIL ― VIN = VIH or VIL VIN = VIH or VIL Ta = −40 to 85°C Ta = 25°C IOH = −20 μA IOL = 20 μA Unit V V V V Input leakage current IIN VIN = VCC or GND 6.0 ― ― ±0.1 ― ±1.0 μA T2 terminal input leakage current IIN VIN = VCC or GND 6.0 ― ― ±0.5 ― ±5.0 μA Quiescent supply current ICC VIN = VCC or GND 6.0 ― ― 4.0 ― 40.0 μA 2.0 ― 40 120 ― 160 4.5 ― 200 300 ― 400 6.0 ― 300 600 ― 800 Active-state supply current (Note) Note: ICC VIN = VCC or GND T2 ext = 0.5 VCC μA Per circuit 7 2007-10-01 TC74HC4538AP/AF/AFN/AFT Timing Requirements (input: tr = tf = 6 ns) Characteristics Symbol Minimum pulse width tw (L) (A, B ) tw (H) Minimum clear width ( CD ) Minimum clear removal time Test Condition ― ― tw (L) trem ― Ta = −40 to 85°C VCC (V) Typ. Limit Limit 2.0 ― 75 95 4.5 ― 15 19 6.0 ― 13 16 2.0 ― 75 95 4.5 ― 15 19 6.0 ― 13 16 2.0 ― 15 15 4.5 ― 5 5 Unit ns ns ns 6.0 ― 5 5 2.0 380 ― ― 4.5 92 ― ― 6.0 72 ― ― 2.0 6.0 ― ― 4.5 1.4 ― ― 6.0 1.2 ― ― Test Condition Min Typ. Max Unit ― ― 6 12 ns ― ― 25 44 ns ― ― 21 34 ns RX = 1 kΩ CX = 100 pF Minimum retrigger time Ta = 25°C trr RX = 1 kΩ CX = 0.01 μF ns μs AC Characteristics (CL = 15 pF, VCC = 5 V, Ta = 25°C, input: tr = tf = 6 ns) Characteristics Output transition time Symbol tTLH tTHL Propagation delay time tpLH (A, B -Q, Q ) tpHL Propagation delay time tpLH ( CD -Q, Q ) tpHL 8 2007-10-01 TC74HC4538AP/AF/AFN/AFT AC Characteristics (CL = 50 pF, input: tr = tf = 6 ns) Characteristics Output transition time (A, B -Q, Q ) tpHL Propagation delay time tpLH ( CD -Q, Q ) tpHL twOUT Typ. Max Min Max 2.0 ― 30 75 ― 95 4.5 ― 8 15 ― 19 6.0 ― 7 13 ― 16 2.0 ― 120 250 ― 315 4.5 ― 30 50 ― 63 6.0 ― 25 43 ― 54 2.0 ― 100 195 ― 245 4.5 ― 25 39 ― 49 6.0 ― 20 33 ― 42 CX = 0 F 2.0 ― 540 1200 ― 1500 RX = 5 kΩ (VCC = 2 V) 4.5 ― 180 250 ― 320 RX = 1 kΩ (VCC = 4.5 V, 6 V) 6.0 ― 150 200 ― 260 2.0 70 83 96 70 96 4.5 69 77 85 69 85 6.0 69 77 85 69 85 2.0 0.67 0.75 0.83 0.67 0.83 4.5 0.67 0.73 0.77 0.67 0.77 6.0 0.67 0.73 0.77 0.67 0.77 ― ― ±1 ― ― ― % ― 5 10 ― 10 pF ― 70 ― ― ― pF ― ― ― CX = 0.01 μF RX = 10 kΩ CX = 0.1 μF RX = 10 kΩ Output pulse width error between circuits Unit Min tTHL tpLH Ta = −40 to 85°C Ta = 25°C VCC (V) tTLH Propagation delay time Output pulse width Test Condition Symbol ΔtwOUT ― ns ns ns ns μs ms (in same package) Input capacitance CIN Power dissipation capacitance CPD Note: ― (Note) CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC’·Duty/100 + ICC/2 (per circuit) (ICC’: active supply current) (duty: %) 9 2007-10-01 TC74HC4538AP/AF/AFN/AFT Output pulse width constant K Output Pulse Width Constant K – Supply Voltage (typical) (external resistor (RX) = 10 kΩ: twOUT = K·CX·RX) 0.9 0.8 CX = 0.01 μF CX = 0.1 μF 0.7 CX = 1 μF 2 3 4 Supply voltage 5 VCC 6 (V) twOUT – CX Characteristics (typical) trr – VCC Characteristics (typical) Ta = 25°C (μs) VCC = 4.5 V CL = 50 pF RX = 1 MΩ Minimum retrigger time trr Output pulse width twOUT (μs) 10 3 RX = 100 kΩ 102 RX = 10 kΩ 10 CX = 0.01 μF 1 CX = 1000 pF CX = 100 pF 0.1 10 RX = 1 kΩ 0 1 2 3 Supply voltage 1 10−1 102 103 4 5 VCC (V) 6 104 External capacitor CX (pF) 10 2007-10-01 TC74HC4538AP/AF/AFN/AFT Package Dimensions Weight: 1.00 g (typ.) 11 2007-10-01 TC74HC4538AP/AF/AFN/AFT Package Dimensions Weight: 0.18 g (typ.) 12 2007-10-01 TC74HC4538AP/AF/AFN/AFT Package Dimensions (Note) Note: This package is not available in Japan. Weight: 0.13 g (typ.) 13 2007-10-01 TC74HC4538AP/AF/AFN/AFT Package Dimensions Weight: 0.06 g (typ.) 14 2007-10-01 TC74HC4538AP/AF/AFN/AFT RESTRICTIONS ON PRODUCT USE 20070701-EN GENERAL • The information contained herein is subject to change without notice. • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc. • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his document shall be made at the customer’s own risk. • The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of TOSHIBA or the third parties. • Please contact your sales representative for product-by-product details in this document regarding RoHS compatibility. Please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 15 2007-10-01