ONSEMI MC10ELT20DG

MC10ELT20, MC100ELT20
5VTTL to Differential PECL
Translator
Description
The MC10ELT/100ELT20 is a TTL to differential PECL translator.
Because PECL (Positive ECL) levels are used, only +5 V and ground
are required. The small outline 8-lead package and the single gate of
the ELT20 makes it ideal for those applications where space,
performance, and low power are at a premium.
The 100 Series contains temperature compensation.
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MARKING DIAGRAMS*
8
Features
•
•
•
•
•
8
HLT20
ALYW
G
1
1.2 ns Typical Propagation Delay
PNP TTL Inputs for Minimal Loading
Flow Through Pinouts
Operating Range: VCC = 4.75 V to 5.25 V with GND = 0 V
Pb−Free Packages are Available
SO−8
D SUFFIX
CASE 751
1
8
8
1
1
1
8
HT20
ALYWG
G
1
KT20
ALYWG
G
5B MG
G
TSSOP−8
DT SUFFIX
CASE 948R
KLT20
ALYW
G
1
DFN8
MN SUFFIX
CASE 506AA
H
K
5B
2P
= MC10
= MC100
= MC10
= MC100
A
L
Y
W
M
G
4
2P MG
G
8
1
4
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
December, 2006 − Rev. 5
1
Publication Order Number:
MC10ELT20/D
MC10ELT20, MC100ELT20
NC
Q
1
Table 1. PIN DESCRIPTION
8 VCC
TTL
2
Pin
7 D
PECL
Q
3
NC
4
6 NC
5 GND
Figure 1. 8−Lead Pinout (Top View)
and Logic Diagram
Function
Q, Q
PECL Differential Outputs*
D
TTL Input
VCC
Positive Supply
GND
Ground
NC
No Connect
EP
Exposed pad must be connected to a sufficient
thermal conduit. Electrically connect to the most
negative supply or leave floating open.
*Output state undetermined when inputs are open.
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
N/A
Internal Input Pullup Resistor
N/A
ESD Protection
Human Body Model
Machine Model
> 4 kV
> 200 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SO−8
TSSOP−8
DFN8
Flammability Rating
Pb Pkg
Pb−Free Pkg
Level 1
Level 1
Level 1
Level 1
Level 3
Level 1
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
51 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
VCC
Positive Power Supply
GND = 0 V
VIN
Input Voltage
GND = 0 V
Iout
Output Current
Continuous
Surge
TA
Condition 2
Unit
7
V
7
V
50
100
mA
mA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
SO−8
SO−8
190
130
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
SO−8
41 to 44
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
TSSOP−8
41 to 44
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
DFN8
DFN8
129
84
°C/W
°C/W
Tsol
Wave Solder
< 3 s @ 248°C
< 3 s @ 260°C
265
265
°C
Pb
Pb−Free
VI VCC
Rating
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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2
MC10ELT20, MC100ELT20
Table 4. 10ELT SERIES PECL DC CHARACTERISTICS VCC = 5.0 V; GND = 0.0 V (Note 2)
−40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
16
85°C
Max
Min
Typ
16
Max
Unit
16
mA
ICC
Power Supply Current
VOH
Output HIGH Voltage (Note 3)
3920
4010
4110
4020
4105
4190
4090
4185
4280
mV
VOL
Output LOW Voltage (Note 3)
3050
3200
3350
3050
3210
3370
3050
3227
3405
mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Output parameters vary 1:1 with VCC. VCC can vary ±0.25 V.
3. Outputs are terminated through a 50 W resistor to VCC − 2 V.
Table 5. 100ELT SERIES PECL DC CHARACTERISTICS VCC = 5.0 V; GND = 0.0 V (Note 4)
−40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
16
85°C
Max
Min
ICC
Power Supply Current
VOH
Output HIGH Voltage (Note 5)
3915
3995
4120
3975
4045
4120
3975
VOL
Output LOW Voltage (Note 5)
3170
3305
3445
3190
3295
3380
3190
IIH
Input HIGH Current
IIL
Input LOW Current
150
0.5
Typ
Max
Unit
16
mA
4050
4120
mV
3295
3380
mV
150
mA
16
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Output parameters vary 1:1 with VCC. VCC can vary ±0.25 V.
5. Outputs are terminated through a 50 W resistor to VCC − 2 V.
Table 6. TTL INPUT DC CHARACTERISTICS VCC = 4.7 V to 5.27 V; TA = −40°C to 85°C
Symbol
Characteristic
Condition
Min
Typ
Max
Unit
IIH
Input HIGH Current
VIN = 2.7 V
20
mA
IIHH
Input HIGH Current
VIN = 7.0 V
100
mA
IIL
Input LOW Current
VIN = 0.5 V
−0.6
mA
VIK
Input Clamp Diode Voltage
IIN = −18 mA
−1.2
V
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
2.0
V
0.8
V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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3
MC10ELT20, MC100ELT20
Table 7. AC CHARACTERISTICS VCC = 4.75 V to 5.25 V; GND = 0.0 V
−40°C
Characteristic
Min
fmax
Maximum Toggle Frequency
100
tPLH
Propagation Delay
1.5 V to 50%
0.6
tPHL
Propagation Delay
1.5 V to 50%
0.4
tJITTER
Cycle−to−Cycle Jitter
tr/tf
Output Rise/Fall Time
(20−80%)
Symbol
Typ
25°C
Max
Min
Typ
85°C
Max
100
0.82
0.6
0.82
1.25
0.6
1.0
0.5
0.8
1.1
0.7
TBD
1.5
Typ
Max
100
1.2
TBD
0.15
Min
0.83
1.35
ns
1.30
ns
TBD
0.15
1.5
0.15
Unit
MHz
ps
1.5
ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Q
Zo = 50 W
D
Receiver
Device
Driver
Device
Q
D
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 2.0 V
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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4
MC10ELT20, MC100ELT20
ORDERING INFORMATION
Package
Shipping †
SO−8
98 Units / Rail
MC10ELT20DG
SO−8
(Pb−Free)
98 Units / Rail
MC10ELT20DR2
SO−8
2500 / Tape & Reel
MC10ELT20DR2G
SO−8
(Pb−Free)
2500 / Tape & Reel
MC10ELT20DT
TSSOP−8
100 Units / Rail
MC10ELT20DTG
TSSOP−8
(Pb−Free)
100 Units / Rail
MC10ELT20DTR2
TSSOP−8
2500 / Tape & Reel
MC10ELT20DTR2G
TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC10ELT20MNR4
DFN8
1000 / Tape & Reel
DFN8
(Pb−Free)
1000 / Tape & Reel
SO−8
98 Units / Rail
MC100ELT20DG
SO−8
(Pb−Free)
98 Units / Rail
MC100ELT20DR2
SO−8
2500 / Tape & Reel
MC100ELT20DR2G
SO−8
(Pb−Free)
2500 / Tape & Reel
MC100ELT20DT
TSSOP−8
100 Units / Rail
MC100ELT20DTG
TSSOP−8
(Pb−Free)
100 Units / Rail
MC100ELT20DTR2
TSSOP−8
2500 / Tape & Reel
MC100ELT20DTR2G
TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC100ELT20MNR4
DFN8
1000 / Tape & Reel
DFN8
(Pb−Free)
1000 / Tape & Reel
Device
MC10ELT20D
MC10ELT20MNR4G
MC100ELT20D
MC100ELT20MNR4G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D
− Odd Number Counters Design
AND8002/D
− Marking and Date Codes
AND8020/D
− Termination of ECL Logic Devices
AND8066/D
− Interfacing with ECLinPS
AND8090/D
− AC Characteristics of ECL Devices
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5
MC10ELT20, MC100ELT20
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
1
0.25 (0.010)
M
Y
M
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
H
0.10 (0.004)
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8 _
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
MC10ELT20, MC100ELT20
PACKAGE DIMENSIONS
TSSOP−8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R−02
ISSUE A
8x
0.15 (0.006) T U
0.10 (0.004)
S
2X
L/2
L
8
5
1
PIN 1
IDENT
0.15 (0.006) T U
K REF
S
M
T U
V
S
0.25 (0.010)
B
−U−
4
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
S
M
A
−V−
F
DETAIL E
C
0.10 (0.004)
−T− SEATING
PLANE
D
−W−
G
DETAIL E
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7
DIM
A
B
C
D
F
G
K
L
M
MILLIMETERS
MIN
MAX
2.90
3.10
2.90
3.10
0.80
1.10
0.05
0.15
0.40
0.70
0.65 BSC
0.25
0.40
4.90 BSC
0_
6_
INCHES
MIN
MAX
0.114
0.122
0.114
0.122
0.031
0.043
0.002
0.006
0.016
0.028
0.026 BSC
0.010
0.016
0.193 BSC
0_
6_
MC10ELT20, MC100ELT20
PACKAGE DIMENSIONS
DFN8
CASE 506AA−01
ISSUE D
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
PIN ONE
REFERENCE
2X
0.10 C
2X
0.10 C
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
TOP VIEW
0.08 C
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.20
0.30
2.00 BSC
1.10
1.30
2.00 BSC
0.70
0.90
0.50 BSC
0.20
−−−
0.25
0.35
A
0.10 C
8X
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
E
(A3)
SIDE VIEW
A1
C
D2
e
e/2
4
1
8X
L
E2
K
8
5
8X
b
0.10 C A B
0.05 C
NOTE 3
BOTTOM VIEW
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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8
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MC10ELT20/D