NSB1706DMW5T1 Dual Bias Resistor Transistor NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network http://onsemi.com The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the NSB1706DMW5T1, two BRT devices are housed in the SC−88A package which is ideal for low power surface mount applications where board space is at a premium. Features • • • • (5) (4) Q1 Q2 R2 Simplifies Circuit Design Reduces Board Space Reduces Component Count Pb−Free Package is Available R2 R1 R1 (1) (2) (3) MAXIMUM RATINGS (TA = 25°C unless otherwise noted, common for Q1 and Q2) Symbol Value Unit Collector-Base Voltage Rating VCBO 50 Vdc Collector-Emitter Voltage VCEO 50 Vdc IC 100 mAdc Symbol Max Unit PD 187 (Note 1) 256 (Note 2) 1.5 (Note 1) 2.0 (Note 2) mW Collector Current 1 SC−88A CASE 419A STYLE 1 THERMAL CHARACTERISTICS Characteristic (One Junction Heated) Total Device Dissipation TA = 25°C Derate above 25°C Thermal Resistance, Junction-to-Ambient Characteristic (Both Junctions Heated) Total Device Dissipation TA = 25°C Derate above 25°C Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Lead Junction and Storage Temperature mW/°C 670 (Note 1) 490 (Note 2) °C/W Symbol Max Unit PD 250 (Note 1) 385 (Note 2) 2.0 (Note 1) 3.0 (Note 2) mW RqJA May, 2006 − Rev. 3 U6 M G G 1 mW/°C RqJA 493 (Note 1) 325 (Note 2) °C/W RqJL 188 (Note 1) 208 (Note 2) °C/W TJ, Tstg −55 to +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR−4 @ Minimum Pad. 2. FR−4 @ 1.0 x 1.0 inch Pad. © Semiconductor Components Industries, LLC, 2006 MARKING DIAGRAM 1 U6 = Device Marking M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping † NSB1706DMW5T1 SC−88A 3000/Tape & Reel NSB1706DMW5T1G SC−88A 3000/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NSB1706DMW5T1/D NSB1706DMW5T1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, common for Q1 and Q2) Characteristic Symbol Min Typ Max Unit Collector-Base Cutoff Current (VCB = 50 V, IE = 0) ICBO − − 100 nAdc Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0) ICEO − − 500 nAdc Emitter-Base Cutoff Current (VEB = 6.0 V, IC = 0) IEBO − − 0.18 mAdc Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0) V(BR)CBO 50 − − Vdc Collector-Emitter Breakdown Voltage (Note 3) (IC = 2.0 mA, IB = 0) V(BR)CEO 50 − − Vdc hFE 80 200 − VCE(sat) − − 0.25 − − 0.2 OFF CHARACTERISTICS ON CHARACTERISTICS (Note 3) DC Current Gain (VCE = 10 V, IC = 5.0 mA) Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 1 mA) Vdc Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW) VOL Vdc Output Voltage (off) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW) VOH 4.9 − − Vdc Input Resistor R1 3.3 4.7 6.1 kW Resistor Ratio R1/R2 0.055 0.1 0.185 3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%. NOTE: New resistor combinations. Updated curves to follow in subsequent data sheets. PD, POWER DISSIPATION (mW) 300 250 200 150 100 50 0 −50 RqJA = 833°C/W 0 50 100 TA, AMBIENT TEMPERATURE (°C) Figure 1. Derating Curve http://onsemi.com 2 150 NSB1706DMW5T1 PACKAGE DIMENSIONS SC−88A, SOT−353, SC−70 CASE 419A−02 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. A G 5 4 −B− S 1 2 DIM A B C D G H J K N S 3 D 5 PL 0.2 (0.008) B M M N INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC −−− 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC −−− 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 STYLE 1: PIN 1. BASE 2. EMITTER 3. BASE 4. COLLECTOR 5. COLLECTOR J C K H SOLDERING FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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