ONSEMI NL17SZ00

NL17SZ00
Single 2−Input NAND Gate
The NL17SZ00 is a single 2−input NAND Gate in two tiny footprint
packages. The device performs much as LCX multi−gate products in
speed and drive.
Features
•
•
•
•
•
•
•
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Tiny SOT−353 and SOT−553 Packages
2.7 ns TPD at 5 V (typ)
Source/Sink 24 mA at 3.0 V
Over−Voltage Tolerant Inputs
Pin For Pin with NC7SZ00P5X, TC7SZ00FU and TC7SZ00AFE
Chip Complexity: FETs = 20
Designed for 1.65 V to 5.5 V VCC Operation
Pb−Free Packages are Available
MARKING
DIAGRAMS
5
5
L1d
1
SOT−353/SC70−5/SC−88A
DF SUFFIX
CASE 419A
1
d = Date Code
5
5
L1 D
B
1
A
2
GND
3
5
1
SOT−553
XV5 SUFFIX
CASE 463B
VCC
L1
D
4
Y
&
B
= Device Marking
= One Digit Date Code
PIN ASSIGNMENT
Figure 1. Pinout (Top View)
A
1
Y
Pin
Function
1
A
2
B
3
GND
4
Y
5
VCC
Figure 2. Logic Symbol
FUNCTION TABLE
Output
Input
Y = AB
A
B
Y
L
L
H
L
H
H
H
L
H
H
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
 Semiconductor Components Industries, LLC, 2005
January, 2005 − Rev. 4
1
Publication Order Number:
NL17SZ00/D
NL17SZ00
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage
0.5 to 7.0
V
VIN
DC Input Voltage
0.5 to 7.0
V
0.5 to to VCC + 0.5
V
VOUT
DC Output Voltage
IIK
DC Input Diode Current
50
mA
IOK
DC Output Diode Current
50
mA
IOUT
DC Output Sink Current
50
mA
ICC
DC Supply Current per Supply Pin
100
mA
65 to 150
°C
260
°C
TSTG
Storage Temperature Range
TL
Lead Temperature, 1 mm from Case for 10 Seconds
TJ
Junction Temperature Under Bias
JA
Thermal Resistance
PD
Power Dissipation in Still Air at 85°C
MSL
Moisture Sensitivity
FR
Flammability Rating
ESD
ESD Classification
150
°C
SOT−353 (Note 1)
SOT−553
350
496
°C/W
SOT−353
SOT−553
186
135
mW
Level 1
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Class Z
Class A
N/A
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A, rated to EIA/JESD22−A114−B.
3. Tested to EIA/JESD22−A115−A, rated to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
DC Supply Voltage
VIN
DC Input Voltage
VOUT
DC Output Voltage
TA
Operating Temperature Range
tr, tf
Input Rise and Fall Time
VCC = 3.0 V 0.3 V
VCC = 5.0 V 0.5 V
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2
Min
Max
Unit
1.65
5.5
V
0
5.5
V
0
VCC + 0.5
V
40
85
°C
0
0
100
20
ns/V
NL17SZ00
DC ELECTRICAL CHARACTERISTICS
(V)
Min
High−Level Input Voltage
1.65 to 1.95
2.3 to 5.5
0.75 VCC
0.7 VCC
VIL
Low−Level Input Voltage
1.65 to 1.95
2.3 to 5.5
VOH
High−Level Output Voltage
Symbol
Parameter
VIH
Condition
VIN = VIL or VIH
VOL
IOH = 100 A
IOH = −3 mA
IOH = −8 mA
IOH = −12 mA
IOH = −16 mA
IOH = −24 mA
IOH = −32 mA
IOL = 100 A
IOL = 3 mA
IOL = 8 mA
IOL = 12 mA
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
Low−Level Output Voltage
VIN = VIH or VOH
40C TA 85C
TA = 25C
VCC
Typ
Max
Min
Max
0.75 VCC
0.7 VCC
0.25 VCC
0.3 VCC
VCC − 0.1
VCC
VCC − 0.1
1.65
1.55
1.65
1.55
2.3
1.9
2.1
1.9
2.7
2.2
2.4
2.2
3.0
2.4
2.7
2.4
3.0
2.3
2.5
2.3
4.5
3.8
4.0
3.8
1.65 to 5.5
V
0.25 VCC
0.3 VCC
1.65 to 5.5
Unit
V
V
0.1
0.1
1.65
0.08
0.24
0.24
2.3
0.20
0.3
0.3
2.7
0.22
0.4
0.4
3.0
0.28
0.4
0.4
3.0
0.38
0.55
0.55
4.5
0.42
0.55
0.55
V
IIN
Input Leakage Current
VIN = VCC or GND
0 to 5.5
0.1
1.0
A
ICC
Quiescent Supply Current
VIN = VCC or GND
5.5
1
10
A
AC ELECTRICAL CHARACTERISTICS tR = tF = 3.0 ns
Symbol
tPLH
tPHL
Condition
(V)
Min
Typ
Max
Min
Max
Unit
RL = 1 M CL = 15 pF
1.65
2.0
5.4
11.4
2.0
12
ns
RL = 1 M CL = 15 pF
1.8
2.0
4.5
9.5
2.0
10.0
RL = 1 M CL = 15 pF
2.5 to 0.2
0.8
3.0
6.5
0.8
7.0
RL = 1 M CL = 15 pF
3.3 0.3
0.5
2.4
4.5
0.5
4.7
1.5
2.4
5.0
1.5
5.2
0.5
2.0
3.9
0.5
4.1
0.8
2.4
4.3
0.8
4.5
Parameter
Propagation Delay
(Fi
d 4))
(Figure
3 and
40C TA 85C
TA = 25C
VCC
RL = 500 CL = 50 pF
RL = 1 M CL = 15 pF
5.0 0.5
RL = 500 CL = 50 pF
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical
Unit
CIN
Input Capacitance
VCC = 5.5 V, VI = 0 V or VCC
4
pF
CPD
Power Dissipation Capacitance
(N
(Note
5))
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
25
pF
10 MHz, VCC = 5.5 V, VI = 0 V or VCC
30
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
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3
NL17SZ00
tf = 3 ns
tf = 3 ns
90%
INPUT
A and B
VCC
90%
50%
VCC
50%
10%
10%
tPHL
GND
OUTPUT
INPUT
RL
tPLH
CL
VOH
OUTPUT Y
50%
50%
A 1−MHz square input wave is recommended for
propagation delay tests.
VOL
Figure 3. Switching Waveform
Figure 4. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Logic
Circuit
Indicator
No. of
Gates per
Package
Temp
Range
Identifier
NL17SZ00DFT2
NL
1
NL17SZ00DFT2G
NL
NL17SZ00XV5T2
NL
Device Order
Number
Technology
Device
Function
Package
Suffix
Tape and
Reel
Suffix
7
SZ
00
DF
1
7
SZ
00
1
7
SZ
00
Package
Type
Tape and
Reel Size†
T2
SOT−353/
SC70−5/
SC−88A
178 mm,
3000 Units
DF
T2
SOT−353/
SC70−5/
SC−88A
178 mm,
3000 Units
XV5
T2
SOT−553*
178 mm
4000 units
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*All Devices in Package SOT553 are Inherently Pb−Free.
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4
NL17SZ00
PACKAGE DIMENSIONS
SOT−353
DF SUFFIX
5−LEAD PACKAGE
CASE 419A−02
ISSUE G
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
A
G
5
4
−B−
S
1
2
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
B
M
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
−−−
0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
J
C
K
H
SOLDERING FOOTPRINT*
0.50
0.0197
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
mm inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
−−−
0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
NL17SZ00
PACKAGE DIMENSIONS
SOT−553
XV5 SUFFIX
5−LEAD PACKAGE
CASE 463B−01
ISSUE A
A
−X−
5
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
C
K
4
1
2
B
−Y−
3
D
G
S
DIM
A
B
C
D
G
J
K
S
J
5 PL
0.08 (0.003)
M
X Y
MILLIMETERS
MIN
MAX
1.50
1.70
1.10
1.30
0.50
0.60
0.17
0.27
0.50 BSC
0.08
0.18
0.10
0.30
1.50
1.70
STYLE 1:
PIN 1.
2.
3.
4.
5.
INCHES
MIN
MAX
0.059
0.067
0.043
0.051
0.020
0.024
0.007
0.011
0.020 BSC
0.003
0.007
0.004
0.012
0.059
0.067
BASE 1
EMITTER 1/2
BASE 2
COLLECTOR 2
COLLECTOR 1
STYLE 2:
PIN 1.
2.
3.
4.
5.
CATHODE
ANODE
CATHODE
CATHODE
CATHODE
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.35
0.0531
1.0
0.0394
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
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For additional information, please contact your
local Sales Representative.
NL17SZ00/D