8-BIT ADDRESSABLE LATCH The MC74AC259/74ACT259 is a high-speed 8-bit addressable latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable of storing single line data in eight addressable latches, and also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The device also incorporates an active LOW Common Clear for resetting all latches, as well as an active LOW Enable. It is functionally identical to the ALS259 8-bit addressable latch. • • • • • • Serial-to-Parallel Conversion Eight Bits of Storage with Output of Each Bit Available Random (Addressable) Data Entry Active High Demultiplexing or Decoding Capability Easily Expandable Common Clear N SUFFIX CASE 648-08 PLASTIC FUNCTIONAL DESCRIPTION The MC74AC259/74ACT259 has four modes of operation as shown in the Mode Selection Table. In the addressable latch mode, data on the Data line (D) is written into the addressed latch. The addressed latch will follow the data input with all nonaddressed latches remaining in their previous states in the memory mode. All latches remain in their previous state and are unaffected by the Data or Address inputs. In the one-of-eight decoding or demultiplexing mode, the addressed output will follow the state of the D input with all other outputs in the LOW state. In the clear mode all outputs are LOW and unaffected by the address and data inputs. When operating the MC74AC/ACT259 as an addressable latch, changing more than one bit of the address could impose a transient wrong address. Therefore, this should only be done while in the memory mode. The Mode Select Function Table summarizes the operations of the MC74AC/ACT259. VCC 16 MR E D 15 14 13 Q7 12 Q6 11 Q5 10 D SUFFIX CASE 751B-05 PLASTIC LOGIC SYMBOL Q4 9 A0 A1 E D A2 MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 1 2 3 4 5 6 7 8 A0 A1 A2 Q0 Q1 Q2 Q3 GND FACT DATA 5-1 MC74AC259 MC74ACT259 MODE SELECT TABLE E MR L H L H H H L L Mode Addressable Latch Memory Active HIGH 8-Channel Demultiplexer Clear H = HIGH Voltage Level L = LOW Voltage Level MODE SELECT-FUNCTION TABLE Operating Mode Inputs Outputs MR E D A0 A1 A2 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Master Reset L H X X X X L L L L L L L L Demultiplex (Active HIGH Decoder when D = H) L L L • • • L L L L • • • L d d d • • • d L H L • • • H L L H • • • H L L L • • • H Q=d L L • • • L L Q=d L • • • L L L Q=d • • • L L L L • • • L L L L • • • L L L L • • • L L L L • • • L L L L • • • Q=d Store (Do Nothing) H H X X X X q0 q1 q2 q3 q4 q5 q6 q7 Addressable Latch H H H • • • H L L L • • • L d d d • • • d L H L • • • H L L H • • • H L L L • • • H Q=d q0 q0 • • • q0 q1 Q=d q1 • • • q1 q2 q2 Q=d • • • q2 q3 q3 q3 • • • q3 q4 q4 q4 • • • q4 q5 q5 q5 • • • q5 q6 q6 q6 • • • q6 q7 q7 q7 • • • Q=d H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial d = HIGH or LOW Data one setup time prior to the LOW-to-HIGH Enable transition q = Lower case letters indicate the state of the referenced output established during the last cycle in which it was addressed or cleared. FACT DATA 5-2 MC74AC259 MC74ACT259 Q7 Q6 Q5 MR Q4 Q3 A2 A1 Q2 A0 Q1 D E Q0 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. FACT DATA 5-3 MC74AC259 MC74ACT259 MAXIMUM RATINGS* Symbol Parameter Value Unit –0.5 to +7.0 V V VCC DC Supply Voltage (Referenced to GND) Vin DC Input Voltage (Referenced to GND) –0.5 to VCC +0.5 Vout DC Output Voltage (Referenced to GND) –0.5 to VCC +0.5 V Iin DC Input Current, per Pin ±20 mA Iout DC Output Sink/Source Current, per Pin ±50 mA ICC DC VCC or GND Current per Output Pin ±50 mA Tstg Storage Temperature –65 to +150 °C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC Supply Voltage Vin, Vout DC Input Voltage, Output Voltage (Ref. to GND) tr, tf Input Rise and Fall Time (Note 1) ′AC Devices except Schmitt Inputs tr, tf Input Rise and Fall Time (Note 2) ′ACT Devices except Schmitt Inputs TJ Junction Temperature (PDIP) TA Operating Ambient Temperature Range IOH IOL Min Typ Max ′AC 2.0 5.0 6.0 ′ACT 4.5 5.0 5.5 0 VCC VCC @ 3.0 V 150 VCC @ 4.5 V 40 VCC @ 5.5 V 25 VCC @ 4.5 V 10 VCC @ 5.5 V 8.0 Unit V V ns/V ns/V 140 °C 85 °C Output Current — High –24 mA Output Current — Low 24 mA –40 1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. FACT DATA 5-4 25 MC74AC259 MC74ACT259 DC CHARACTERISTICS Symbol Parameter VCC (V) 74AC 74AC TA = +25°C TA = –40°C to +85°C Typ VIH VIL VOH 1.5 2.25 2.75 2.1 3.15 3.85 2.1 3.15 3.85 V VOUT = 0.1 V or VCC – 0.1 V Maximum Low Level Input Voltage 3.0 4.5 5.5 1.5 2.25 2.75 0.9 1.35 1.65 0.9 1.35 1.65 V VOUT = 0.1 V or VCC – 0.1 V Minimum High Level Output Voltage 3.0 4.5 5.5 2.99 4.49 5.49 2.9 4.4 5.4 2.9 4.4 5.4 V 2.56 3.86 4.86 2.46 3.76 4.76 0.1 0.1 0.1 0.1 0.1 0.1 3.0 4.5 5.5 0.36 0.36 0.36 0.44 0.44 0.44 5.5 ±0.1 Maximum Low Level Output Voltage Maximum Input Leakage Current IOLD †Minimum Dynamic Output Current ICC Guaranteed Limits 3.0 4.5 5.5 IIN IOHD Conditions Minimum High Level Input Voltage 3.0 4.5 5.5 VOL Unit Maximum Quiescent Supply Current 3.0 4.5 5.5 0.002 0.001 0.001 IOUT = –50 µA V *VIN = VIL or VIH –12 mA IOH –24 mA –24 mA IOUT = 50 µA V V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA ±1.0 µA VI = VCC, GND 5.5 75 mA VOLD = 1.65 V Max 5.5 –75 mA VOHD = 3.85 V Min 80 µA VIN = VCC or GND 5.5 8.0 * All outputs loaded; thresholds on input associated with output under test. † Maximum test duration 2.0 ms, one output loaded at a time. Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. FACT DATA 5-5 MC74AC259 MC74ACT259 AC CHARACTERISTICS (For Figures and Waveforms — See Section 3) Symbol Parameter VCC* (V) 74AC 74AC TA = +25°C CL = 50 pF TA = –40°C to +85°C CL = 50 pF Min Typ Max Min Max Unit Fig. No. tPLH Propagation Delay Dn to Qn 3.3 5.0 2.0 2.0 9.0 6.5 14.5 10.0 1.5 1.5 17.0 11.5 ns 3-5 tPHL Propagation Delay Dn to Qn 3.3 5.0 2.0 2.0 9.0 6.0 13.5 9.5 1.5 1.5 16.0 11.0 ns 3-5 tPLH Propagation Delay E to Qn 3.3 5.0 2.0 2.0 10.5 7.0 15.0 10.5 1.5 1.5 17.5 12.5 ns 3-6 tPHL Propagation Delay E to Qn 3.3 5.0 2.0 2.0 8.0 7.5 12.5 9.0 1.5 1.5 15.0 11.0 ns 3-6 tPLH Propagation Delay Address to Qn 3.3 5.0 2.0 2.0 12.0 8.0 19.0 13.0 1.5 1.5 22.5 15.5 ns 3-6 tPHL Propagation Delay Address to Qn 3.3 5.0 2.0 2.0 10.0 7.0 16.0 11.0 1.5 1.5 19.0 13.0 ns 3-6 tPHL Propagation Delay MR to Q 3.3 5.0 2.0 2.0 8.0 6.0 12.0 9.0 1.5 1.5 13.5 10.0 ns 3-7 Unit Fig. No. * Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. AC OPERATING REQUIREMENTS Symbol Parameter VCC* (V) Typ 74AC 74AC TA = +25°C CL = 50 pF TA = –40°C to +85°C CL = 50 pF Guaranteed Minimum ts Setup Time, HIGH or LOW Dn to E 3.3 5.0 3.5 2.5 4.5 3.5 ns 3-9 th Hold Time, HIGH or LOW Dn to E 3.3 5.0 2.5 2.0 2.5 2.0 ns 3-9 ts Setup Time Address to E 3.3 5.0 7.0 4.0 9.0 6.0 ns 3-6 th Hold Time Address to E 3.3 5.0 2.0 2.0 2.0 2.0 ns 3-6 tw Minimum Pulse Width MR 3.3 5.0 6.0 5.5 6.5 6.0 ns 3-6 tw Minimum Pulse Width E 3.3 5.0 6.5 5.5 7.0 6.0 ns 3-6 * Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. FACT DATA 5-6 MC74AC259 MC74ACT259 DC CHARACTERISTICS Symbol Parameter VCC (V) 74ACT 74ACT TA = +25°C TA = –40°C to +85°C Typ Guaranteed Limits Unit Conditions VIH Minimum High Level Input Voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 V VOUT = 0.1 V or VCC – 0.1 V VIL Maximum Low Level Input Voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 V VOUT = 0.1 V or VCC – 0.1 V VOH Minimum High Level Output Voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 V 3.86 4.86 3.76 4.76 0.1 0.1 0.1 0.1 4.5 5.5 0.36 0.36 0.44 0.44 V *VIN = VIL or VIH 24 mA IOL 24 mA ±0.1 ±1.0 µA VI = VCC, GND 1.5 mA VI = VCC – 2.1 V 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 0.001 0.001 V V IOUT = –50 µA *VIN = VIL or VIH –24 mA IOH –24 mA IOUT = 50 µA IIN Maximum Input Leakage Current 5.5 ∆ICCT Additional Max. ICC/Input 5.5 IOLD †Minimum Dynamic Output Current 5.5 75 mA VOLD = 1.65 V Max 5.5 –75 mA VOHD = 3.85 V Min 80 µA VIN = VCC or GND IOHD ICC Maximum Quiescent Supply Current 0.6 5.5 8.0 * All outputs loaded; thresholds on input associated with output under test. † Maximum test duration 2.0 ms, one output loaded at a time. FACT DATA 5-7 MC74AC259 MC74ACT259 AC CHARACTERISTICS (For Figures and Waveforms — See Section 3) Symbol Parameter VCC* (V) 74ACT 74ACT TA = +25°C CL = 50 pF TA = –40°C to +85°C CL = 50 pF Min Typ Max Min Max Unit Fig. No. tPLH Propagation Delay Dn to Qn 5.0 2.0 6.5 11.0 1.5 12.5 ns 3-5 tPHL Propagation Delay Dn or Qn 5.0 2.0 7.0 10.5 1.5 12.0 ns 3-5 tPLH Propagation Delay E to Qn 5.0 2.0 10.5 14.0 1.5 16.5 ns 3-6 tPHL Propagation Delay E or Qn 5.0 2.0 9.0 12.0 1.5 14.0 ns 3-6 tPLH Propagation Delay Address to Qn 5.0 2.0 8.0 11.5 1.5 13.5 ns 3-6 tPHL Propagation Delay Address to Qn 5.0 2.0 6.0 10.0 1.5 12.0 ns 3-6 tPHL Propagation Delay MR to Q 5.0 2.0 10.0 1.5 11.0 ns 3-7 Unit Fig. No. * Voltage Range 5.0 V is 5.0 V ±0.5 V. AC OPERATING REQUIREMENTS Symbol Parameter VCC* (V) 74ACT 74ACT TA = +25°C CL = 50 pF TA = –40°C to +85°C CL = 50 pF Typ Guaranteed Minimum ts Setup Time, HIGH or LOW Dn to E 5.0 3.0 4.0 ns 3-9 th Hold Time, HIGH or LOW Dn to E 5.0 2.5 2.5 ns 3-9 ts Setup Time Address to E 5.0 4.5 6.5 ns 3-6 th Hold Time Address to E 5.0 2.5 2.5 ns 3-6 tw Minimum Pulse Width MR 5.0 7.0 7.5 ns 3-6 tw Minimum Pulse Width E 5.0 7.0 7.5 ns 3-6 * Voltage Range 5.0 V is 5.0 V ±0.5 V. CAPACITANCE Symbol Parameter Value Typ Unit Test Conditions CIN Input Capacitance 4.5 pF VCC = 5.0 V CPD Power Dissipation Capacitance 50.0 pF VCC = 5.0 V FACT DATA 5-8 MC74AC259 MC74ACT259 OUTLINE DIMENSIONS N SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R –A– 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B F C DIM A B C D F G H J K L M S L S SEATING PLANE –T– K H G D M J 16 PL 0.25 (0.010) T A M M D SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE J –A– 16 1 P 8 PL 0.25 (0.010) 8 M B S G R K F X 45 _ C –T– SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 –B– INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 Motorola reserves the right to make changes without further notice to any products herein. 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Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 MFAX: [email protected] –TOUCHTONE (602) 244–6609 INTERNET: http://Design–NET.com HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ FACT DATA 5-9 *MC74AC259/D* MC74AC259/D