HCC4724B HCF4724B 8 BIT ADDRESSABLE LATCH . . .. . . . .. .. SERIAL DATA INPUT - ACTIVE PARALLEL OUTPUT STORAGE REGISTER CAPABILITY - MASTER CLEAR CAN FUNCTION AS DEMULTIPLEXER STANDARDIZED, SYMMETRICAL OUTPUT CHARACTER 100% TESTED FOR QUIESCENT CURRENT AT 20V MAXIMUM INPUT CURRENT OF 1µA AT 18V (full package-temperature range), 100nA AT 18V AND 25oC NOISE MARGIN (full package-temperature range) = 1V AT VDD = 5V, 2V AT VDD = 10V, 2.5V AT VDD = 15V 5V, 10V, AND 15V PARAMETRIC RATINGS MEETS ALL REQUIREMENTS OF JEDEC TENTATIVE STANDARD N. 13A, ” STANDARD SPECIFICATIONS FOR DESCRIPTION OF ’ B ’ SERIES CMOS DEVICES ” EY (Plastic Package) F (Ceramic Package) M1 (Micro Package) C1 (Chip Carrier) ORDER CODES : HCC4724BF HCF4724BM1 HCF4724BEY HCF4724BC1 APPLICATION MULTI-LINE DECODERS A/D CONVERTERS PIN CONNECTIONS DESCRIPTION The HCC/HCF4724B 8-bit addressable latch is a serial-input, parallel-output storage register that can perform a variety of functions. Data are inputted to a particular bit in the latch when that bit is addressed (by means of inputs A0, A1, A2) and when WRITE DISABLE is at low level. When WRITE DISABLE is high, data entry is inhibited however, all 8 outputs can be continuously read independent of WRITE DISABLE and address inputs. A master RESET input is available, which resets all bits to a logic ” 0 ” level when RESET and WRITE DISABLE are at a high level. When RESET is at a high level, and WRITE DISABLE is at a low level, the latch acts as a 1-of-8 demultiplexer ; the bit that is addressed has an active output which follows the data input, while all unaddressed bits are held to a logic ” 0 ” level. September 1988 1/14 HCC/HCF4724B FUNCTIONAL DIAGRAM ABSOLUTE MAXIMUM RATING Symbol VDD * Parameter Value Unit -0.5 to +20 -0.5 to +18 -0.5 to VDD + 0.5 V V V Vi Supply Voltage: HCC Types HCF Types Input Voltage II DC Input Current (any one input) ± 10 mA Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package Temperature Range 200 mW 100 mW Ptot Top Operating Temperature: HCC Types HCF Types -55 to +125 -40 to +85 o Tstg Storage Temperature -65 to +150 o o C C C Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress ratingonly and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability. * All voltage values are referred to VSS pin voltage. RECOMMENDED OPERATING CONDITIONS Symbol VDD VI Top 2/14 Parameter Supply Voltage: HCC Types HCF Types Input Voltage Operating Temperature: HCC Types HCF Types Value Unit 3 to 18 3 to 15 0 to VDD V V V -55 to +125 -40 to +85 o o C C HCC/HCF4724B LOGIC DIAGRAM Definition of WRITE DISABLE ON Time MODE SELECTION TYPE WD R Addressed Latch Unaddressed Latch A 0 0 Follows Data Hold Previous State B 0 1 Follows Data (Active High 8-Channel Demultiplexer) Reset to ”0” C D 1 1 0 1 Hold Previous State Reset to ”0” Reset to ”0” WD = WRITE DISABLE R= RESET 3/14 HCC/HCF4724B STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions) Test Conditios Symbol IL Parameter Quiescent Current HCC Types HCF Types V OH VOL Output High Voltage Output Low Voltage VI (V) VO (V) V IL IOH HCF Types IOL Output Sink Current HCC Types HCF Types IIH, IIL CI Input Leakage Current Input Capacitance 25 oC Min. Typ. Max. THIGH * Min. Max. 5 0.04 5 150 0/10 0/15 10 15 10 20 0.04 0.04 10 20 300 600 0/20 20 100 0.08 100 3000 0/5 5 20 0.04 20 150 0/10 10 40 0.04 40 300 0/15 0/5 80 0.04 80 <1 15 5 4.95 4.95 4.95 0/10 <1 10 9.95 9.95 9.95 0/15 5/0 <1 <1 15 5 14.95 10/0 <1 10 0.5/4.5 <1 <1 15 5 3.5 3.5 3.5 1/9 <1 10 7 7 7 1.5/13.5 4.5/0.5 <1 <1 15 5 11 9/1 <1 10 13.5/1.5 2.5 <1 0/5 15 5 -2 -1.6 -3.2 -1.15 0/5 4.6 5 -0.64 -0.51 -1 -0.36 0/10 0/15 9.5 13.5 10 15 -1.6 -4.2 -1.3 -3.4 -2.6 -6.8 -0.9 -2.4 0/5 2.5 5 -1.8 -1.6 -3.2 -1.3 0/5 0/10 4.6 9.5 5 10 -0.61 -1.5 -0.51 -1.3 -1 -2.6 -0.42 -1.1 0/15 13.5 15 -4 -3.4 -6.8 -2.8 0/5 0/10 0.4 0.5 5 10 0.64 1.6 0.51 1.3 1 2.6 0.36 0.9 0/15 1.5 15 4.2 3.4 6.8 2.4 0/5 0/10 0.4 0.5 5 10 0.61 1.5 0.51 1.3 1 2.6 0.42 1.1 0/15 1.5 15 4 3.4 6.8 2.8 0/18 Any Input 18 Input Low Voltage HCC Types TLOW * Min. Max. 5 Input High Voltage Output Drive Current |IO| VDD (µA) (V) 0/5 15/0 VIH Value Any Input 14.95 V 14.95 0.05 0.05 0.05 0.05 0.05 0.05 0.05 11 V 0.05 V 11 1.5 1.5 1.5 3 3 3 4 4 ±10-5 ±0.1 5 7.5 V 4 * TLOW = -55 oC for HCC device: -40 oC for HCF device. * THIGH = +125 oC for HCC device: +85 oC for HCF device. The Noise Margin for both ”1” and ”0” level is: 1V min. with VDD = 5 V, 2 V min. with VDD = 10 V, 2.5 V min. with VDD = 15 V 4/14 µA 600 0.05 ±0.1 Unit mA mA ±1 µA pF HCC/HCF4724B DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25 o C, C L = 50 pF, RL = 200 KΩ, o typical temperature coefficent for all VDD values is 03 %/ C, all input rise and fall times= 20 ns) Symbol Parameter tPLH tPHL Propagation Delay Time Data to Output tPLH tPHL Propagation Delay Time Write Disable to Output tPHL Propagation Delay Time Reset to Output tPLH tPHL Propagation Delay Time Address to Output tTLH tTHL Transition Time Any Output tW Minimum Pulse Width Data Minimum Pulse Width Address Minimum Pulse Width Reset ts tH CIN Minimum Setup Time Data to Write Disable Minimum Holf Time Data to Write Disable Input Capacitance Test Conditions VDD (V) (See Figure 1) 5 10 15 (See Figure 1) 5 10 15 (See Figure 1) 5 10 15 (See Figure 1) 5 10 15 5 10 15 (See Figure 1) 5 10 15 (See Figure 1) 5 10 15 (See Figure 1) 5 10 15 (See Figure 1) 5 10 15 (See Figure 1) 5 10 15 Any Input Min. Value Typ. 200 75 50 200 80 60 175 80 65 225 100 75 100 50 40 100 50 40 200 100 65 75 40 25 50 25 20 75 40 25 5 Max. 400 150 100 400 160 120 350 160 130 450 200 150 200 100 80 200 100 80 400 200 125 150 75 50 100 50 35 150 75 50 7.5 Unit ns ns ns ns ns ns ns ns ns ns pF 5/14 HCC/HCF4724B Figure 1: Master Timing Diagram TYPICAL APPLICATIONS A/D Converter 6/14 HCC/HCF4724B Multiple Selection Decoding - 4 x 4 Crosspoint Switch 1 of 6 Decoder/Demultiplexer 7/14 HCC/HCF4724B Typical Output Low (sink) Current Characteristics Minimum Output Low (sink) Current Characteristics Typical Output High (source) Current Characteristics Minimum Output High (source) Current Characteristics Typical Propagation Delay Time (data to Qn) vs Load Capacitance Typical Transition Time vs Load Capacitance 8/14 HCC/HCF4724B Typical Dynamic Power Dissipation vs Address Cycle Time TEST CIRCUITS Quiescent Device Current. Noise Immunity. Input Leakage Current. 9/14 HCC/HCF4724B Plastic DIP16 (0.25) MECHANICAL DATA mm DIM. MIN. a1 0.51 B 0.77 TYP. inch MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 10/14 HCC/HCF4724B Ceramic DIP16/1 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 20 0.787 B 7 0.276 D E 3.3 0.130 0.38 e3 0.015 17.78 0.700 F 2.29 2.79 0.090 0.110 G 0.4 0.55 0.016 0.022 H 1.17 1.52 0.046 0.060 L 0.22 0.31 0.009 0.012 M 0.51 1.27 0.020 0.050 N P Q 10.3 7.8 8.05 5.08 0.406 0.307 0.317 0.200 P053D 11/14 HCC/HCF4724B SO16 (Narrow) MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.004 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 E 5.8 10 0.385 6.2 0.228 0.393 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) P013H 12/14 HCC/HCF4724B PLCC20 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 9.78 10.03 0.385 0.395 B 8.89 9.04 0.350 0.356 D 4.2 4.57 0.165 0.180 d1 2.54 0.100 d2 0.56 0.022 E 7.37 8.38 0.290 0.330 e 1.27 0.050 e3 5.08 0.200 F 0.38 0.015 G 0.101 0.004 M 1.27 0.050 M1 1.14 0.045 P027A 13/14 HCC/HCF4724B Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 14/14