FAN2110 — TinyBuck™ 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Features Description Wide Input Voltage Range: 3V-24V The FAN2110 TinyBuck™ is a highly efficient, small footprint, constant frequency, 10A integrated synchronous Buck regulator. Fully Synchronous Operation with Integrated Schottky Diode on Low-Side MOSFET Boosts Efficiency Wide Output Voltage Range: 0.8V to 80% VIN 10A Output Current 1% Reference Accuracy Over Temperature Over 93% Peak Efficiency Programmable Frequency Operation: 200KHz to 600KHz Internal Bootstrap Diode Internal Soft-Start Power-Good Signal Starts up on Pre-Bias Outputs Accepts Ceramic Capacitors on Output External Compensation for Flexible Design Programmable Current Limit Under-Voltage, Over-Voltage, and Thermal Shutdown Protections 5x6mm, 25-Pin, 3-Pad MLP Package Applications Servers & Telecom Graphics Cards & Displays The FAN2110 contains both synchronous MOSFETs and a controller/driver with optimized interconnects in one package, which enables designers to solve highcurrent requirements in a small area with minimal external components. Integration helps to minimize critical inductances making component layout simpler and more efficient compared to discrete solutions. The FAN2110 provides for external loop compensation, programmable switching frequency, and current limit. These features allow design flexibility and optimization. High frequency operation allows for all ceramic solutions. The summing current mode modulator uses lossless current sensing for current feedback and over-current protection. Voltage feedforward helps operation over a wide input voltage range. Fairchild’s advanced BiCMOS power process, combined with low-RDS(ON) internal MOSFETs and a thermally efficient MLP package, provide the ability to dissipate high power in a small package. Output over-voltage, under-voltage, and thermal shutdown protections help protect the device from damage during fault conditions. FAN2110 also prevents pre-biased output discharge during startup in point-ofload applications. Computing Systems Related Application Notes Point-of-Load Regulation AN-8022 — TinyCalc™ Calculator Set-Top Boxes & Game Consoles Ordering Information Part Number Operating Temperature Range Package Eco Status Packing Method FAN2110MPX FAN2110EMPX -10°C to 85°C -40°C to 85°C Molded Leadless Package (MLP) 5x6mm Molded Leadless Package (MLP) 5x6mm Green Green Tape and Reel Tape and Reel For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 www.fairchildsemi.com FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator August 2009 Figure 1. Typical Application Diagram Block Diagram FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Typical Application Figure 2. Block Diagram © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 www.fairchildsemi.com 2 Figure 3. MLP 5x6mm Pin Configuration (Bottom View) Pin Definitions Pin # Name Description P1, 6-12 SW Switching Node. Junction of high-side and low-side MOSFETs. P2, 2-5 VIN Power Conversion Input Voltage. Connect to the main input power source. P3, 21-23 PGND Power Ground. Power return and Q2 source. 1 BOOT High-Side Drive BOOT Voltage. Connect through capacitor (CBOOT) to SW. The IC includes an internal synchronous bootstrap diode to recharge the capacitor on this pin to VCC when SW is LOW. 13 PGOOD 14 EN 15 VCC 16 AGND 17 ILIM Current Limit. A resistor (RILIM) from this pin to AGND can be used to program the currentlimit trip threshold lower than the internal default setting. 18 R(T) Oscillator Frequency. A resistor (RT) from this pin to AGND sets the PWM switching frequency. 19 FB Output Voltage Feedback. Connect through a resistor divider to the output voltage. 20 COMP Compensation. Error amplifier output. Connect the external compensation network between this pin and FB. 24 NC 25 RAMP Power-Good Flag. An open-drain output that pulls LOW when FB is outside the limits specified in electrical specs. PGOOD does not assert HIGH until the fault latch is enabled. ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the regulator after a latched fault condition. This input has an internal pull-up when the IC is functioning normally. When a latched fault occurs, EN is discharged by a current sink. Input Bias Supply for IC. The IC’s logic and analog circuitry are powered from this pin. This pin should be decoupled to AGND through a > 2.2µF X5R / X7R capacitor. Analog Ground. The signal ground for the IC. All internal control voltages are referred to this pin. Tie this pin to the ground island/plane through the lowest impedance connection. FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Pin Configuration No Connect. This pin is not used. Ramp Amplitude. A resistor (RRAMP) connected from this pin to VIN sets the ramp amplitude and provides voltage feedforward functionality. © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Parameter Conditions Min. VIN to PGND VCC to AGND AGND=PGND SW to PGND Continuous ESD 28 V 6 V V -0.5 6.0 V -0.5 24.0 V -5 30 V -0.3 VCC+0.3 V Transient (t < 20ns, f < 600KHz) All other pins Unit 35 BOOT to PGND BOOT to SW Max. Human Body Model, JEDEC JESD22-A114 2.0 Charged Device Model, JEDEC JESD22-C101 2.5 KV Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Conditions Min. Typ. Max. Unit 5.0 5.5 V 24 V VCC Bias Voltage VCC to AGND 4.5 VIN Supply Voltage VIN to PGND 3 TA Ambient Temperature TJ Junction Temperature fSW Switching Frequency FAN2110MPX -10 +85 °C FAN2110EMPX -40 +85 °C +125 °C 600 kHz Max. Unit +150 °C 200 Thermal Information Symbol TSTG TL θJC θJ-PCB PD Parameter Min. Storage Temperature Typ. -65 Lead Soldering Temperature, 10 Seconds +300 Thermal Resistance: Junction-to-Case 4 °C/W P2 (Q1) 7 °C/W P3 4 °C/W Thermal Resistance: Junction-to-Mounting Surface (1) Power Dissipation, TA=25°C °C P1 (Q2) (1) 35 FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Absolute Maximum Ratings °C/W 2.8 W Note: 1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 35. Actual results are dependent on mounting method and surface related to the design. © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 www.fairchildsemi.com 4 Electrical specifications are the result of using the circuit shown in Figure 1 with VIN=12V, unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Unit SW=Open, VFB=0.7V, VCC=5V, fSW =600KHz 8 12 mA Shutdown: EN=0, VCC=5V 7 10 µA 4.3 4.5 V Power Supplies ICC VUVLO VCC Current Rising VCC VCC UVLO Threshold 4.1 Hysteresis 300 mV Oscillator fSW Frequency RT=50KΩ to GND 255 300 345 KHz RT=24KΩ to GND 540 600 660 KHz 50 65 ns (2) tONmin Minimum On-Time VRAMP Ramp Amplitude, Peak-to-Peak tOFFmin Minimum Off-Time 16VIN, 1.8VOUT, RT=30KΩ, RRAMP=200KΩ 0.53 (2) V 100 150 ns Reference VFB Reference Voltage (see Figure 4 for Temperature Coefficient) FAN2110MPX, 25°C 794 800 806 mV FAN2110EMPX, 25°C 795 800 805 mV 80 85 12 15 Error Amplifier G DC Gain (2) GBW Gain Bandwidth Product VCOMP Output Voltage ISINK ISOURCE IBIAS (2) VCC=5V (2) 0.4 dB MHz 3.2 V Output Current, Sourcing VCC=5V, VCOMP=2.2V 1.5 2.2 mA Output Current, Sinking VCC=5V, VCOMP=1.2V 0.8 1.2 mA FB Bias Current VFB=0.8V, 25°C -850 -650 -450 nA RILIM=182 KΩ,, 25°C, fSW =500KHz, VOUT=1.5V, RRAMP=243KΩ, (3) 16 Consecutive Clock Cycles 12 14 16 A VCC=5V, 25°C -11 -10 -9 µA Protection and Shutdown ILIM Current Limit (see Circuit (2) Description) IILIM ILIM Current TTSD Over-Temperature Shutdown (2) (2) +155 Internal IC Temperature °C THYS Over-Temperature Hysteresis VOVP Over-Voltage Threshold 2 Consecutive Clock Cycles +30 VUVSD Under-Voltage Shutdown 16 Consecutive Clock Cycles VFLT Fault Discharge Threshold Measured at FB Pin 250 mV VFLT_HYS Fault Discharge Hysteresis Measured at FB Pin (VFB ~500mV) 250 mV 5.3 ms 6.7 ms (3) (3) °C 110 115 121 %VOUT 68 73 78 %VOUT FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Electrical Specifications Soft-Start tSS tEN VOUT to Regulation (T0.8) Fault Enable/SSOK (T1.0) (2) fSW =500KHz Continued on the following page… © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 www.fairchildsemi.com 5 Electrical specifications are the result of using the circuit shown in Figure 1 with VIN=12V, unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Unit V Control Functions VEN EN Threshold, Rising VCC=5V 1.35 EN Hysteresis VCC=5V 250 mV REN EN Pull-Up Resistance VCC=5V 800 KΩ IEN_DISC EN Discharge Current Auto-Restart Mode, VCC=5V 1 µA VEN_HYS RFBok FB OK Drive Resistance VPGTH_LO PGOOD LOW Threshold VPGTH_UP 800 FB < VREF, 2 Consecutive Clock (3) Cycles -14 FB > VREF, 2 Consecutive Clock (3) Cycles +7 VPG_LO PGOOD Output Low IOUT < 2mA IPG_LK PGOOD Leakage Current VPGOOD=5V Notes: 2. Specifications guaranteed by design and characterization; not production tested. 3. Delay times are not tested in production. Guaranteed by design. © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 2.00 -11 Ω -8 %VREF +10 0.2 +13.5 0.4 V 1.0 µA FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Electrical Specifications (Continued) www.fairchildsemi.com 6 1.20 1.005 1.10 I FB V FB 1.010 1.000 0.995 1.00 0.90 0.990 0.80 -50 0 50 100 150 -50 0 Temperature (oC) Figure 4. Reference Voltage (VFB) vs. Temperature, Normalized 150 1.02 1200 1.01 Frequency Frequency (KHz) 100 Figure 5. Reference Bias Current (IFB) vs. Temperature, Normalized 1500 900 600 600KHz 1.00 300KHz 0.99 300 0.98 0 0 20 40 60 80 100 120 -50 140 0 RT (KΩ) 100 150 Temperature ( C) Figure 7. 1.04 1.2 1.02 I ILIM 1.4 Q1 ~0.32%/°C 1 50 o Figure 6. Frequency vs. RT RDS 50 Temperature (oC) Frequency vs. Temperature, Normalized 1.00 Q2 ~0.35%/°C 0.98 0.8 0.96 0.6 -50 0 50 100 150 -50 50 100 150 o Temperature ( C) Temperature (°C) Figure 9. Figure 8. RDS vs. Temperature, Normalized (VCC=VGS=5V), Figure 1 © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 0 FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Typical Characteristics ILIM Current (IILIM) vs. Temperature, Normalized www.fairchildsemi.com 7 FAN2110 Figure 10. Application Circuit: 1.5VOUT, 10A, 500KHz (10V-20VIN) FAN2110 FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Application Circuits Figure 11. Application Circuit: 1.5VOUT, 10A, 500KHz (3.3V-5.5VIN) © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 www.fairchildsemi.com 8 Typical operating characteristics using the circuit in Figure 10. VIN=12V, VCC=5V, TA=25°C, unless otherwise specified. FAN2110_1.5V_500Khz FAN2110_3.3V_500Khz 100 100 95 95 Efficiency (%) Efficiency (%) 90 85 80 90 85 80 VIN = 10V VIN = 10V VIN = 12V VIN = 12V 75 75 VIN = 16V VIN = 16V VIN = 20V VIN = 20V 70 70 0 2 4 6 8 10 0 2 Load Curre nt (Am ps) Figure 12. 4 6 8 10 Load Current (Amps) 1.5VOUT Efficiency, 500KHz Figure 13. 3.3VOUT Efficiency, 500KHz FAN2110_1.5V_300Khz (4) FAN2110_3.3V_300Khz 100 100 95 95 Efficiency (%) Efficiency (%) 90 85 80 90 85 80 VIN = 10V VIN = 10V VIN = 12V 75 VIN = 12V 75 VIN = 16V VIN = 16V VIN = 20V VIN = 20V 70 70 0 2 4 6 8 0 10 2 6 8 10 Load Current (Amps) Load Current (Am ps) Figure 14. 1.5VOUT Efficiency, 300KHz Figure 15. 3.3VOUT Efficiency, 300KHz FAN2110_2.5V_600Khz (4) FAN2110_1.5V_500K(3.3-5.5V) 95 100 90 Efficiency (%) 95 Efficiency (%) 4 90 85 80 VIN = 10V VIN = 12V 75 85 80 VIN=3.5V 75 VIN = 16V VIN=4.5V VIN = 20V 70 VIN=5.5V 70 0 2 4 6 8 10 0 Load Current (Amps) Figure 16. 2.5VOUT Efficiency ,600KHz FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Typical Performance Characteristics (4) 2 4 6 Load Current (Amps) 8 10 Figure 17. 1.5VOUT Efficiency, 500KHz (VIN=3.3V to 5V), Figure 11 Note: 4. Circuit values for this configuration change in Figure 10. © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 www.fairchildsemi.com 9 Typical operating characteristics using the circuit in Figure 10. VIN=12V, VCC=5V, TA=25°C unless otherwise specified. Package Power Dissipation at various Vout(s) Fsw = 500Khz Peak HS & LS Mosfet Tempr for 1.5V Output (Measured on Demo Board) 80 3 Power Dissipation (Watts) Tem peratures(Deg C) 70 60 50 40 30 VIN=10V_HS 20 VIN=10V_LS 10 VIN=20V_HS 2.5 2 1.5 1 Vout = 1.5V 0.5 0 0 1 2 3 4 5 6 7 8 9 Vout = 1.8V Vout = 3.3V VIN=20V_LS 0 10 2 4 Load Current (A) Figure 18. Peak MOSFET Temperatures, Figure 10 Figure 19. 10 Load Regulation 0.05 % Regulation (Compared to Voltage at No load) 0.02 % Regulation (Compared to Voltage at 12V) 8 Device Dissipation Over VOUT vs. Load Line Regulation Data 0.01 0 5 10 15 20 25 -0.01 -0.02 -0.03 No Load 1A Load -0.04 0 0 2 4 6 8 10 -0.05 -0.1 -0.15 -0.2 VIN=10V VIN=20V -0.25 Input Voltage (Volts) Load Current (Amps) Figure 20. 1.5VOUT Line Regulation Figure 21. Peak HS & LS Mosfet Tempr for 3.3V Output (Measured on Demo Board) 1.5VOUT Load Regulation Safe Operating Area curves for 70 Deg Temperature rise VIN = 20V, Natural Convection 100 12 10 L oad Cu rren t (Amp s) 80 Temperatures(Deg C) 6 Load Current (Amps) 60 40 VIN=10V_HS VIN=10V_LS 20 8 6 4 300K 2 500K VIN=20V_HS 600K VIN=20V_LS 0 0 1 2 3 4 5 6 7 Load Current (Amps) 8 9 0 10 2 4 6 8 10 12 FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Typical Performance Characteristics (Continued) 14 Output Voltage (Volts) (5) Figure 22. Peak MOSFET Temperatures, 3.3V Output Figure 23. Typical 20VIN Safe Operation Area (SOA), 70°C Ambient Temperature, Natural Convection Note: 5. Circuit values for this configuration change in Figure 10. © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 www.fairchildsemi.com 10 Typical operating characteristics using the circuit in Figure 10. VIN=12V, VCC=5V, TA=25°C unless otherwise specified. VOUT VOUT VSW EN PGOOD PGOOD Figure 24. Startup, 10A Load Figure 25. Startup with 1.0V Pre-Bias on VOUT VOUT, 50mV/div VOUT VSW, 10V/Div EN PGOOD Figure 26. Shutdown, 10A Resistive Load Figure 27. VOUT Ripple and SW Voltage, 10A Load VOUT, 200mV/div IOUT, 5A/Div IOUT, 5A/Div EN, 2V/Div Figure 28. Transient Response, 0-8A Load, 5A / µs Slew Rate © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Typical Performance Characteristics (Continued) Figure 29. Restart on Short Circuit (Fault) www.fairchildsemi.com 11 PWM Generation EN Refer to Figure 2 for the PWM control mechanism. FAN2110 uses the summing-mode method of control to generate the PWM pulses. An amplified current-sense signal is summed with an internally generated ramp and the combined signal is compared with the output of the error amplifier to generate the pulse width to drive the high-side MOSFET. Sensed current from the previous cycle is used to modulate the output of the summing block. The output of the summing block is also compared against a voltage threshold set by the RLIM resistor to limit the inductor current on a cycle-by-cycle basis. RRAMP resistor helps set the charging current for the internal ramp and provides input voltage feedforward function. The controller facilitates external compensation for enhanced flexibility. 1.35V 2400 CLKs 0.8V FB Fault Latch Enable 1.0V 0.8V SS 3200 CLKs T0.8 4000 CLKs Initialization T1.0 Once VCC exceeds the UVLO threshold and EN is HIGH, the IC checks for a shorted FB pin before releasing the internal soft-start ramp (SS). Figure 31. Soft-Start Timing Diagram If the parallel combination of R1 and RBIAS is ≤ 1KΩ, the internal SS ramp is not released and the regulator does not start. VCC UVLO or toggling the EN pin discharges the internal SS and resets the IC. In applications where external EN signal is used, VIN and VCC should be established before the EN signal comes up to prevent skipping the soft-start function. Enable Startup on Pre-Bias FAN2110 has an internal pull-up to the enable (EN) pin so that the IC is enabled once VCC exceeds the UVLO threshold. Connecting a small capacitor across EN and AGND delays the rate of voltage rise on the EN pin. The EN pin also serves for the restart whenever a fault occurs (refer to the Auto-Restart section). If the regulator is enabled externally, the external EN signal should go HIGH only after VCC is established. For applications where such sequencing is required, FAN2110 can be enabled (after the VCC comes up) with external control, as shown in Figure 30. The regulator does not allow the low-side MOSFET to operate in full synchronous mode until SS reaches 95% of VREF (~0.76V). This enables the regulator to startup on a pre-biased output and ensures that pre-biased outputs are not discharged during the soft-start cycle. Protections The converter output is monitored and protected against extreme overload, short-circuit, over-voltage, under-voltage, and over-temperature conditions. Under-Voltage Shutdown If voltage on the FB pin remains below the undervoltage threshold for 16 consecutive clock cycles, the fault latch is set and the converter shuts down. This protection is not active until the internal SS ramp reaches 1.0V during soft-start. Over-Voltage Protection Figure 30. Enabling with External Control If voltage on the FB pin exceeds 115% of VREF for two consecutive clock cycles, the fault latch is set and shutdown occurs. Soft-Start Once internal SS ramp has charged to 0.8V (T0.8), the output voltage is in regulation. Until SS ramp reaches 1.0V (T1.0), the fault latch is inhibited. FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Circuit Description A shorted high-side MOSFET condition is detected when SW voltage exceeds ~0.7V while the low-side MOSFET is fully enhanced. The fault latch is set immediately upon detection. To avoid skipping the soft-start cycle, it is necessary to apply VIN before VCC reaches its UVLO threshold. Normal sequence for powering up would be VINÆVCCÆEN. The OV/UV fault protection circuits above are active all the time, including during soft-start. Soft-start time is a function of oscillator frequency. © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 www.fairchildsemi.com 12 The chip incorporates an over-temperature protection circuit that sets the fault latch when a die temperature of about 150°C is reached. The IC restarts when the die temperature falls below 125°C. Auto-Restart After a fault, EN pin is discharged by a 1µA current sink to a 1.1V threshold before the internal 800KΩ pull-up is restored. A new soft-start cycle begins when EN charges above 1.35V. Depending on the external circuit, the FAN2110 can be configured to remain latched-off or to automatically restart after a fault. Table 1. Fault / Restart Configurations EN Pin Controller / Restart State Figure 32. OFF (Disabled) No Restart – Latched OFF Pull-up to VCC with 100K (After VCC Comes Up) Open Immediate Restart After Fault New Soft-Start Cycle After: Cap. to GND tDELAY (ms)=3.9 • C(nf) Enable Control with Latch Option Pull to GND Power-Good (PGOOD) Signal PGOOD is an open-drain output that asserts LOW when VOUT is out of regulation, as measured at the FB pin. Thresholds are specified in the Electrical Specifications section. PGOOD does not assert HIGH until the fault latch is enabled (T1.0) (see Figure 31). When EN is left open, restart is immediate. © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator If auto-restart is not desired, tie the EN pin to the VCC pin or pull it HIGH after VCC comes up with a logic gate to keep the 1µA current sink from discharging EN to 1.1V. Figure 32 shows one method to pull up EN to VCC for a latch configuration. Over-Temperature Protection (OTP) www.fairchildsemi.com 13 Bias Supply L= The FAN2110 requires a 5V supply rail to bias the IC and provide gate-drive energy. Connect a ≥ 2.2µf X5R or X7R decoupling capacitor between VCC and AGND. VCC − 5 + 0.013 ) • (f − 128)] 227 (4) where f is the oscillator frequency. Since VCC is used to drive the internal MOSFET gates, supply current is frequency and voltage dependent. Approximate VCC current (ICC) is calculated by: ICC ( mA ) = 4.58 + [( VO UT ) Vin ΔIL • f VOUT • (1 - Setting the Ramp Resistor Value (1) RRAMP resistor plays a critical role in the design by providing charging current to the internal ramp capacitor and also serving as a means to provide input voltage feedforward. where frequency (f) is expressed in KHz. RRAMP is calculated by the following formula: Setting the Output Voltage R RAMP ( KΩ ) = The output voltage of the regulator can be set from 0.8V to 80% of VIN by an external resistor divider (R1 and RBIAS in Figure 1). For output voltages >3.3V, output current rating may need to be de-rated depending on the ambient temperature, power dissipated in the package and the PCB layout. (Refer to Thermal Information table on page 4, Figure 22, and Figure 23.) In all applications, current through the RRAMP pin must be greater than 10µA from the equation below for proper operation: (2) VIN − 1.8 ≥ 10 μA RRAMP + 2 If R1 is open (see Figure 1), the output voltage is not regulated and a latched fault occurs after the SS is complete (T1.0). Setting the Current Limit Setting the Clock Frequency There are two levels of current-limit thresholds. The first level of protection is through an internal default limit set at the factory to limit output current beyond normal usage levels. The second level of protection is set externally at the ILIM pin by connecting a resistor (RILIM) between ILIM and AGND. Current-limit protection is enabled whenever the lower of the two thresholds is reached (see Figure 33). FAN2110 uses its internal lowside MOSFET for current-sensing. The current-limit threshold voltage (VILIM) is compared to a scaled version of voltage drop across the low-side MOSFET sampled at the end of each PWM off-time/cycle. The internal default threshold (with ILIM open) is temperature compensated. Oscillator frequency is determined by an external resistor, RT, connected between the RT pin and AGND. Resistance is calculated by: (3) where RT is in KΩ and frequency (f) is in KHz. The regulator cannot start if RT is left open. Calculating the Inductor Value Typically the inductor value is chosen based on ripple current (ΔIL), which is chosen between 10 to 35% of the maximum DC load. Regulator designs that require fast transient response use a higher ripple-current setting, while regulator designs that require higher efficiency keep ripple current on the low side and operate at a lower switching frequency. The inductor value is calculated by the following formula: © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 (6) If the calculated RRAMP values in Equation (5) result in a current less than 10µA, use the RRAMP value that satisfies Equation (6). In applications with large Input ripple voltage, the RRAMP resistor should be adequately decoupled from the input voltage to minimize ripple on the ramp pin. For example, see Figure 11. If the parallel combination of R1 and RBIAS is ≤ 1KΩ, the internal SS ramp is not released and the regulator does not start. (10 6 / f ) − 135 65 (5) For wide input operation, first calculate RRAMP for the minimum and maximum input voltage conditions and use larger of the two values calculated. Connect RBIAS between FB and AGND. RT (KΩ ) = −2 where frequency (f) is expressed in KHz. The external resistor divider is calculated using: − 0.8V V 0.8V = OUT + 650nA RBIAS R1 (VIN − 1.8 ) • VOUT (31 − 2.05 • IOUT ) • VIN • f • 10 − 6 FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Application Information www.fairchildsemi.com 14 Since the FAN2110 employs summing current-mode architecture, type-2 compensation can be used for many applications. For applications that require wide loop bandwidth and/or use very low-ESR output capacitors, type-3 compensation may be required. The ILIM pin can source a 10µA current that can be used to establish a lower, temperature–dependent, current-limit threshold by connecting an external resistor (RILIM) to AGND. RILIM can be approximated with the equation: RILIM (KΩ) = 95 + 6.1• IOUT + where: IOUT = VOUT = VIN = RRAMP = f = (VIN − 1.8) • VOUT • 3.33 • 10 (RRAMP + 2) • VIN • f RRAMP also provides feedforward compensation for changes in VIN. With a fixed RRAMP value, the modulator gain increases as VIN is reduced, which could make it difficult to compensate the loop. For low-input-voltagerange designs (3V to 8V), RRAMP and the compensation component values will be different compared to designs with VIN between 8V and 24V. 6 (7) Full load current in Amps; Set output voltage; Input voltage; Ramp resistor used in KΩ; and Selected switching frequency in KHz. Recommended PCB Layout Good PCB layout and careful attention to temperature rise is essential for reliable operation of the regulator. Four-layer PCB with two-ounce copper on the top and bottom side and thermal vias connecting the layers is recommended. Keep power traces wide and short to minimize losses and ringing. Do not connect AGND to PGND below the IC. Connect the AGND pin to PGND at the output OR to the PGND plane. After 16 consecutive, pulse-by-pulse, current-limit cycles, the fault latch is set and the regulator shuts down. Cycling VCC or EN restores operation after a normal soft-start cycle (refer to Auto-Restart section). The over-current protection fault latch is active during the soft-start cycle. Use a 1% resistor for RILIM. Always use an external resistor RILIM to set the current limit at the desired level. When RILIM is not connected, the IC’s internal default current limit is fairly high. This could lead to operation at high load currents, causing overheating of the regulator. For a given RILIM and RRAMP setting, the current limit point varies slightly in an inverse relationship with respect to input voltage (VIN). SW VIN GND GND Loop Compensation The loop is compensated using a feedback network around the error amplifier. Figure 34 shows a complete type-3 compensation network. For type-2 compensation, eliminate R3 and C3. VOUT Figure 35. Recommended PCB Layout © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Figure 34. Compensation Network Figure 33. ILIM Network www.fairchildsemi.com 15 2X TOP VIEW 2X RECOMMENDED LAND PATTERN ALL VALUES TYPICAL EXCEPT WHERE NOTED SIDE VIEW SEATING PLANE OPTIONAL LEAD DESIGN (LEADS# 1, 24 & 25 ONLY) SCALE: 1.5X A) DIMENSIONS ARE IN MILLIMETERS. B) DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) DESIGN BASED ON JEDEC MO-220 VARIATION WJHC E) TERMINALS ARE SYMMETRICAL AROUND THE X & Y AXIS EXCEPT WHERE DEPOPULATED. F) DRAWING FILENAME: MKT-MLP25AREV3 BOTTOM VIEW Figure 36. 5x6mm Molded Leadless Package (MLP) FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator Physical Dimensions Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2 www.fairchildsemi.com 16 FAN2110 — TinyBuck™, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator 17 www.fairchildsemi.com © 2008 Fairchild Semiconductor Corporation FAN2110 • Rev. 1.0.2