Motion-SPM FSB50825AS TM Smart Power Module (SPM®) Features Applications • 250V RDS(on) =0.45W(max) 3-phase FRFET inverter including high voltage integrated circuit (HVIC) • Three-phase inverter driver for small power ac motor drives General Description • 3 divided negative dc-link terminals for inverter current sensing applications FSB50825AS is a tiny smart power module (SPM®) based on FRFET technology as a compact inverter solution for small power motor drive applications such as fan motors and water suppliers. It is composed of 6 fast-recovery MOSFET (FRFET), and 3 half-bridge HVICs for FRFET gate driving. FSB50825AS provides low electromagnetic interference (EMI) characteristics with optimized switching speed. Moreover, since it employs FRFET as a power switch, it has much better ruggedness and larger safe operation area (SOA) than that of an IGBT-based power module or one-chip solution. The package is optimized for the thermal performance and compactness for the use in the built-in motor application and any other application where the assembly space is concerned. FSB50825AS is the best solution for the compact inverter providing the energy efficiency, compactness, and low electromagnetic interference. • HVIC for gate driving and undervoltage protection • Optimized for low electromagnetic interference • Isolation voltage rating of 1500Vrms for 1min. • HVIC temperature sensing • Embedded bootstrap diode in the package • Moisture Sensitive Level (MSL) 3 • RoHS compliant ©2012 Fairchild Semiconductor Corporation FSB50825AS Rev. A 1 www.fairchildsemi.com FSB50825AS Smart Power Module (SPM®) July 2012 Inverter Part (Each FRFET Unless Otherwise Specified) Symbol Parameter Conditions Rating Units 250 V VPN DC Link Input Voltage, Drain-source Voltage of each FRFET *ID25 Each FRFET Drain Current, Continuous TC = 25°C 3.6 A *ID80 Each FRFET Drain Current, Continuous TC = 80°C 2.7 A *IDP Each FRFET Drain Current, Peak TC = 25°C, PW < 100ms 9 A *IDRMS Each FRFET Drain Current, Rms TC = 80°C, FPWM < 20KHz Maximum Power Dissipation TC = 25°C, For Each FRFET *P D 1.9 Arms 14.2 W Rating Units Control Part (Each HVIC Unless Otherwise Specified) Symbol Parameter Conditions VCC Control Supply Voltage Applied between VCC and COM 20 V VBS High-side Bias Voltage Applied between VB and V S 20 V VIN Input Signal Voltage Applied between IN and COM -0.3 ~ VCC+0.3 V Rating Units 250 V Bootstrap Diode Part (Each Bootstrap diode Unless Otherwise Specified) Symbol VRRMB Parameter Conditions Maixmum Repetitive Reverse Voltage * IFB Forward Current TC = 25°C 0.5 A * IFPB Forward Current (Peak) TC = 25°C, Under 1ms Pulse Width 1.5 A Conditions Rating Units Each FRFET under inverter operating condition (Note 1) 8.8 °C/W Conditions Rating Units Operating Junction Temperature -40 ~ 150 °C TSTG Storage Temperature -40 ~ 125 °C VISO Isolation Voltage 1500 Vrms Thermal Resistance Symbol RqJC Parameter Junction to Case Thermal Resistance Total System Symbol TJ Parameter 60Hz, Sinusoidal, 1 minute, Connection pins to heatsink Note: 1. For the measurement point of case temperature TC, please refer to Figure 4. 2. Marking “ * “ is calculation value or design factor. 2 FSB50825AS Rev. A www.fairchildsemi.com FSB50825AS Smart Power Module (SPM®) Absolute Maximum Ratings FSB50825AS Smart Power Module (SPM®) Pin descriptions Pin Number Pin Name Pin Description 1 COM IC Common Supply Ground 2 VB(U) Bias Voltage for U Phase High Side FRFET Driving 3 VCC(U) Bias Voltage for U Phase IC and Low Side FRFET Driving 4 IN(UH) Signal Input for U Phase High-side 5 IN(UL) Signal Input for U Phase Low-side 6 N.C 7 VB(V) N.C 8 VCC(V) Bias Voltage for V Phase IC and Low Side FRFET Driving 9 IN (VH) Signal Input for V Phase High-side 10 IN (VL) Signal Input for V Phase Low-side 11 Vts Bias Voltage for V Phase High Side FRFET Driving Output for HVIC temperature sensing 12 VB(W) 13 VCC(W) Bias Voltage for W Phase IC and Low Side FRFET Driving 14 IN(WH) Signal Input for W Phase High-side 15 IN(WL) Signal Input for W Phase Low-side 16 N.C 17 P 18 U, VS(U) 19 NU Negative DC–Link Input for U Phase 20 NV Negative DC–Link Input for V Phase 21 V, VS(V) 22 NW 23 W, VS(W) Bias Voltage for W Phase High Side FRFET Driving N.C Positive DC–Link Input Output for U Phase & Bias Voltage Ground for High Side FRFET Driving Output for V Phase & Bias Voltage Ground for High Side FRFET Driving Negative DC–Link Input for W Phase Output for W Phase & Bias Voltage Ground for High Side FRFET Driving (1) COM (2) VB(U) (17) P (3) V CC(U) VCC VB (4) IN (UH) HIN HO (5) IN (UL) LIN VS COM LO (18) U, V S(U) (6) N.C (19) N U (7) VB(V) (8) VCC(V) VCC VB (9) IN (VH) HIN HO LIN VS COM LO (10) IN (VL) (11) Vts (20) N V (21) V, VS(V) Vts (12) V B(W) (13) V CC(W) VCC VB (14) IN (WH) HIN HO (15) IN (WL) LIN VS COM LO (22) N W (23) W, V S(W) (16) N.C Note: Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside SPM®. External connections should be made as indicated in Figure 3 Figure 1. Pin Configuration and Internal Block Diagram (Bottom View) 3 FSB50825AS Rev. A www.fairchildsemi.com Inverter Part (Each FRFET Unless Otherwise Specified) Symbol BVDSS Parameter Conditions Drain-Source Breakdown VIN= 0V, ID = 1mA (Note 1) Voltage Min Typ Max Units 250 - - V IDSS Zero Gate Voltage Drain Current VIN= 0V, VDS = 250V - - 1 mA RDS(on) Static Drain-Source On-Resistance VCC = VBS = 15V, VIN = 5V, ID = 2A - 0.33 0.45 W VSD Drain-Source Diode Forward Voltage VCC = VBS = 15V, VIN = 0V, ID = -2A - - 1.2 V - 950 - ns - 520 - ns Switching Times VPN = 150V, VCC = VBS = 15V, ID = 2A VIN = 0V « 5V, Inductive load L=3mH High- and low-side FRFET switching (Note 2) - 140 - ns - 100 - mJ - 10 - mJ tON tOFF trr EON EOFF RBSOA V = 200V, VCC = V BS = 15V, ID = IDP, V DS=BVDSS, Reverse-bias Safe Oper- PN TJ = 150°C ating Area High- and low-side FRFET switching (Note 3) Full Square Control Part (Each HVIC Unless Otherwise Specified) Symbol IQCC Parameter Quiescent VCC Current Conditions Min Typ Max Units VCC=15V, VIN=0V Applied between VCC and COM - - 200 mA Applied between VB(U)-U, VB(V)-V, VB(W)-W - - 100 mA IQBS Quiescent VBS Current VBS=15V, VIN=0V UVCCD Low-side Undervoltage Protection (Figure 8) VCC Undervoltage Protection Detection Level 7.4 8.0 9.4 V VCC Undervoltage Protection Reset Level 8.0 8.9 9.8 V High-side Undervoltage Protection (Figure 9) VBS Undervoltage Protection Detection Level 7.4 8.0 9.4 V VBS Undervoltage Protection Reset Level 8.0 8.9 9.8 V 600 790 980 mV - - 2.9 V 0.8 - - V UVCCR UVBSD UVBSR Vts HVIC Temperature sensing voltage output VCC=15V, THVIC=25°C(Note 4) VIH ON Threshold Voltage Logic High Level VIL OFF Threshold Voltage Logic Low Level Applied between IN and COM Bootstrap Diode Part (Each Bootstrap diode Unless Otherwise Specified) Symbol Parameter Conditions Min Typ Max Units VFB Forward Voltage IF = 0.1A, TC = 25°C(Note 5) - 2.5 - V trrB Reverse Recovery Time IF = 0.1A, TC = 25°C - 80 - ns Note: 1. BVDSS is the absolute maximum voltage rating between drain and source terminal of each FRFET inside SPM®. VPN should be sufficiently less than this value considering the effect of the stray inductance so that VDS should not exceed BVDSS in any case. 2. tON and tOFF include the propagation delay time of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the field applcations due to the effect of different printed circuit boards and wirings. Please see Figure 6 for the switching time definition with the switching test circuit of Figure 7. 3. The peak current and voltage of each FRFET during the switching operation should be included in the safe operating area (SOA). Please see Figure 7 for the RBSOA test circuit that is same as the switching test circuit. 4. Vts is only for sensing temperature of module and cannot shutdown MOSFETs automatically. 5. Built in bootstrap diode includes around 15 Ω resistance characteristic. Please refer to Figure 2. 4 FSB50825AS Rev. A www.fairchildsemi.com FSB50825AS Smart Power Module (SPM®) Electrical Characteristics (TJ = 25°C, VCC=VBS=15V Unless Otherwise Specified) Symbol Parameter Value Conditions Min. Typ. Units Max. VPN Supply Voltage Applied between P and N - 150 200 V VCC Control Supply Voltage Applied between VCC and COM 13.5 15 16.5 V VBS High-side Bias Voltage Applied between VB and VS 13.5 15 16.5 V 3.0 - VCC V 0 - 0.6 V 1.0 - - ms - 15 - kHz VIN(ON) Input ON Threshold Voltage VIN(OFF) Input OFF Threshold Voltage Applied between IN and COM tdead Blanking Time for Preventing VCC =VBS=13.5 ~ 16.5V, TJ £ 150°C Arm-short fPWM PWM Switching Frequency TJ £ 150°C Package Marking & Ordering Information Device Marking Device Package Reel Size Packing Type Quantity FSB50825AS FSB50825AS SPM23-GD - - 15 Built in Bootstrap Diode VF-IF Characteristic 1.0 0.9 0.8 0.7 IF [A] 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 1 2 3 4 5 6 7 8 VF [V] 9 10 11 12 13 14 15 Tc=25°C Figure 2. Built in Bootstrap Diode Characteristics(typ.) 5 FSB50825AS Rev. A www.fairchildsemi.com FSB50825AS Smart Power Module (SPM®) Recommended Operating Condition 15V Line C1 * Example circuit : V phase VDC P Micom R5 C5 VCC VB HIN HO LIN VS COM LO V Vts C2 10mF C4 HIN LIN Output Note Inverter Output 0 0 Z Both FRFET Off 0 1 0 Low side FRFET On C3 1 0 VDC High side FRFET On 1 1 Forbidden Shoot through Open Open Z Same as (0,0) R3 N One Leg Diagram of SPM * Example of bootstrap paramters : C1 = C2 =1mF ceramic capacitor Note: 1. Parameters for bootsrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above. 2. RC coupling(R5 and C 5) and C 4 at each input of SPM® and Micom (indicated as dotted lines) may be used to prevent improper signal due to surge noise. 3. Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge voltage. Bypass capacitors such as C1, C2 and C3 should have good high-frequencycharacteristics to absorb high-frequency ripple current. Figure 3. Recommended CPU Interface and Bootstrap Circuit with Parameters Note: Attach the thermocouple on top of the heatsink-side of SPM® (between SPM® and heatsink if applied) to get the correct temperature measurement. Figure 4. Case Temperature Measurement 3.5 3.0 VTS [V] 2.5 2.0 1.5 1.0 0.5 20 40 60 80 100 120 140 160 THVIC [deg] Figure 5. Temperature profile of Vts(typ.) 6 FSB50825AS Rev. A www.fairchildsemi.com FSB50825AS Smart Power Module (SPM®) These values depend on PWM control algorithm FSB50825AS Smart Power Module (SPM®) VIN VIN Irr 120% of ID 100% of ID VDS ID 10% of ID ID VDS tON trr tOFF (a) Turn-on (b) Turn-off Figure 6. Switching Time Definition C BS VCC ID VCC VB HIN HO LIN VS COM LO L VDC + V DS - Vts One-leg Diagram of SPM Figure 7. Switching and RBSOA(Single-pulse) Test Circuit (Low-side) Input Signal UV Protection Status Low-side Supply, VCC RESET DETECTION RESET UVCCR UVCCD MOSFET Current Figure 8. Undervoltage Protection (Low-side) Input Signal UV Protection Status High-side Supply, VBS RESET DETECTION RESET UVBSR UVBSD MOSFET Current Figure 9. Undervoltage Protection (High-side) 7 FSB50825AS Rev. A www.fairchildsemi.com (2 ) VB(U) (3 ) VCC(U) R5 (4 ) IN(UH) (5 ) IN(UL) C5 C2 (6 ) N.C (17) P VCC VB HIN HO LIN VS COM LO (18) U , VS(U) C3 (19 ) NU (7 ) VB(V) (8 ) VCC(V) (9 ) IN(VH) Micom (10) IN(VL) (11 ) VTS VDC VCC VB HIN HO LIN VS COM LO (20 ) NV (21) V , VS(V) M VTS (12) VB(W) (13) VCC(W) (14) IN( WH) (15) IN( WL) (16) N.C VCC VB HIN HO LIN VS COM LO (22) NW (23) W, VS(W) C4 For current sensing and protection 15- V Supply R4 C6 R3 Note: 1. About pin position, refer to Figure 2. 2. RC coupling(R5 and C5, R4 and C 6) and C 4 at each input of SPM® and Micom are useful to prevent improper input signal caused by surge noise. 3. The voltage drop across R3 affects the low side switching performance and the bootstrap characteristics since it is placed between COM and the source terminal of the low side MOSFET. For this reason, the voltage drop across R3 should be less than 1V in the steady-state. 4. Ground wires and output terminals, should be thick and short in order to avoid surge voltage and malfunction of HVIC. 5. All the filter capacitors shoud be connected close to SPM®, and they should have good characteristics for rejecting high-frequency ripple current. Figure 10. Example of Application Circuit 8 FSB50825AS Rev. A www.fairchildsemi.com FSB50825AS Smart Power Module (SPM®) C1 (1 ) COM FSB50825AS Smart Power Module (SPM®) Detailed Package Outline Drawings Dimension unit : [mm] 9 FSB50825AS Rev. A www.fairchildsemi.com FRFET® Global Power ResourceSM Green FPS™ Green FPS™ e-Series™ GTO™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ MotionMax™ Motion-SPM™ OPTOLOGIC® OPTOPLANAR® Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EfficentMax™ EZSWITCH™ * ™ ® Fairchild ® Fairchild Semiconductor® FACT Quiet Series™ FACT® FAST® FastvCore™ FlashWriter® * FPS™ F-PFS™ Programmable Active Droop™ QFET® QS™ Quiet Series™ RapidConfigure™ ™ Saving our world, 1mW /W /kW at a time™ SmartMax™ SMART START™ SPM® STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SupreMOS™ SyncFET™ ® ® PDP SPM™ Power-SPM™ PowerTrench® PowerXS™ TinyBoost™ TinyBuck™ TinyLogic® TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ TriFault Detect™ mSerDes™ UHC® Ultra FRFET™ UniFET™ VCX™ VisualMax™ XS™ The Power Franchise® * EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I38 10 FSB50825AS Rev. A www.fairchildsemi.com FSB50825AS Smart Power Module (SPM®) TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.