SANYO LA75676M

Ordering number : ENA0832
Monolithic Linear IC
For TV and VCR Products
LA75676M
IF Signal Processor (VIF+SIF)
Overview
The LA75676M is a VIF/SIF IC that supports NTSC intercarrier reception and adopts a semi-adjustment-free design. It is
provided in the MFP24S (300mil, 1.0mm lead pitch) package, which is appropriate for miniature 2-in-1 tuner products. In
the VIF block, it adopts a design that uses AFT adjustment to obviate the need for VCO adjustment, and thus can simplify
the adjustment steps required in end product manufacturing. It uses a PLL technique for FM detection. It features the 5V
supply voltage appropriate for multimedia products. In addition, it achieves superb audio quality by incorporating a buzz
canceller that suppresses Nyquist buzzing.
Functions
• VIF block: VIF amplifier, buzz canceller, PLL detector, IF AGC, RF AGC, AFT, and an equalizer amplifier
• SIF block: Limiter amplifier, PLL FM detector
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
VCC max
6
Circuit voltage
V13, V17
VCC
Circuit current
I6
-3
I10
-10
mA
I24
-2
mA
400
mW
Allowable power dissipation
Pd max
Ta ≤ 70°C * Mounted on a board
V
V
mA
Operating temperature
Topr
-20 to +70
°C
Storage temperature
Tstg
-55 to +150
°C
* When mounted on a 114.3×76.1×1.6mm3, glass epoxy board.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
42507 MS PC B85186,B8-5034,B8-4968 No.A0832-1/9
LA75676M
Operating Conditions at Ta = 25°C
Parameter
Symbol
Recommended supply voltage
VCC
Operating supply voltage range
VCC op
Conditions
Ratings
Unit
5
V
4.5 to 5.5
V
Electrical Characteristics at Ta = 25°C, VCC = 5V, fp = 45.75MHz
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
[VIF Block]
Circuit current
I5
32
40
VCC-0.5
VCC
0
0.5
V
32
38
44
dBµV
58
63
Vi max
95
100
V6
3.5
3.8
4.1
V
V6tip
0.9
1.2
1.5
V
Maximum RF AGC voltage
V14H
Minimum RF AGC voltage
V14L
Input sensitivity
Vi
AGC range
GR
Maximum allowable input
Video output voltage (no input)
Sync signal tip voltage
Video output level
S1 = OFF
48
mA
V
dB
dBµV
VO
1.7
2
2.3
Vp-p
Black noise threshold voltage
VBTH
0.5
0.8
1.1
V
Black noise clamp voltage
VBCL
1.6
1.9
2.2
V
Video signal-to-noise ratio
S/N
48
52
dB
C-S beating
IC-S
38
43
dB
-3
-1.5
dB
Frequency characteristics
fc
6MHz
Differential gain
DG
3
6.5
%
Differential phase
DP
3
5
°C
AFT voltage (no signal)
V13
2.0
2.5
3.0
V
Maximum AFT voltage
V13H
4.0
4.4
5.0
V
Minimum AFT voltage
V13L
0.18
1.0
V
40
52
mV/kHz
AFT detection sensitivity
Sf
28
VIF input resistance
Ri
45.75MHz
VIF input capacitance
Ci
45.75MHz
APC pull-in range (U)
fpu
APC pull-in range (L)
fpl
1.5
kΩ
3
1.3
pF
2.0
MHz
-2.0
-1.4
+150
AFT tolerance frequency 1
dfa1
-150
0
VCO 1 maximum range (U)
dfu
1.5
2.0
VCO 1 maximum range (L)
dfl
VCO control sensitivity
B
Limiting sensitivity
Vli (lim)
FM detection output voltage*
VO (FM)
MHz
kHz
MHz
-2.0
-1.5
MHz
1.3
2.7
5.4
kHz/mV
39
45
51
dBµV
400
520
660
mVrms
50
60
[SIF BLOCK]
AMR
AMR
Total harmonic distortion
THD
SIF signal-to-noise ratio
S/N (FM)
4.5MHz output level
Vsout
4.5MHz ±25kHz
0.3
SIF IN 80dBµV
59
64
87
94
dB
0.8
%
dB
101
dBµV
* : If a wider FM detection output dynamic range is required, insert a resistor and capacitor in series between pin 23 and ground to adjust the level.
No.A0832-2/9
LA75676M
Package Dimensions
unit : mm (typ)
3112B
Pd max -- Ta
12.5
7.6
13
0.63
5.4
24
1
12
1.0
0.15
0.35
1.7max
(1.5)
(0.75)
Allowable power dissipation, Pd max -- mW
1000
When mounted on a 65×72×1.6mm3
paper phenol board
800
720
Mounted on a board
600
420
400
Independent IC
200
0
-20
0
20
40
60
80
100
0.1
Ambient temperature, Ta -- °C
SANYO : MFP24S(300mil)
Pin Assignment
SIF INPUT
1
24 FM DET OUT
BIAS FILTER
2
23 FM FILTER
SIF OUT
3
22 BPF OUT
NC
4
21 RF AGC VR
VCC
5
20 GND
VIDEO OUT
6
EQ FILTER
7
18 VIF INPUT
EQ INPUT
8
17 1st AGC FILTER
APC FILTER
9
16 2nd AGC FILTER
VIDEO DET OUT
10
15 2nd AGC FILTER
VCO COIL
11
14 RF AGC OUT
VCO COIL
12
13 AFT OUT
LA75676M
19 VIF INPUT
No.A0832-3/9
LA75676M
Block Diagram and AC Characteristics Test Circuit
VIF IN
51Ω
24
23
22
21
20
19
18
17
16
15
14
1000pF
330pF
0.01µF
0.015µF
(M)
GND
0.01µF
+
V
120kΩ 120kΩ
FM
DET
VIF
AMP
IF
AGC
AFT
OUT
(B)
13
6.6kΩ
RF
AGC
RF AGC
OUT
(F)
IF AGC
0.01µF
1µF
(M)
0.01µF
7.5kΩ
10kΩ-B
0.01µF
RF AGC
VR
FM DET
(D)
9V
0.01µF
4.5MHz OUT
(E)
VIDEO
DET
AFT
9dB
HPF
LIM
AMP
EQ
AMP
6
9
150Ω
11
12
24pF
330Ω
VIDEO
OUT
(A)
SIF OUT
10
560Ω
2nd SIF IN
1.5kΩ
+
8
+
S1
+
7
0.47µF
5
100kΩ
4
1µF
51Ω
3
0.01µF
2
0.01µF
1
VCO
VCC
GND
Test Circuit (Input inpedance)
Impedance
analyzer
23
22
20
19
18
0.01µF
0.01µF
0.01µF
0.01µF
0.01µF
0.01µF
21
17
16
15
14
13
8
9
10
11
12
0.01µF
24
10kΩ
0.01µF
0.01µF
0.01µF
VIF IN
LA75676M
5
6
7
330Ω
4
+
100µF
3
0.01µF
2
0.01µF
1
VCC
No.A0832-4/9
LA75676M
Test Conditions
V1. Circuit current • • • • [15]
1. Internal AGC
2. Input a 45.75MHz, 10mVrms, CW signal to the VIF input pin.
3. RF AGC Vr maximum
4. Connect a current meter to VCC and measure the current flowing into the IC.
V2, V3. Maximum RF AGC voltage, minimum RF AGC voltage • • • • [V9H, V9L]
1. Internal AGC
2. Input a 45.75MHz, 10mVrms, CW signal to the VIF input pin.
3. Vary the RF AGC Vr and, at the maximum resistance, measure the maximum RF AGC voltage. (F)
4. Vary the RF AGC Vr and, at the minimum resistance, measure the maximum RF AGC voltage. (F)
V4. Input sensitivity • • • • [Vi]
1. Internal AGC
2. fp = 45.75MHz, 400Hz 40% AM (VIF input)
3. Set S1 to the off position and pass the input through a 100kΩ resistor.
4. Measure the VIF input level such that the 400Hz detection output level at test point A becomes 0.64Vp-p.
V5. AGC range • • • • [GR]
1. External AGC. Apply the VCC voltage to the IF AGC input (pin 17).
2. With the same conditions as used for V4, measure the VIF input level such that the detection output level becomes
0.64Vp-p. • • • Vi1
Vi1
3. GR = 20log Vi dB
V6. Maximum allowable input • • • • [Vi max]
1. Internal AGC
2. fp = 45.75MHz, 15kHz 78% AM (VIF input)
3. Measure the VIF input level such that the detection output level at test point A is ±1dB of the video output (Vo).
V7. Video output voltage (no input) • • • • [V6]
1. External AGC. Apply the VCC voltage to the IF AGC input (pin 17).
2. Measure the video output (A) DC voltage.
V8. Sync signal tip voltage • • • • [V6tip]
1. Internal AGC
2. Input a 45.75MHz, 10mVrms, CW signal to the VIF input pin.
3. Measure the video output (A) DC voltage.
V9. Video output level • • • • [VO]
1. Internal AGC
2. fp = 45.75MHz, 15kHz 78% AM
Vi = 10mVrms (VIF input)
3. Measure the wave height of the detection output level at test point A. (Vp-p)
No.A0832-5/9
LA75676M
V10, V11. Black noise threshold and clamp voltages • • • • [VBTH, VBCL]
1. Apply a DC voltage to the external AGC IF input (pin 17) and vary that voltage.
2. fp = 45.75MHz, 400Hz, 40% AM, 10mVrms (VIF input)
3. Vary the IF AGC (pin 17) voltage so that the noise canceller operates.
Measure VBTH and VBCL at test point A.
VBCL
Video output
(V)
VBTH
Time
V12. Video signal-to-noise ratio • • • • [S/N]
1. Internal AGC
2. fp = 45.75MHz, CW, 10mVrms (VIF input)
3. Measure the noise voltage as an RMS level at test point A after passing through a 10kHz to 4MHz bandpass filter.
This is the noise voltage (N).
Video component (Vp-p)
1.12Vp-p
4. S/N = 20log Noise voltage (Vrms) = 20log Noise voltage = (dB)
V13. C/S beating • • • • [ICS]
1. Apply a DC voltage to the external AGC IF input (pin 17) and vary that voltage.
2. fp = 45.75MHz, CW ; 10mVrms
fc = 42.17MHz, CW ; 10mVrms - 10dB
fs = 41.25MHz, CW ; 10mVrms - 10dB
3. Vary the IF AGC (pin 17) voltage to adjust the output level at test point A to be 1.3Vp-p.
4. Measure the difference in level between the 3.58MHz and the 0.92MHz components at test point A.
C/S beating
Output
(dB)
0.92MHz
3.58M 4.5M
Frequency (MHz)
No.A0832-6/9
LA75676M
V14. Frequency characteristics • • • • [fc]
1. Apply a DC voltage to the external AGC IF input (pin 17) and vary that voltage.
2. SG1 : 45.75MHz, CW, 10mVrms
SG2 : from 45.65MHz to 39.75MHz, CW, 2mVrms
Add SG1 and SG2 using a T pad, adjust the signal generator levels to those listed above, and apply the result to
VIF IN.
3. First, set the SG2 frequency to 45.65MHz.
Next, adjust the IF AGC voltage (pin 17) so that the output level at test point A becomes 0.5Vp-p. • • V1
4. Set the SG2 frequency to 39.75MHz and measure the output level. • • V2
5. Perform the following calculation.
V2
fc = 20log V1 (dB)
V15, V16. Differential gain and differential phase • • • • [DG, DP]
1. Internal AGC
2. fp = 45.75MHz, APL 50%, 87.5% video signal, Vi = 10mVrms
3. Measure DG and DP at test point A.
V17. AFT voltage (no signal) • • • • V13
1. Internal AGC
2. Measure the DC voltage on the AFT output (B).
V18, V19, V20. Maximum AFT voltage, minimum AFT voltage, AFT detection sensitivity • • • • [V13H, V13L, Sf]
1. Internal AGC
2. fp = 45.75MHz, ±1.5MHz sweep, 10mVrms (VIF input)
3. Record the maximum voltage as V13H and the minimum voltage as V13L.
4. Measure the frequency shift for the change in voltage at test point B from V1 to V2. • • ∆f
Sƒ =
2000 (mV)
mV/kHz
∆f (kHz)
∆f
AFT output
(V)
V13H
V1 ; 3.5V
V2 ; 1.5V
V13L
IF frequency (MHz)
No.A0832-7/9
LA75676M
V21, V22. VIF input resistance, input capacitance • • • • [Ri, Ci]
1. Use an impedance analyzer to measure Ri and Ci in the input impedance test circuit.
V23, V24. APC pull-in range • • • • [fpu, fpl]
1. Internal AGC
2. fp = 39MHz to 51MHz, CW : 10mVrms
3. Vary the signal generator from fp = 45.75MHz towards higher frequencies until PLL lock is lost.
Note : PLL lock is lost at the point beating is output at test point A.
4. Lower the signal generator frequency until the PLL locks again. (f1)
5. Lower the signal generator frequency until PLL lock is lost.
6. Raise the signal generator frequency until the PLL locks again. (f2)
7. Perform the following calculations.
fpu = f1 - 45.75MHz
fpl = f2 - 45.75MHz
V25. AFT tolerance frequency 1 • • • • [∆Fa1]
1. Internal AGC
2. SG1 : Vary this frequency from 43.75MHz to 47.75MHz, CW, 10mVrms
3. Vary the SG1 frequency so that the AFT output (test point B) becomes 2.5V.
Record the SG1 frequency at that point as f1.
4. External AGC (Adjust V17.)
5. Apply 5V to the IF AGC (pin 17), pick up the VCO oscillator frequency from ground or some other point, and
measure that frequency. f2
6. Perform the following calculation.
AFT tolerance frequency 1 ∆Fa1 = f2 - f1 (kHz)
V26, V27. VCO maximum range (U, L) • • • • [dfu, dfl]
1. External AGC. Apply the VCC voltage to the IF AGC (pin 17).
2. Pick up the VCO oscillator frequency from the video output (A), ground, or some other point and adjust the VCO
coil so that frequency becomes 45.75MHz.
3. Apply 1V to the APC pin (pin 9) and let fl be the frequency at that time.
Similarly, apply 5V and let fu be the frequency at that time.
dfu = fu - 45.75MHz
dfl = fl - 45.75MHz
V28. VCO control sensitivity • • • • [β]
1. External AGC. Apply the VCC voltage to the IF AGC (pin 17).
2. Pick up the VCO oscillator frequency from the video output (A), ground, or some other point and adjust the VCO
coil so that frequency becomes 45.75MHz.
3. Apply 3V to the APC pin (pin 9) and let f1 be the frequency at that time.
Similarly, apply 3.4V and let f2 be the frequency at that time.
f2 - f1
β = 400 (kHz/mV)
S1. SIF limiting sensitivity • • • • [Vi (lim)]
1. External AGC. Apply the VCC voltage to the IF AGC (pin 17).
2. fs = 4.5MHz, fm = 400Hz, ∆F = ±25kHz (SIF input)
3. Set the SIF input level to 100mVrms and measure the value at test point D at that time. • • V1
4. Lower the SIF input level and measure the input level such that V1 is down by 3dB.
S2, S4. FM detection output voltage, total harmonic distortion • • • • [VO(FM), THD]
1. External AGC. Apply the VCC voltage to the IF AGC (pin 17).
2. fs = 4.5MHz, fm = 400Hz, ∆F = ±25kHz (SIF input, Vi = 100mVrms)
3. Measure the FM detection output voltage and total harmonic distortion at test point D.
No.A0832-8/9
LA75676M
S3. AM rejection ratio • • • • [AMR]
1. External AGC. Apply the VCC voltage to the IF AGC (pin 17).
2. fs = 4.5MHz, fm = 400Hz, AM = 30% (SIF input, Vi = 90dBµV)
3. Measure the output voltage at test point D. • • • VAM
V (DET)
4. AMR = 20log O
dB
VAM
S5. SIF signal-to-noise ratio • • • • [S/N]
1. External AGC (V17 = VCC)
2. fs = 4.5MHz, no modulation, Vi = 100mVrms
3. Measure the output voltage at test point D. • • • • Vn
V (DET)
4. S/N = 20log O
dB
Vn
S6. 4.5MHz output level • • • • [S/N]
1. External AGC (V17 = VCC)
2. fs = 4.5MHz, no modulation, Vi = 10mVrms
3. Measure the output voltage at test point E. • • • • Vsout
Note 1. Unless specified otherwise, when measuring VIF, apply the VCC voltage to the AGC and adjust the VCO coil
so that it oscillates at 45.75MHz.
Note 2. Unless specified otherwise, switch SW1 must be in the on position.
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
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semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
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limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
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This catalog provides information as of April, 2007. Specifications and information herein are subject
to change without notice.
PS No.A0832-9/9