DB-2933-54 RF POWER amplifier using 2 x SD2933 N-Channel enhancement-mode lateral MOSFETs General feature ■ Excellent thermal stability ■ Frequency: 1.6 - 54MHz ■ Supply voltage: 48V ■ Output power: 400W typ. ■ Input power 10W max. ■ Efficiency: 57% - 76% ■ IMD at 300WPEP < -26dBc ■ Load mismatch: 3:1all phases Description The DB-2933-54 is a RF broadband power amplifier intended for linear or nonlinear operation over the band 1.6 to 54 MHz using 2x SD2933 gold metallized N-channel MOS field-effect transistors. The temperature compensating biasing circuit supports class B and class AB operation. DB-2933-54 is designed in cooperation with Specific RF Devices. (e-mail : [email protected]) Order Code ■ DB-2933-54 October 2006 Rev 1 1/13 www.st.com 13 Contents DB-2933-54 Contents 1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Typical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Photos of DB-2933-54 amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 DB-2933-54 class of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 SD2933 mounting recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.1 Mounting recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.2 Mounting sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 DB-2933-54 Electrical data 1 Electrical data 1.1 Maximum ratings Table 1. Absolute maximum ratings Symbol Value Unit Input power 16 W Output power 500 W Drain supply voltage 50 V VGG Gate biasing voltage 15 V IDD Drain current 20 A Power dissipation 400 W PIN POUT VDD (1) PDISS Parameter 1. VGG from 9 to 15V and PIN < 16W 3/13 Electrical characteristics 2 DB-2933-54 Electrical characteristics TA = +25 oC, VDD = 48V, IDQ = 2 x 900mA Table 2. Electrical Specification Symbol Min Freq Frequency range 1.6 POUT PIN = 10W 300 Gain ND Typ Max Unit 54 MHz 400 W PIN = 10W 16.2 ± 0.6dB dB PIN = 10W 57 - 76 % ND H2 2 Harmonic @ POUT = 300W -26 / -49 dBc H3 3RD Harmonic @ POUT = 300W -13 / -58 dBc VSWR 4/13 Test Conditions Load mismatch all phases @ POUT = 300W 3:1 DB-2933-54 Typical performance Typical performance Figure 1. Output power & efficiency vs frequency Figure 2. 60 90 59 80 58 57 70 57 70 56 60 56 60 55 50 55 50 54 40 54 40 53 30 59 - eff - Pout O u tp u t P o w e r (d B m ) 58 53 E f f ic ie n c y ( % ) 100 30 V dd = 40V Id q = 2 x 9 0 m A Pin = 1 0 W 52 51 O u tp u t Po w er (d B m ) 60 Output power & efficiency vs frequency 20 V dd = 48V Id q = 2 x 9 0 0 m A Pin = 1 0 W 5 10 15 20 25 30 35 40 45 50 55 60 65 Fr e q u e n c y (M Hz ) IMD vs frequency Figure 4. Output power vs drain voltage 600 0 -5 Pin = 1 0 W Id q = 2 x 9 0 0 m A 500 V dd = 48V Id q = 2 x 9 0 0 m A Po u t = 3 0 0 W PEP O u tp u t Po w er (W ) -1 0 -1 5 IM D (d B c ) 10 0 0 Fr e q u e n c y ( M H z ) -2 0 -2 5 400 300 200 100 -3 0 -3 5 0 10 -4 0 0 IMD 20 50 5 10 15 20 25 30 35 40 45 50 55 60 65 Figure 3. 80 51 0 0 90 - eff - Pout 52 10 50 100 E f f ic ie n c y ( % ) 3 5 10 15 20 25 30 35 40 45 50 55 60 14 18 22 26 30 34 38 42 46 50 D r a in v o lt a g e ( V ) 65 F r e q u e n c y (M H z ) 1.6 M H z 5 M Hz 10 M H z 2 8 M Hz 4 0 M Hz 6 0 M Hz 2 0 M Hz 5/13 Typical performance DB-2933-54 Figure 5. Harmonics vs frequency 0 Vdd = 48V Idq = 2x 900 mA Pout = 300 WPEP Harmonics (dBc) -10 -20 -30 -40 -50 -60 -70 0 H2 6/13 5 H3 10 15 20 25 30 35 40 Frequency (MHz) 45 50 55 60 65 DB-2933-54 4 Photos of DB-2933-54 amplifier Photos of DB-2933-54 amplifier Figure 6. Top view Figure 7. Side view 7/13 DB-2933-54 class of operation 5 DB-2933-54 DB-2933-54 class of operation ● class B : ● class AB : a higher bias point with ~ 900mA per transistor a low bias point with ~100mA per transistor To select a bias point, DB-2933-54 has a control port “BIAS”. ● The bias point is 2x 100 mA if “BIAS” is left open and in this case a DC voltage of ~5V is present ● The bias point is 2 x 900 mA if “BIAS” is connected to ground. "PA_ON" control port / ON-OFF bias current 8/13 ● To switch-on biasing circuit, connect “PA_ON” to ground. ● To switch-off biasing circuit, left open “PA_ON” DB-2933-54 SD2933 mounting recommendations 6 SD2933 mounting recommendations 6.1 Mounting recommendations 6.2 ● Ensure holes in heatsinks are free from burrs; ● Minimum depth of tapped holes in heatsinks is 6 mm; ● Use 4-40 UNC-2A cheese-head screws with a flat washer to spread the joint pressure; ● The minimum flatness of the mounting area is 0.02 mm; ● Mounting area roughness should be less than 0.5 µm (micro); ● Avoid, as much as possible, use of flux or flux solutions because flux can penetrate even when hermetically sealed ceramic-capped transistors. Tin and wash the printedcircuit board BEFORE mounting the power transistors, then solder the transistor leads without using flux; ● Transistor leads may be tinned by dipping them full-length into a solder bath at a temperature of about 230°C. No flux should be used during tinning; ● Recommended heatsink compounds : WPSII (silicon free) from Austerlitz Electronics, 340 from Dow Corning etc. Mounting sequence ● Apply a thin layer of evenly distributed heatsink compound to the flange; ● Position the device with flat washers in place; ● Tighten the screws until finger tight (0.05 Nm); ● Further tighten the screws until the specified torque is reached; ● For M174, M177 & M244 type of packages, torque should be minimum 0.6 Nm and 0.75 Nm max. 9/13 SD2933 mounting recommendations Table 3. DB-2933-54 DMOS Packages - List of materials Package Description Flange Leadframe Type M174 0.500 DIA 4L NON HERM W/FLANGE Ceramic insulator Plating Leads Torque (Nm) Flange Min Max ALLOY 42 (Fe58 / Ni42) BeO (99.5% min) Au (100µ min) over Ni(100µ min) + Pd Ni (100µ min / (10µ min) 350µ max) 0.6 0.75 M174 (Moly disk) 0.500 DIA 4L NON HERM Cu-MoW/FLANGE Cu (MOLY DISK) ALLOY 42 (Fe58 / Ni42) BeO (99.5% min) Au (100µ min) over Ni(100µ min) + Pd Ni (100µ min / (10µ min) 350µ max) 0.6 0.75 M177 0.550 DIA 4L NON Cu-MoHERM Cu W/FLANGE ALLOY 42 (Fe58 / Ni42) BeO (99.5% min) Au (60µ min) over Ni (100µ min / 350µ max) Au (100µ min) over Ni (100µ min / 350µ max) 0.6 0.75 M244 2x W 0.400x0.425 (85%) WIDE 2L Cu LAP N/H (15%) FLANGE ALLOY 42 (Fe58 / Ni42) BeO(99.5 % min) Au (60µ min) over Ni (100µ min / 350µ max) Au (60µ min) over Ni (100µ min / 350µ max) 0.6 0.75 10/13 Cu DB-2933-54 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 11/13 Revision history 8 DB-2933-54 Revision history Table 4. 12/13 Revision history Date Revision 19-Oct-2006 1 Changes Initial release DB-2933-54 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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