STLVDS104 4-port lvds and 4-port TTL-to LVDS repeaters Feature summary ■ Receiver and drivers meet or exceed the requirements of ansi eia/tia-644 standard, receivers differential input levels, ±100mV ■ Designed for signaling rates up to 630mbps ■ Operates from a single 3.3V supply ■ Low voltage differential signaling with typical output voltage of 350mV and a 100Ω load ■ Propagation delay time: 3.1ns (typ) ■ Electrically compatible with LVDS, PECL, LVPECL, LVTTL, LVCOMOS, GTL, BTL, CTT, SSTL, or HSTL outputs with external network ■ Bus terminal ESD (HBM) exceeds 7kV ■ TSSOP package TSSOP noise coupling, and switching speed to transmit data at a speed up to 630Mbps at relatively long distances. Description The STLVDS104 is a differential line receiver and a LVTTL input connected to four differential line drivers that implement the electrical characteristics of low voltage differential signaling, for point to point baseband data transmission over controlled impedance media of approximately 100Ω. The transmission media can be printed-circuit board traces, backplanes, or cable. LVDS, as specified in EIA/TIA-644 is a data signaling technique that offers low-power, low The drivers integrated into the same substrate, along with the low pulse skew of balanced signaling, allow extremely precise timing alignment of the signals repeated from the input. The device allows extremely precise timing alignment of the signal repeated from the input. This is particularly advantageous in distribution or expansion of signals such as clock or serial data stream. . Order codes Type Temperature Range Package Comments STLVDS104BTR -40 to 85 °C TSSOP16 (Tape & Reel) 2500 parts per reel March 2006 Rev. 5 1/12 www.st.com 12 STLVDS104 Contents 1 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 STLVDS104 Pin configuration 1 Pin configuration Figure 1. Pin connections and functional diagram Table 1. Pin description Pin n° Symbol 1, 2, 3, 8 EN1 to EN4 6, 7 A, B 9, 11, 13, 15 1Z to 4Z Driver Inputs 10, 12, 14, 16 1X to 4X Driver Inputs 5 GND Ground 4 VCC Supply Voltage Table 2. Name and function Enable Driver Inputs Receiver Input Truth table for receiver Input Enables Outputs VID = VA - V B #EN #Y #Z X X Z Z X L Z Z VID ≥ 100mV H H L -100mV < VID < 100mV H ? ? VID ≤ −100mV H L H L=Low level, H=High level, X=Don’t care, Z= High impedance,?=Indeterminate 3/12 Maximum ratings STLVDS104 2 Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter VCC Supply voltage (Note 1) VR Voltage range ESD Tstg Note: Note: Unit -0.5 to 4 V Enable inputs -0.5 to 6 V A, B, Y or Z -0.5 to 4 V Y, Z, to GND 7 KV All Pins 2 KV -65 to +150 °C ESD Protection voltage (HBM) Storage temperature range Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. 1 Table 4. All voltages except differential I/O bus voltage, are with respect to the network ground terminal. Recommended operating conditions Symbol 4/12 Value Parameter Min. Typ. Max. Unit 3.3 3.6 V VCC Supply voltage 3.0 VIH HIGH level input voltage 2.0 VIL LOW level input voltage |VID| Magnitude of differential input voltage VIC Common mode input voltage TA Operating temperature range V 0.8 V 0.1 3.6 V |VID|/2 24-|VID|/2 V VCC-0.8 -40 85 °C STLVDS104 Electrical characteristics 3 Electrical characteristics Table 5. Electrical characteristics (TA = -40 to 85°C, and V CC = 3.3V ±10% over recommended operating conditions unless otherwise noted. All typical values are at TA = 25°C). Symbol Parameter VITH+ Positive-going differential input voltage threshold VITH- Negative-going differential input voltage threshold |VOD| Differential output voltage magnitude ∆|VOD| Change in differential output voltage magnitude between logic state Change in steady-state common ∆VOC(SS) mode output voltage between logic state VOC(SS) Steady-state Common Mode Output Voltage VOC(PP) Peak to peak common mode output voltage ICC II Supply current Input current (A or B Inputs) Test Min. Typ. Max. Unit 100 mV -100 RL = 100Ω, VID = ±100mV 247 mV 454 mV -50 50 mV -50 50 mV 1.2 1.375 V 25 150 mV Enabled, RL = 100Ω 20 30 mA Disabled 2.5 5 mA -20 µA 1.125 340 VI =0V -2 -11 VI = 2.4V -1 -3 µA Power OFF input current VCC = 1.5V, VI = 2.4V 3 20 µA IIH High level input current VIH = 2V 7 20 µA IIL Low level input current VIL = 0.8V 3 10 µA Short circuit output current VO(Y) or VO(Z) = 0V ±6 ± 10 mA IOC VOD = 0 ±3 ± 10 mA IOZ High Impedance output current VO = 0 or 2.4V ±1 µA Power OFF output current VCC = 1.5V, VO = 2.4V ±1 µA II(OFF) IO(OFF) (4e6πt)+0.5V CIN Input capacitance (A or B inputs) VI = 0.4 sin CO Output capacitance (Y or Z outputs) VI = 0.4 sin (4e6πt)+0.5V, Disabled 3 pF 6 pF 5/12 Electrical characteristics Table 6. STLVDS104 Switching characteristics (TA = -40 to 85°C, and VCC = 3.3V unless otherwise noted. All typical values are at TA = 25°C). Symbol Parameter tPLH tPHL Test Min. Typ. Max. Unit Propagation delay time, low to high output 2.4 3.2 4.2 ns Propagation delay time, high to low output 2.2 3.1 4.2 ns 0.3 0.7 1.2 ns 0.3 0.7 1.2 ns 100 300 ps 50 100 ps 1.5 ns tr Differential output signal rise time tf Differential output signal fall time tsk(P) tsk(O) Pulse skew (|tTHL - tTLH|) Channel-to-channel output skew (1) RL = 100Ω CL = 10pF (2) tsk(pp) Part to part skew tPZH Propagation delay time, high impedance to high level output 7.2 15 ns tPZL Propagation delay time, high impedance to low level output 8.4 15 ns tPHZ Propagation delay time, high level to high impedance output 3.6 15 ns tPLZ Propagation delay time, low level to high impedance output 6 15 ns 1. tsk(O) is the time difference between the tPLH or tPHL of all drivers of a single device with all their inputs connected together 2. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuit 6/12 STLVDS104 4 Typical performance characteristics Typical performance characteristics (Unless otherwise specified TJ = 25°C) Figure 2. Output current vs output high voltage Figure 3. Output current vs output low voltages Figure 4. High to low propagation delay time Figure 5. Low to high propagation delay time r 7/12 Package mechanical data 5 STLVDS104 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 8/12 STLVDS104 Package mechanical data TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0˚ L 0.45 A 0.60 0.0256 BSC 8˚ 0˚ 0.75 0.018 8˚ 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 9/12 Package mechanical data STLVDS104 Tape & Reel TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. A MAX. MIN. 330 13.2 TYP. MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 10/12 TYP 0.504 22.4 0.519 0.882 Ao 6.7 6.9 0.264 0.272 Bo 5.3 5.5 0.209 0.217 Ko 1.6 1.8 0.063 0.071 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 STLVDS104 Revision history 6 Revision history Table 7. Revision history Date Revision 14-Mar-2006 5 Changes Order codes has been updated and new template. 11/12 STLVDS104 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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