XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Sep. 06, 01 Ver. III
Applications
zMobile, Cordless phones
zPalm top computers, PDAst
zPortable games
zCameras, Digital cameras
zLaptops
Input Voltage Range : 2.0V ~20V
Output Voltage Range : 2.2V ~ 16V
Oscillation Frequency Range : 100kHz ~ 600kHz
Output Current : up to 3A
Ceramic capacitor compatible
MSOP-8A Package
General Description
Features
The XC9101/9102 series are step-up multiple current and
voltage feedback DC/DC controller ICs. Current sense, clock
frequencies and amp feedback gain can all be externally regulated.
A stable power supply is possible with output currents of up to 3A and
output voltage is selectable in 0.1V steps within a 2.2V - 16.0V
(±2.5% accuracy) range (internal). Further, a type which has a 0.9V
internal reference voltage and which allows output voltage to be set-up
freely via the external components is also available (FB type).
Switching frequencies can be regulated externally within a range of
100 ~600 kHz and therefore frequencies suited to your particular
application are selectable.
The XC9102 series switches from PWM to current limited PFM control
during light loads and the series offers low ripple and high efficiencies
from light loads through to large output currents. Further, the drive
transistor's current limit can be applied via the current sense function
and soft-start times can be regulated by the external resistors and
capacitors.
During shutdown (CE pin =L), consumption current can be reduced to
as little as 0.5µA or less.
Stable Operations via Current & Voltage Multiple Feedback
Unlimited Options for Peripheral Selection
PWM/PFM Switching Control (XC9102)
Current Protection Circuit
Low Ripple Output Voltage during Light Loads (XC9102)
Ceramic Capacitor Compatible
Pin Configuration
0.65
EXT
VSS
1
8
Isen
2
7
VOUT
VIN
3
6
CC/GAIN
CE/SS
4
5
CLK
3.0 TYP
3.0 TYP
4.9 TYP
Pin Assignment
PIN NUMBER
PIN NAME
FUNCTION
PIN NUMBER
PIN NAME
FUNCTION
1
2
3
4
EXT
Isen
VIN
CE / SS
Driver
Current Sense
Power Input
CE/Soft Start
5
6
7
8
CLK
CC / GAIN
VOUT / FB
VSS
Clock Input
Phase Compensation
Voltage Sense
Ground
1
Height:1.02
TYP
(Units:mm)
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Ordering Information
XC9101MNOPQR
M
NO
C
VOUT
D
FB
20 ~ G0
09
P
Q
Soft-start externally set-up
Soft-start externally set-up
Output Voltage : For the voltage above 10V, see the example
10=A, 11=B, 12=C, 13=D, 14=E, 15=F, 16=G
e.g. VOUT=2.3V → b=2, c=3 VOUT=13.5V → b=D, c=5
FB products
A
Adjustable Frequency
K
MSOP-8A
Embossed tape. Standard Feed
R
Embossed tape. Reverse Feed
The standard output voltage of XC9101C series are 2.5V, 3.3V, and 5.0V. The voltage other than listed are semi-custom.
R
L
Typical Application
XC9101C/9102C : Output Voltage Internally Set-up
XC9101D/9102D : Output Voltage adjustable externally (FB)
Absolute Maximum Ratings
PARAMETER
EXT pin Voltage
Isen pin Voltage
VIN pin Voltage
CE/SS pin Voltage
CLK pin Voltage
CC/GAIN pin Voltage
VOUT/FB pin Voltage
EXT pin Current
Continuous Total Power Dissipation
Operating Ambient Temperature
Storate Temperature
SYMBOL
RATINGS
VEXT
Visen
VIN
VCE
VCLK
VCC
VOUT
IEXT
Pd
Topr
Tstg
-0.3~+22
-0.3~+22
-0.3~+22
-0.3~+22
-0.3~+22
-0.3~+22
-0.3~+22
±100
150
-40~+85
-40~+125
Ta=25OC
UNITS
V
V
V
V
V
V
V
mA
mW
O
C
O
C
2
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Electrical Characteristics
XC9101C25AKR
VOUT=2.5V, FOSC=300kHz, Ta=25OC
PARAMETER
SYMBOL
Output Voltage
Maximum Operating Voltage
VOUT
VINmax
VST1
IOUT=300mA
IDD1
IDD2
ISTB
FOSC
∆FOSC
VOUT=Set Output Voltage × 0.95, CE=VIN
Minimum Operating Voltage
Supply Current 1
Supply Current 2
Stand-by Current
CLK Oscillation Frequency
Frequency Input Stability
CONDITIONS
MIN.
TYP.
MAX. UNITS
2.438
2.500
2.562
20
2.0
V
V
V
µA
µA
CIRCUITS
X
Y
Y
Y
Z
Z
VOUT=Set Output Voltage + 0.5, CE=VIN
VIN=20V, CE=VSS
RT=3.0kΩ, CT=270pF
VIN=2.0V~16V
130
20
0.3
300
5
%/V
VIN=2.0V
±10
%
Z
83
400
%
mA
\
\
83
%
150
1
mV
V
V
Ω
Ω
\
]
\
\
[
[
X
`
^
µA
kHz
∆VIN ⋅ FOSC
Frequency Temperature Fluctuation
∆FOSC
∆TOPR ⋅ FOSC
Maximum Duty Cycle
Current Limiter PFM
Current Limiter Maximum Duty Cycle
Current Limiter SENSE Voltage
CE "High" Voltage
CE "Low" Voltage
EXT "High" ON Resistance
EXT "Low" ON Resistance
Efficiency
Soft-start Time
CC/GAIN Pin Output Impedance
MAXDTY VOUT=VSS (Max.duty of PWM)
IPFM
Average SENSE Current (XC9102)
Operation switches to PWM when
exceeding this value.
IPFMDTY Max.duty of PFM
CLIM
Rsen : Resistance Voltage
VCEH
Existance of CLK Oscillation
VCEL
Dissapearance of CLK Oscillation
REXTH EXT=VIN - 0.5V, VOUT = VSS
REXTL EXT=0.5V, VOUT=Set Voltage x 1.05
EFFI
VIN=2.0V, *1
CE/SS 240kΩ, 0.0047pF connected *2
TSS
RCCGAIN
VIN = 2.0V unless specified
*1 : EFFI = {[(Output Voltage) × (Output Current)] ÷ [(Input Voltage) × (Input Current)]} × 100
*2 : Soft-start Time Measuring CE : 0V→ 3.0V
3
0.9
16
16
85
5
500
%
mS
kΩ
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Electrical Characteristics
XC9101C33AKR
VOUT=3.3V, FOSC=300kHz, Ta=25OC
PARAMETER
SYMBOL
Output Voltage
Maximum Operating Voltage
Minimum Operating Voltage
Supply Current 1
Supply Current 2
VOUT
VINmax
VST1
IDD1
IDD2
Stand-by Current
CLK Oscillation Frequency
Frequency Input Stability
ISTB
FOSC
∆FOSC
CONDITIONS
IOUT=300mA
MIN.
TYP.
MAX. UNITS
3.218
20
3.300
3.383
2.0
VOUT=Set Output Voltage × 0.95, CE=VIN
VOUT=Set Output Voltage + 0.5, CE=VIN
VIN=20V, CE=VSS
RT=3.0kΩ, CT=270pF
VIN=2.0V~16V
130
20
V
V
V
µA
µA
µA
CIRCUITS
X
Y
Y
Y
Z
Z
0.3
300
5
%/V
±10
%
Z
83
400
%
mA
\
\
83
%
150
1
0.9
16
16
85
5
500
mV
V
V
Ω
Ω
\
]
\
\
[
[
X
`
^
kHz
∆VIN ⋅ FOSC
Frequency Temperature Fluctuation
∆FOSC
VIN=2.0V
∆TOPR ⋅ FOSC
Maximum Duty Cycle
Current Limiter PFM
Current Limiter Maximum Duty Cycle
Current Limiter SENSE Voltage
CE "High" Voltage
CE "Low" Voltage
EXT "High" ON Resistance
EXT "Low" ON Resistance
Efficiency
Soft-start Time
CC/GAIN Pin Output Impedance
MAXDTY VOUT=VSS (Max.duty of PWM)
IPFM
Average SENSE Current (XC9102)
Operation switches to PWM when
exceeding this value.
IPFMDTY Max.duty of PFM
CLIM
VCEH
VCEL
Rsen : Resistance Voltage
Existance of CLK Oscillation
Dissapearance of CLK Oscillation
EXT=VIN - 0.5V, VOUT = VSS
REXTH
REXTL EXT=0.5V, VOUT=Set Voltage x 1.05
EFFI
VIN=2.0V, *1
CE/SS 240kΩ, 0.0047pF connected *2
TSS
RCCGAIN
VIN = 2.0V unless specified
*1 : EFFI = {[(Output Voltage) × (Output Current)] ÷ [(Input Voltage) × (Input Current)]} × 100
*2 : Soft-start Time Measuring CE : 0V→ 3.0V
4
%
mS
kΩ
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Electrical Characteristics
VOUT=5.0V, FOSC=300kHz, Ta=25OC
XC9101C50AKR
PARAMETER
SYMBOL
Output Voltage
VOUT
VINmax
Maximum Operating Voltage
Minimum Operating Voltage
Supply Current 1
Supply Current 2
Stand-by Current
CLK Oscillation Frequency
Frequency Input Stability
VST1
IDD1
IDD2
ISTB
FOSC
∆FOSC
CONDITIONS
IOUT=300mA
MIN.
TYP.
MAX. UNITS
4.875
20
5.000
5.125
VOUT=Set Output Voltage + 0.5, CE=VIN
VIN=20V, CE=VSS
RT=3.0kΩ, CT=270pF
VIN=2.0V~16V
CIRCUITS
X
130
20
0.3
V
V
µA
µA
µA
300
5
%/V
±10
%
Z
83
400
%
mA
\
\
\
]
\
\
[
[
X
`
^
2.0
VOUT=Set Output Voltage × 0.95, CE=VIN
V
kHz
Y
Y
Y
Z
Z
∆VIN ⋅ FOSC
Frequency Temperature Fluctuation
∆FOSC
VIN=2.0V
∆TOPR ⋅ FOSC
Maximum Duty Cycle
Current Limiter PFM
MAXDTY VOUT=VSS (Max.duty of PWM)
IPFM
Average SENSE Current (XC9102)
Operation switches to PWM when
exceeding this value.
IPFMDTY Max.duty of PFM
83
%
Current Limiter SENSE Voltage
CLIM
Rsen : Resistance Voltage
150
CE "High" Voltage
CE "Low" Voltage
EXT "High" ON Resistance
VCEH
VCEL
Existance of CLK Oscillation
Dissapearance of CLK Oscillation
EXT=VIN - 0.5V, VOUT = VSS
1
0.9
16
16
85
5
500
mV
V
V
Ω
Ω
Current Limiter Maximum Duty Cycle
EXT "Low" ON Resistance
Efficiency
Soft-start Time
CC/GAIN Pin Output Impedance
REXTH
REXTL EXT=0.5V, VOUT=Set Voltage x 1.05
EFFI
VIN=2.0V, *1
CE/SS 240kΩ, 0.0047pF connected *2
TSS
RCCGAIN
VIN = 2.0V unless specified
*1 : EFFI = {[(Output Voltage) × (Output Current)] ÷ [(Input Voltage) × (Input Current)]} × 100
*2 : Soft-start Time Measuring CE : 0V→ 3.0V
5
%
mS
kΩ
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Electrical Characteristics
VOUT=2.7V, FOSC=300kHz, Ta=25OC
XC9101D09AKR
PARAMETER
SYMBOL
FB Voltage
VOUT
VINmax
Maximum Operating Voltage
Minimum Operating Voltage
Supply Current 1
Supply Current 2
Stand-by Current
CLK Oscillation Frequency
Frequency Input Stability
VST1
IDD1
IDD2
ISTB
FOSC
∆FOSC
CONDITIONS
IOUT=300mA
MIN.
TYP.
MAX. UNITS
0.878
20
0.900
0.923
VOUT=Set Output Voltage + 0.5, CE=VIN
VIN=20V, CE=VSS
RT=3.0kΩ, CT=270pF
VIN=2.0V~20V
CIRCUITS
_
130
20
0.3
V
V
µA
µA
µA
300
5
%/V
±10
%
Z
83
400
%
mA
\
\
83
%
150
1
0.9
16
16
85
5
500
mV
V
V
Ω
Ω
\
]
\
\
[
[
_
a
^
2.0
VOUT=Set Output Voltage × 0.95, CE=VIN
V
kHz
Y
Y
Y
Z
Z
∆VIN ⋅ FOSC
Frequency Temperature Fluctuation
∆FOSC
VIN=2.0V
∆TOPR ⋅ FOSC
Maximum Duty Cycle
Current Limiter PFM
Current Limiter Maximum Duty Cycle
Current Limiter SENSE Voltage
CE "High" Voltage
CE "Low" Voltage
EXT "High" ON Resistance
EXT "Low" ON Resistance
Efficiency
Soft-start Time
CC/GAIN Pin Output Impedance
MAXDTY VOUT=VSS (Max.duty of PWM)
IPFM
Average SENSE Current (XC9102)
Operation switches to PWM when
exceeding this value.
IPFMDTY Max.duty of PFM
CLIM
Rsen : Resistance Voltage
VCEH
Existance of CLK Oscillation
VCEL
Dissapearance of CLK Oscillation
REXTH EXT=VIN - 0.5V, VOUT = VSS
REXTL EXT=0.5V, VOUT=Set Voltage x 1.05
EFFI
VIN=2.0V, *1
CE/SS 240kΩ, 0.0047pF connected *2
TSS
RCCGAIN
VIN = 2.0V unless specified
*1 : EFFI = {[(Output Voltage) × (Output Current)] ÷ [(Input Voltage) × (Input Current)]} × 100
*2 : Soft-start Time Measuring CE : 0V→ 3.0V
6
%
mS
kΩ
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Test Circuits
Fig. X
Fig. Y
SD
47µH
NMOS
1 EXT
Vss 8
2 Isen
Vout 7
3 VIN
GAIN 6
100mΩ
0.1uF
RL
A
CLK 5
Vout/FB7
3 VIN
GAIN 6
CLK 5
0.1uF
470pF
10KΩ
2 Isen
4 CE/SS
22uF
0.047uF
Vss 8
V
240kΩ
4 CE/SS
1 EXT
300pF
Fig. Z
10KΩ
300pF
10KΩ
300pF
Fig. [
H
Vss 8
1 EXT
A
2 Isen
Vout/FB7
3 VIN
GAIN 6
4 CE/SS
1 EXT
Vss 8
2 Isen
Vout/FB7
3 VIN
GAIN 6
L
4 CE/SS
CLK 5
0.1uF
V
10KΩ
CLK 5
0.1uF
300pF
Fig. \
Fig. ]
1 EXT
V
Vss 8
1 EXT
Vss 8
2 Isen
Vout/FB7
2 Isen
Vout/FB7
3 VIN
GAIN 6
3 VIN
GAIN 6
V
0.1uF
4 CE/SS
A
4 CE/SS
CLK 5
10KΩ
300pF
Fig. ^
47uH
Vss 8
2 Isen
Vout 7
3 VIN
GAIN 6
300pF
10KΩ
Fig. _
1 EXT
CLK 5
0.1uF
V
SD
NMOS
R1
1000pF
1 EXT
100mΩ
Vss 8
2 Isen
FB 7
3 VIN
GAIN 6
R2
4 CE/SS
10KΩ
47uH
300pF
10KΩ
0.047uF
300pF
22uF
470pF
Fig. a
SD
47uH
NMOS
SD
NMOS
1 EXT
Vss 8
2 Isen
Vout 7
100mΩ
3 VIN
RL
GAIN 6
R1
1000pF
1 EXT
Vss 8
2 Isen
FB 7
3 VIN
GAIN 6
100mΩ
V
240kΩ
R2
RL
240kΩ
0.1uF
4 CE/SS
V
4 CE/SS CLK 5
220uF
V
0.1uF
Fig. `
RL
240kΩ
CLK 5
CLK 5
0.1uF
22uF
0.047uF
4 CE/SS CLK 5
470pF
10KΩ
300pF
0.047uF
7
470pF
10KΩ
300pF
22uF
V
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Block Diagram
Current Limit
Protection
EXT timing
control logic
EXT
VSS
PFM/PWM
switch logic
VOUT/FB
Isen
+
R1
RVerr
Limitter comp.
+
+
PWM
PFM/PWM comp.
VIN
CE/SS
Internal Voltage
Regulator
Chip Enable,
Soft Start up
-
Verr
+
MIX +
-
+
R2
CC/GAIN
Ierr
1.8V
to internal
circuit
CE,UVLO
to internal
circuit
+
Sawtooth Wave,
Internal CLK
generator
Sampling
CLK
Vref generator
0.9V
Operation Description
Step-up DC/DC converter controllers of the XC9101/9102 series carry out pulse width modulation (PWM) according
to the multiple feedback signals of the output voltage and coil current. The XC9102 series achieves high efficiency
within a wide load range, shifting to pulse frequency modulation (PFM) under a light load condition.
The internal circuits consist of different blocks that operate at VIN or the stabilized power (1.8 V) of the internal
regulator. The output setting voltage of type C controller and the FB pin voltage (Vref = 0.9 V) of type D controller
have been adjusted and set by laser-trimming.
<Clock>
With regard to clock pulses, a capacitor and resistor connected to the CLK pin generate sawtooth waveforms
whose top and bottom are 0.7 V and 0.15 V, respectively. The frequency can be set within a range of 100 to 600
kHz by external constants (see the section "Functional Settings" for constants). The clock pulses are processed to
generate a signal used for synchronizing internal sequence circuits.
<Verr amplifier>
The Verr amplifier is designed to monitor the output voltage. A fraction of the voltage applied to internal resistors
(R1, R2) in the case of a type C controller, and the voltage of the FB pin in the case of a type D controller are fed
back and compared with the reference voltage. In response to feedback of a voltage lower than the reference
voltage, the output voltage of the Verr amplifier increases.
The output of the Verr amplifier goes directly to the PFM/PWM switch logic and is also led to the mixer via a
resistor (RVerr). The former signal acts as a voltage sensor in PFM mode. The latter signal works as a pulse width
control signal in PWM mode. Connecting an external capacitor and resistor makes it possible to set the gain and
frequency characteristics of Verr amplifier signals (see the section "Functional Settings" for constants).
<Ierr amplifier>
The Ierr amplifier monitors the coil current. The potential difference between the VIN and Isen pins are sampled
each time of switching operation. Then the potential difference is amplified or held, as necessary, and input to the
mixer. The Ierr amplifier outputs a signal ensuring that the greater the potential difference between the VIN and Isen
pins, the smaller the switching current. The gain and frequency characteristics of this amplifier are fixed internally.
8
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
<Mixer and PWM>
The mixer modulates the signal sent from Verr by the signal from Ierr. The modulated signal enters the PWM
comparator for comparison with the sawtooth pulses generated at the CLK pin. If the signal is greater than the
sawtooth waveforms, a signal is sent to the output circuit to turn on the external switch.
<Current Limiter>
The current flowing through the coil is monitored by the limiter comparator via the VIN and Isen pins. The limiter
comparator outputs a signal when the potential difference between the VIN and Isen pins reaches 150 mV or more.
This signal is converted to a logic signal and handled as a DFF reset signal for the internal limiter circuit. When a
reset signal is input, a signal is output immediately at the EXT pin to turn off the MOS switch. When the limiter
comparator sends a signal to enable data acceptance, a signal to turn on the MOS switch is output at the next
clock pulse. If at this time the potential difference between the VIN and Isen pins is great, operation is repeated to
turn off the MOS switch again. DFF operates in synchronization with the clock signal of the CLK pin.
Limiter signal
/RESET
PWM/PFM switching signal
CLK sync signal
D
CLK
Q
Output signal to EXT pin
PWM/PFM switching signal
<Soft Start>
The soft start function is made available by attaching a capacitor and resistor to the CE/SS pin. The Vref voltage
applied to the Verr amplifier is restricted by the start-up voltage of the CE/SS pin. Doing so ensures that the Verr
amplifier operates with its two inputs in balance, thereby preventing the ON-TIME signal from becoming stronger
than necessary. Consequently, soft start time needs to be set sufficiently longer than the time set to CLK. The
start-up time of the CE/SS pin equals the time set for soft start (see the section "Functional Settings" for constants).
<PWM/PFM Switching>
The controllers of the XC9102 series switch between PFM and PWM modes automatically. The PFM/PWM
comparator monitors the current each time switching occurs. When the current decreases to a certain value or
below, a shift from PWM to PFM mode occurs.
To be specific, current-limiting PFM is carried out in the PFM mode. When VOUT (or the FB voltage in the case of
type D) decreases below the set value, the Verr amplifier sends a signal directly to the logic block to turn on the
external MOS switch. An ON signal is output from the EXT pin in synchronization with the clock signal of the CLK
pin. When the external MOS switch is turned on, a current flows through the coil at the same time. The external
MOS switch is turned off by a current-limit signal of the limiter comparator (set to a different level than the limiter
voltage in PWM mode), the leading edge of the next clock signal, or an increase in the output voltage. The logic is
programmed for the PFM mode so that a signal is generated in synchronization with the leading edge of the clock
signal at CLK to turn off the external switch for a fixed period.
The controller stops required operation if the output voltage exceeds the set value after a single cycle of switching
operation and waits for another drop in the output voltage. If the set value is not exceeded, pulses are output
successively. Since the current flowing through the coil is limited by the limiter comparator, output voltage ripple is
held below a certain value.
If the PFM/PWM comparator indicates PWM mode constantly as a result of frequent occurrence of successive
pulses, the controller operates in PWM mode continuously. As the PWM mode is active constantly behind the PFM
mode, shifting between modes occurs smoothly. Clock pulses at the CLK pin do not stop even in PFM mode.
9
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Functional Settings
1. Soft Start
CE and soft start (SS) functions are commonly assigned to the CE/SS pin. The soft start function is effective
until the voltage at the CE pin reaches approximately 1.55 V rising from 0 V. Soft start time is approximated by
the equation below according to values of Vcont, Rss, and Css.
T = -Css x Rss x ln((Vcont - 1.55)/Vcont)
Example: When Css = 0.1 µF, Rss = 470 kΩ, and Vcont = 5 V, T = -0.1 e-6 x 470 e3 x ln ((5 - 1.55)/5) = 17.44
ms.
CE/SS pin
[Inside IC, XC9101/02]
Rss
Vcont
CE,
UVLO
Css
Vref
circuit
Set the soft start time to a value sufficiently longer than the period of a clock pulse.
> Circuit example 1: Nch open drain
Vcont
[Inside IC, XC9101/02]
Rss
CE/SS pin
ON/OFF signal
Css
> Circuit example 2: CMOS logic (low current dissipation)
Vcont
[Inside IC, XC9101/02]
Rss
CE/SS pin
ON/OFF signal
Css
> Circuit example 3: CMOS logic (low current dissipation), quick off
Vcont
[Inside IC, XC9101/02]
Rss
ON/OFF signal
CE/SS pin
Css
10
To Verr amplifier
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
2. Oscillation Frequency
The oscillation frequency of the internal clock generator is approximated by the following equation according to
the values of capacitor and resistor attached to the CLK pin.
f = 1/(-Cclk x Rclk x ln0.2)
Example: When Cclk = 330 pF and Rclk = 5 kΩ, f = 1/(-330e-12 x 5e3 x ln(0.2)) = 376.56 kHz.
[Inside IC, XC9101/02]
CLK pin
Rclk
Cclk
CLK Generater
3. Gain and Frequency Characteristics of the Verr Amplifier
The gain at output and frequency characteristics of the Verr amplifier are adjusted by the values of capacitor
and resistor attached to the CC/GAIN pin. It is generally recommended to attach a CC of 220 to 1,000 pF
without an RGAIN. The greater the CC value, the more stable the phase and the slower the transient response.
[Inside IC, XC9101/02]
CC/GAIN pin
-
Vout/FB
+
Vref
Verr
CC
RGAIN
RVerr
4. Current Limiting
The current limiting value is approximated by the following equation according to resistor Rsen inserted
between the VIN and Isen pins. Double function, current FB input and current limiting, is assigned to the Isen
pin.
Ilimit = 0.15/Rsen
Example: When Rsen = 100 mΩ, Ilimit = 0.15/0.1 = 1.5 A
[Inside IC, XC9101/02]
Isen pin
Rsen
+
Comparator with
150-mV offset
VIN pin
11
Limiter signal
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
5. FB Voltage and Cfb
With regard to the XC9101D series, the output voltage is set by attaching externally dividing resistors. The
output voltage is determined by the equation shown below according to the values of Rfb1 and Rfb2. In
general, the sum of Rfb1 and Rfb2 should be 1 MEG Ω or less.
VOUT = 0.9 x (Rfb1 + Rfb2)/Rfb2
The value of Cfb (phase compensation capacitor) is approximated by the following equation according to the
values of Rfb1 and fzfb. The value of fzfb should be 10 kHz, as a general rule.
Cfb = 1/(2 x π x Rfb1 x fzfb)
Example: When Rfb1 = 455 kΩ and Rfb2 = 100 kΩ, VOUT = 0.9 x (455 k + 100 k)/100 k = 4.995 V and Cfb =
1/(2 x π x 455 k x 10 k) = 34.98 pF.
[Inside IC, XC9101/02]
Output voltage
Cfb
Rfb1
FB pin
Rfb2
Verr
+
0.9 V
Verr amplifier
12
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Typical Application Circuits
XC9101C33AKR
22µH
SD
3.3V
~1.5A
NMOS
1 EXT
VSS 8
2 Isen
VOUT 7
100mΩ
3 VIN
CC/GAIN 6
240kΩ
470pF
4 CE/SS
2.0V
220µF
CLK 5
270pF
1µF
~20kΩ
47µF(OS)
or
10µF(ceramic)×2
0.047µF
PMOS : XP161A1355PR (TOREX)
Coil : 22µH (CDRH127 SUMIDA)
Resistor : 100mΩ for Isen (NPR1 KOWA), 20kΩ (trimmer) for CLK, 240kΩ for SS
Capacitors : 270pF (ceramic) for CLK, 470pF (ceramic) for CC/GAIN, 0.047µF (any) for SS, 1µF (ceramic) for Bypass
47µF (OS) or 10µF (ceramic) × 2 for CL
SD : U3FWJ44N (TOSHIBA)
XC9101C50AKR
22µH
SD
5.0V
~1.5A
NMOS
1 EXT
VSS 8
2 Isen
VOUT
3 VIN
CC/GAIN 6
7
100mΩ
240kΩ
2.0V
470pF
4 CE/SS
CLK 5
220µF
1µF
270pF
0.047µF
~20kΩ
47µF(OS)
or
10µF(ceramic)×2
PMOS : XP161A1355PR (TOREX)
Coil : 22µH (CDRH127 SUMIDA)
Resistor : 100mΩ for Isen (NPR1 KOWA), 20kΩ (trimmer) for CLK, 240kΩ for SS
Capacitors : 270pF (ceramic) for CLK, 470pF (ceramic) for CC/GAIN, 0.047µF (any) for SS, 1µF (ceramic) for Bypass
47µF (OS) or 10µF (ceramic) × 2 for CL
SD : U3FWJ44N (TOSHIBA)
13
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
XC9101D09AKR
22µH
SD
NMOS
2.7V
~1.5A
47pF
1 EXT
VSS 8
2 Isen
FB 7
330kΩ
100mΩ
240kΩ
3 VIN
~100kΩ
CC/GAIN 6
470pF
CLK 5
4 CE/SS
2.0V
220µF
0.047µF
330pF
1µF
47µF(OS)
or
10µF(ceramic)×2
~20kΩ
PMOS : XP161A1355PR (TOREX)
Coil : 22µH (CDRH127 SUMIDA)
Resistors : 100mΩ for Isen (NPR1 KOWA), 20kΩ (trimmer) for CLK, 240kΩ for SS, 330kΩ for Output Voltage,
100kΩ (trimmer) for Output Voltage
Capacitors : 330pF (ceramic) for CLK, 470pF (ceramic) for CC/GAIN, 0.047µF (any) for SS, 1µF (ceramic) for Bypass
47pF (ceramic) for FB, 47µF (OS) or 10mF (ceramic) × 2 for CL
SD : U3FWJ44N (TOSHIBA)
XC9101D09AKR
22µH
SD
NMOS
2.7V
~2A
47pF
1 EXT
VSS 8
2 Isen
FB 7
330kΩ
50mΩ
240kΩ
3 VIN
~100kΩ
CC/GAIN 6
470pF
4 CE/SS
2.0V
CLK 5
220µF
0.047µF
1µF
330pF
~20kΩ
47µF(OS)
or
10µF(ceramic)×2
PMOS : XP161A1355PR (TOREX)
Coil : 22µH (CDRH127 SUMIDA)
Resistors : 50mΩ for Isen (NPR1 KOWA), 20kΩ (trimmer) for CLK, 240kΩ for SS, 330kΩ for Output Voltage,
100kΩ (trimmer) for Output Voltage
Capacitors : 330pF (ceramic) for CLK, 470pF (ceramic) for CC/GAIN, 0.047µF (any) for SS, 1µF (ceramic) for Bypass
47pF (ceramic) for FB, 47µF (OS) or 10µF (ceramic) × 2 for CL
SD : U3FWJ44N (TOSHIBA)
14
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Notes on Use
1. The XC9101/9102 series are designed for use with a ceramic capacitor as output capacitor. If, however, the
potential difference between input and output is too large, a ceramic capacitor may fail to absorb the resulting
high switching energy. Then the output may present unusual oscillations. If the input-output potential
difference is large, connect an electrolytic capacitor in parallel to compensate for insufficient capacitance.
2. The EXT pin of an IC of the XC9101/9102 series is designed to minimize the through current that occurs in the
internal circuitry. However, the gate drive of external PMOS has a low impedance for the sake of speed.
Therefore, if the input voltage is high and the bypass capacitor is attached away from the IC, the
charge/discharge current to the external PMOS may cause unstable operation due to switching operation of the
EXT pin.
As a solution to this problem, place the bypass capacitor as close to the IC as possible, so that voltage
variations at the VIN and VSS pins caused by switching are minimized. If this is not effective, insert a resistor of
several to several tens of ohms between the EXT pin and PMOS gate. Remember that the insertion of a
resistor slows down the switching speed and may result in reduced efficiency.
3. A PNP transistor can be used in place of PMOS. In this case, insert a resistor (Rb) and capacitor (Cb) between
the EXT pin and the base of the PNP transistor in order to limit the base current without slowing the switching
speed. Adjust Rb in a range of 500 Ω to 1 kΩ according to the load and hFE of the transistor. Use a ceramic
capacitor as Cb, complying with Cb < 1/(2 x π x Rb x Fosc x 0.7), as a rule.
[Inside IC, XC9101/02]
EXT pin
Rb
VIN
Cb
N. B.
Ensure that the absolute maximum ratings of external components and the XC9101/9102 series are not exceeded.
The characteristics of a DC/DC converter depend largely on external components as well as on the characteristics
of the XC9101/9102 series. Refer to the specifications of each component and take sufficient care when selecting
components.
Place external components in the proximity of the IC. Use thick and short connecting wires to reduce wiring
impedance. In particular, minimize the distance between the bypass capacitor and the IC.
Wire the IC to ground sufficiently. Variations in ground potential caused by ground current at the time of switching
may result in unstable operation of the IC. Specifically, provide sufficient ground wiring in the proximity of the Vss
pin.
15
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
XC9101C33A 180kHz
(1) Output Voltage vs. Output Current Topr = 25OC
VIN=2.5V, 3.0V
Output Voltage: VOUT (V)
3.6
3.5
3.4
3.3
3.2
3.1
3.0
1
10
100
1000
Output Current: IOUT (mA)
(2) Efficiency vs. Output Current
Topr = 25OC
VIN=2.5V
3.0V
Efficiency: EFFI (%)
100
80
60
40
1
10
100
1000
Output Current: IOUT (mA)
(3) Ripple Voltage vs. Output Current
Topr = 25OC
VIN=2.5V
3.3V
Ripple: Vr (mVp-p)
300
250
200
150
100
50
0
1
10
100
1000
Output Current: IOUT (mA)
Tr: XP161A1355PR
SD: U3FWJ44N
CIN: 220µF
CL: 10µF × 4
L: 22µH
CE/SS: 0.047µF+240kΩ
Rsen: 0.1Ω
CDD: 1µF
CC/GAIN: 330pF
CLK: 220pF+20kΩ
(TOREX)
(TOSHIBA)
(Aluminium electrolyic Capacitor)
(Ceramic Capacitor)
(Sumida: CDRH127)
(Ceramic Capacitor + Resistor)
16
(Ceramic Capacitor)
(Ceramic Capacitor)
(Ceramic Capacitor + Resistor)
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
XC9101C33A 330kHz
(1) Output Voltage vs. Output Current Topr = 25OC
Output Voltage: VOUT (V)
VIN=2.5V, 3.0V
3.6
3.5
3.4
3.3
3.2
3.1
3.0
1
10
100
1000
Output Current: IOUT (mA)
(2) Efficiency vs. Output Current
Topr = 25OC
VIN=2.5V
3.0V
Efficiency: EFFI (%)
100
80
60
40
1
10
100
1000
Output Current: IOUT (mA)
(3) Ripple Voltage vs. Output Current
Topr = 25OC
VIN=2.5V 3.0V
Ripple Vr: (mvp-p)
300
250
200
150
100
50
0
1
Tr: XP161A1355PR
SD: U3FWJ44N
CIN: 220µF
CL: 10µF × 4
L: 10µH
CE/SS: 0.047µF+240kΩ
10
100
Output Current IOUT (mA)
Rsen: 0.1Ω
CDD: 1µF
CC/GAIN: 330pF
CLK: 220pF+10kΩ
(TOREX)
(TOSHIBA)
(Aluminium electrolyic Capacitor)
(Ceramic Capacitor)
(Sumida: CDRH127)
(Ceramic Capacitor + Resistor)
17
1000
(Ceramic Capacitor)
(Ceramic Capacitor)
(Ceramic Capacitor + Resistor)
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
XC9101C50A 180kHz
(1) Output Voltage vs. Output Current Topr = 25OC
VIN=2.5V, 3.0V, 4.2V
Output Voltage: VOUT (V)
5.3
5.2
5.1
5.0
4.9
4.8
4.7
1
10
100
1000
Output Current: IOUT (mA)
(2) Efficiency vs. Output Current
Topr = 25OC
VIN=2.5V
3.3V
4.2V
Efficiency: EFFI (%)
100
80
60
40
1
10
100
1000
Output Current: IOUT (mA)
(3) Ripple Voltage vs. Output Current
Topr = 25OC
VIN=2.5V 3.3V 4.2V
300
Ripple:Vr(mvp-p)
250
200
150
100
50
0
1
10
100
1000
Output Current IOUT (mA)
Tr: XP161A1355PR
SD: U3FWJ44N
CIN: 220µF
CL: 10µF × 4
L: 22µH
CE/SS: 0.047µF+240kΩ
Rsen: 0.1Ω
CDD: 1µF
CC/GAIN: 330pF
CLK: 220pF+20kΩ
(TOREX)
(TOSHIBA)
(Aluminium electrolyic Capacitor)
(Ceramic Capacitor)
(Sumida: CDRH127)
(Ceramic Capacitor + Resistor)
18
(Ceramic Capacitor)
(Ceramic Capacitor)
(Ceramic Capacitor + Resistor)
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
XC9101C50A 330kHz
(1) Output Voltage vs. Output Current Topr = 25OC
VIN=2.5V, 3.0V, 4.2V
Output Voltage: VOUT (V)
5.3
5.2
5.1
5.0
4.9
4.8
4.7
1
10
100
1000
Output Current: IOUT (mA)
(2) Efficiency vs. Output Current
Topr = 25OC
VIN=2.5V
3.3V
4.2V
Efficiency: EFFI (%)
100
80
60
40
1
10
100
1000
Output Current: IOUT (mA)
(3) Ripple Voltage vs. Output Current
Topr = 25OC
VIN=2.5V
3.3V
4.2V
Ripple: Vr (mvp-p)
300
250
200
150
100
50
0
1
10
100
1000
Output Current IOUT (mA)
Tr: XP161A1355PR
SD: U3FWJ44N
CIN: 220µF
CL: 10µF × 4
L: 10µH
CE/SS: 0.047µF+240kΩ
Rsen: 0.1Ω
CDD: 1µF
CC/GAIN: 330pF
CLK: 220pF+10kΩ
(TOREX)
(TOSHIBA)
(Aluminium electrolyic Capacitor)
(Ceramic Capacitor)
(Sumida: CDRH127)
(Ceramic Capacitor + Resistor)
19
(Ceramic Capacitor)
(Ceramic Capacitor)
(Ceramic Capacitor + Resistor)
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Packaging Information (Dimensions : mm)
MSOP-8A : 1,000pcs. / reel
+0. 08
- 0. 02
4. 90 +0. 10
3. 00 +0. 10
0. 53 + 0. 13
0. 15
3. 00 + 0. 10
O
0. 30
+0. 08
- 0. 02
( 0. 65)
- 0. 21
+0. 20
1. 02
- 0. 10
0. 00~0. 20
0. 86
+0. 11
0 ~6
20
XC9101/02 Series
PWM Controlled, PWM//PFM Switchable Step-Up DC/DC Converters
Recommended Pattern Layout (Dimensions : mm)
3
0. 85
3
4. 45
0. 325
0. 65
21