SD42C/P1008 Semiconductor 4Bit Single Chip Microcontroller Description The SD42C1008 is a microcomputer of the 4-bit single chip microcomputer SD42xx series which can match an 8-bit microcomputer in the data processing capability. The SD42C1008 can handle 1-bit, 4-bit, and 8-bit data as well as operates at high speed (minimum instruction execution time : 0.95us) it contains a LCD pannel controller/driver. Ordering Information Type NO. Marking Package Code SD42C1008 SD42C1008 QFP-80 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 RESETB P53/kS7 P52/kS6 P51/kS5 Pin Configuration 8 7 7 7 7 7 7 7 7 7 7 6 6 6 6 6 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 SEG12 1 64 P50/kS4 SEG13 2 63 P43/kS3 SEG14 3 62 P42/kS2 SEG15 4 61 P41/kS1 SEG16 5 60 P40/kS0 SEG17 6 59 X0 SEG18 7 58 XI SEG19 8 57 TEST SEG20 9 56 XTO SEG21 10 55 XTI SEG22 11 54 V SEG23 12 SEG24 13 SEG25 SD42C1008 D D 53 P33 52 5 3P 3 2 14 51 P31 SEG26 15 50 P30 SEG27 16 49 P13/BUZ SEG28 23 42 P00/INT0/TI0 COM3 24 41 P23 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 P22 P01/INT1 P21 43 P83 22 COM2 P20/CL COM1 P82 P02/INT2 P81 44 P80 21 SS P03/INT3 COM0 V 45 P63 20 P62 P10/SCK SEG31 P61 46 P60 19 VLC2 P11/SI SEG30 VLC1 P12/SO 47 VLC0 48 18 BIAS 17 SEG29 KSI-W029-000 1 SD42C/P1008 Features Memory mapped I/O 8-bit serial communication interface - External / Internal clock selection - Mode : Transmit ·Receive Receive only Clock continuous Program memory : 8192 x 10bits Data memory : 512 x 4bits Instructions - Various bit manipulation - 8-bit data operation - 7-bit relative branch - 1 byte absolute call LCD controller/driver - selectable number of segments ; 20/24/28/32 segment (4/8/12 lines can be specified as bit ports) - Display mode selection · Static · 1/2 duty (1/2 bias) · 1/3 duty (1/2 bias) · 1/3 duty (1/3 bias) · 1/4 duty (1/3 bias) Instruction cycle times - Main ( XI = 4.19MHz ) . 15.3 us ( XI/64 = 65.5KHz ) . 1.91 us ( XI/8 = 524.0KHz ) . 0.95 us ( XI/4 = 1.05MHz ) - Sub ( XTI = 32.768KHz ) . 122 us ( XTI/4 = 8.19KHz ) Key scan - 4, 6, 8 Pins Selectable : Port 4, 5 - Falling edge operation 4 Register Bank 64 I/O Pins - LCD driver output pins : 36 . Segment ouput pins : 20 . Segment CMOS output pins : 12 . Common ounput pins : 4 - CMOS input/output pins : 32 General register : 8 x 4-bit respectively Accumulator - Bit Accumulator (CY), 4 bit Accumulator (A), 8 bit Accumulator (XA) Multiple vectored interrupt source - External interrupt : 4 - Internal interrupt : 4 Power saving mode - STOP : Main clock, CPU clock stop - STBY : Only CPU clock stop Main clock operation Watch timer - fast mode : 3.91 msec - normal mode : 0.5 sec - buzzer output : 1, 2, 4 KHz APPLICATION Basic interval timer - 8 kinds of period - Used stabilization wait timer to wake up Stop mode VTR, Camera, Rice Cooker, Telephone Blood Pressure Gauge, CD Player One 8-bit timer / event counter KSI-W029-000 2 SD42C/P1008 BLOCK DIAGRAM BASIC INTERVAL TIMER PORT2 P20 ～ P23 PORT3 P30 ～ P33 PORT6 P60 ～ P63 PORT8 P80 ～ P83 IRQBT TIMER/ EVENT COUNTER SD42 CORE IRQTC0 WATCH TIMER BUZ/P13 IRQWT FLCD SI/P11 SO/P12 VLC0~VLC2 CLOCKED SERIAL INTERFACE SCK/P10 PROGRAM MEMORY DATA MEMORY (8192 X 10BITS) (512 X 4BITS) LCD CONTROL / DRIVER IRQS0 INTERRUPT CONTROL KSI-W029-000 SEG0~SEG19 SEG20~SEG30 (BP0~BP11) BIAS FLCD TEST STOP/ IDLE CONTROL RESETB XTI XTO CLOCK GENERATOR XI P20/CLO CLOCK DIVIDER XO CLOCK OUTPUT CONTROL V SS BIT SEQ. BUFFER(16) DISPLAY RAM CPU CLOCK Fx / 2n V DD TI0/INT0/P00 INT1/P01 INT2/P02 INT3/P03 KS0/P40 KS7/P53 COM0~COM3 3 SD42C/P1008 Program Memory(ROM) Vector Address CONTENTS 0000H Prioty RESET Reset Signal IRQBT Basic Interval Timer IRQ0 External interrupt 0 ZERO-PAGE 0006H 0 1 2 3 IRQ1 External interrupt 1 CALL AREA 0008H 4 IRQTC0 Timer Event Counter 0 6 IRQ2 External interrupt 2 8 9 IRQ3 External interrupt 3 IRQS0 Serial I/O 0 12 13 IRQWT Watch Timer IRQKS Key Scan 15 - reserved VECTOR ADDRESS AREA 0000H 0002H 001FH 0020H INTERRUPT SUORCE 0004H 002FH 000AH 0060H 000CH 000EH 0010H 0012H 0014H 8K Byte 0016H 0018H 001AH 001CH 1FFFH 001EH Data Memory(RAM) DIRECT m INDIRECT @HL $00 PAGE0 (256 Byte) $FF $00 PAGE1 (256 Byte) MB=0 BANK 0 $FF (1K) $00 PAGE2 (256 Byte) $FF $00 PAGE3 (256 Byte) I/O MEMORY MB=0 STACK @DE @DL MP=0 SPS=0 MP=1 SPS=1 MP=2 SPS=2 MP=3 GENERAL REGISTER RB=0 RB=1 RB=2 RB=4 ; Usable $FF KSI-W029-000 4 SD42C/P1008 I/O Address Map ADDRESS Hardware Module Name b3 b2 b1 R/W b0 Addressing Unit 1 bit 4 bit REMARKS 8bit INITIAL VALUE 318H Stack pointer low (SPL) R/W O Stack pointer low E 319H Stack pointer high (SPH) R/W O stack pointer high F 31AH SP3 SP2 SP1 SP0 R/W O Stack Page Select Low (SPSL) 0 31BH - - SP5 SP4 R/W O Stack Page Select High (SPSh) 0 31CH AC IS1 IS0 R/W O Psw low (PSWL) 0 31DH CY OV T Z 320H T/E counter mode register 0 321H (TMOD0) 322H T/E counter register 0 323H (TMCNT0) 324H T/E reference register 0 325H (TMREF0) 332H Basic Timer mode register(BMOD) 334H Basic interval timer count 335H register(BITCNT) 336H Watch timer mode register 337H (WMOD) 390H Lcd display mode register 391H (LCDMD) 392H Lcd control register (LCON) 3A0H Power control register O O Psw high (PSWH) W 320H.3 O Clock source select. counter 0 00 start (ch0) R readable count value (ch0) 00 W count reference register (ch0) FF R/W 332H.3 clock select, Bit start R R/W 336H.3 0 readable count register 00 clock/buzzer select. bit3 00 readable W O duty/bias/clock/seg/bitport 00 select W (PCON) R/W 3A2H Operating mode register (SCMOD) R/W 3A4H Clock output mode register O display ON/OFF O system clock select, idle, stop 0 00 mode O W O (CLOMD) main/sub system clock select 0 cpu clock output select, clock 00 out EN/DIS 3A8H Serial interface mode register0 W 3A8H.3 O 3A9H (SIOM0) 3AAH Serial interface buffer0 3ABH (SBUFF0) 3B2H Power on flag (PONF) P/W 3B2H.0 O power on reset flag 3C2H IME R/W 3C2H.3 O Interrupt priorty select, IME flag. 00 3C3H IPSR3 3C4H External interrupt mode register0 external interrupt 0 edge 00 IPSR2 IPSR1 R/W serial shift register 0 W O External interrupt mode register1 W O 3D9H External interrupt mode register2 W 00 O external interrupt 2 edge 00 detection External interrupt mode register3 IE2 external interrupt 1 edge detection W O (IMOD3) 3D8H 0 detection (IMOD2) 3C7H XX IPSR0 (IMOD1) 3C6H 00 select (IMOD0) 3C5H receive/transmit mode. clock external interrupt 3 edge 00 detection IRQ2 IEBT IRQBT R/W O O Interrupt EN/IRQ flag 0 IEWT IRQWT R/W O O Interrupt EN/IRQ flag 0 KSI-W029-000 5 SD42C/P1008 ADDRESS Hardware Module Name b3 3DAH IEKSF b2 IRQKS 3DBH 3DCH IE1 IRQ1 3DDH b1 R/W b0 Addressing Unit 1 bit 4 bit REMARKS 8bit INITIAL VALUE IES0 IRQS0 R/W O O Interrupt EN/IRQ flag 0 IETC0 IRQTC0 R/W O O Interrupt EN/IRQ flag 0 IE0 IRQ0 R/W O O Interrupt EN/IRQ flag 0 IE3 IRQ3 R/W O O Interrupt EN/IRQ flag 0 R/W O O Interrupt EN/IRQ flag 0 3DEH 3E0H PW03 PW02 PW01 PW00 W O port 0, 1 mode register (PMGA) 00 3E1H PW13 PW12 PW11 PW10 3E2H PW23 PW22 PW21 PW20 3E3H PW33 PW32 PW31 PW30 W O port 2, 3 mode register (PMGB) 00 3E4H PW43 PW42 PW41 PW40 3E5H PW53 PW52 PW51 PW50 W O port 4, 5 mode register (PMGC) 00 3E6H PW63 PW62 PW61 PW60 3E7H PW73 PW72 PW71 PW70 W O port 6, 7 mode register (PMGD) 00 3E8H PW83 PW82 PW81 PW80 3E9H PW93 PW92 PW91 PW90 W O port 8, 9 mode register (PMGE) 00 3F0H PORT0 (R0) R/W O 3F1H PORT1 (R1) R/W O O R0 Port Data Register 0 O R1 Port Data Register 3F2H PORT2 (R2) R/W 0 O O R2 Port Data Register 3F3H PORT3 (R3) 0 R/W O O R3 Port Data Register 3F4H 0 PORT4 (R4) R/W O O R4 Port Data Register 0 3F5H PORT5 (R5) R/W O O R5 Port Data Register 0 3F6H PORT6 (R6) R/W O O R6 Port Data Register 0 3F8H PORT8 (R8) R/W O O R8 Port Data Register 0 O KSI-W029-000 6 SD42C/P1008 Pin Description PIN SHARED SYMBOL PIN P00 INT0/TI0 I/O FUNCTION RESET PORT TYPE I/O - Detection edge selectable INPUT BPS INPUT BPS INPUT BPS - With noise elimination function P01 INT1 P02 INT2 P03 INT3 - Edge detection vectored interrupt I/O input pin (detection edge selectable) - Event pulse input port for timer event counter P10 SCK - Serial clock I/O pin P11 SI P12 SO - Serial data output pin P13 BUZ - Buzzer output pin I/O - Serial data input pin P20 P21 I/O - 4Bit I/O Port INPUT BP I/O - 4Bit I/O Port INPUT BP I/O - Falling edge detection keyscan INPUT BD INPUT BD P22 P23 P30 P31 P32 P33 P40 KS0 P41 KS1 P42 KS2 P43 KS3 P50 KS4 P51 KS5 P52 KS6 P53 KS7 input pin I/O - Falling edge detection keyscan input pin P60 P61 I/O - 4Bit I/O Pin INPUT BP-PDND I/O - 4Bit I/O Pin INPUT BP P62 P63 P80 P81 P82 P83 KSI-W029-000 7 SD42C/P1008 Pin Description PIN SHARED SYMBOL PIN SEG0 ~ I/O FUNCTION RESET PORT TYPE O - Segment signal output pin OP-SEGB O - 1 Bit output port (Bit Port) shared with OP-SEGA SEG19 SEG20 ~ BP0 ~ 11 SEG31 a segment signal output pin COM0 COM1 O - Common signal output OP-COMA COM2 COM3 VLC0 - LCD drive power pin split register network VLC1 (Mask Option) VLC VLC2 BIAS - LCD power supply bias control XI I - Main system clock input XO O - Main system clock output XTI I - Sub system clock input XTO O - Sub system clock output RESETB I - System reset input pin TEST I - Chip function test input pin VLC OSC1 OSC2 IP1 MASK ROM Version IP2 OTP ROM Version BP KSI-W029-000 8 SD42C/P1008 I/O Circuits BP BPS VDD VDD OUTPUT ENABLE VDD PUR (M.O) PAD DATA VDD OUTPUT ENABLE PUR (M.O) PAD DATA VSS VSS INTERNAL INTERNAL BD BP-PDND VDD VDD Output TR Disable (P-CH) PUR (M.O) PAD DATA OUTPUT ENABLE PUR (M.O) OUTPUT ENABLE PAD DATA Output TR Disable (N-CH) VSS VSS INTERNAL INTERNAL OP-COMA OP-SEGA VLC0 VLC0 VLC1 VLC1 COM DATA PAD SEG DATA VLC2 PAD VLC2 NOTE) PUR : Pull-Up Resistor M.O : Mask Option KSI-W029-000 9 SD42C/P1008 OP-SEGB IP1 VDD VDD VLC0 VLC1 SEG DATA PBIT.X DATA PAD PAD VLC2 VSS IP2 VLC V DD PAD BIAS 2R VLC0 R R=90K VLC1 R VLC2 R V SS VSS OSC1 OSC2 XI XO XTI XTO VSS KSI-W029-000 10 SD42C/P1008 Absolute Maximum Ratings (TA = 0℃ to 70℃, VDD = 5V ±10%, fx = 4.19MHz) PARAMETER SYMBOL CONDITION RATING UNIT VDD - -0.3 to +7.0 V Input Voltage VI All I/O ports -0.3 to VDD+0.3 V Output Voltage VO - -0.3 to VDD+0.3 V Output Current High IOH One I/O port active -15 mA All I/O ports active -30 Supply Voltage Output Current Low One I/O port active Peak Value +30 - RMS Value +15 Total value for ports Peak Value +100 P1, P2, P3, P8 RMS Value +60 Total value for ports Peak Value +100 P0, P4, P5, P6 RMS Value +60 mA IOL Operating Temperature TA - -40 to +85 ℃ Storage Temperature Tstg - -55 to +125 ℃ * RMS values are calculated as peak value x Duty * Exceeding beyond those listed values under "Absolute Maximum Ratings" may cause permanent damage to the device. KSI-W029-000 11 SD42C/P1008 DC Electrical Characteristics (VSS = 0, VDD = 5V ±10%, TA = 25℃, fX = 4.19MHz) PARAMETER SYMBOL TEST LIMIT UNIT CONDITION MIN. TYP. MAX. High Level VIH1 Port 0,1 (Schmitt Input) 0.8 VDD - VDD Input Voltage VIH2 XI, XTI VDD-0.5 - VDD VIH3 Port 2,3,4,5,6,8, RESETB, TEST 0.7 VDD - VDD Low Level VIL1 Port 0,1 (Schmitt Input) 0 - 0.2 VDD Input Voltage VIL2 XI, XTI 0 - 0.4 VIL3 Port 2,3,4,5,6,8, RESETB, TEST 0 - 0.3 VDD High Level V Port 0,1,2,3,6 (IOH = - 5mA) 4.2 4.5 - Port 0,1,2,3,6 (IOH = - 100uA) 4.6 4.9 - (IOL = 10mA) - - 2 Port 0,1,2,3,6 (IOL = 10mA) - 0.4 0.6 Port 0,1,2,3,6 (IOL = 1mA) - 0.1 0.3 - 1.2 3 V V VOH Output Voltage Low Level Output Voltage Port 4,5 (Open-Drain) VOL High Level Input Leakage Port 0,1,2,3,4,5,6,8 IIH VPPOEX, XTI, RESETB Current Low Level Input Leakage IIL Supply Current - 5 15 Port 0,1,2,3,4,5,6,8 - -1.2 -3 VPPOEX, XTI, TEST XI Dynamic VDD = 5V ±10% IDD1 (1) uA XI Current Main Clock (XI) = 4.19MHz uA - -5 -15 - - 10 Mode Idle V mA - - 5 Mode KSI-W029-000 12 SD42C/P1008 DC Electrical Characteristic (VSS = 0, VDD = 5V ±10%, TA = 25℃, fx = 4.19MHz) PARAMETER Supply Current SYMBOL TEST IDD2 (1) Main Clock (XI) = 2MHz LIMIT UNIT CONDITION MIN. TYP. MAX. Dynamic - - 2 - - 1 - - 1.5 - - 15 - - 5 Mode VDD = 3V ±10% Idle mA Mode Dynamic IDD3 (2) Sub Clock (XTI) Mode IDD4 = 32.768KHz Idle (2) VDD = 3V ±10% Mode IDD5 Pull-up RL1 Resistor Pull-down Resistor Main Clock (XI) Stop = 4.19MHz Mode - - 3 VI = 0V, V DD = 5V ±10% 20 - 60 VDD = 5V ±10% RESETB RL2 uA VI = 0V, V DD = 5V ±10% Kohm 10 - 30 TEST NOTES ) : (1) Data Include power consumption for subsystem clock oscillation. (2) Main system clock oscillation stops and the subsystem clock is used. KSI-W029-000 13 SD42C/P1008 AC Electrical Characteristics (TA = -40 o +85℃, VDD = 2.7 to 6.0V) PARAMETER Cycle Time SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT 0.95 - 64 uS 3.8 - 64 uS 114 122 125 uS VDD = 4.5 to 6.0V 0 - 1 MHz VDD = 2.7 to 3.3V 0 - 275 KHz tCY VDD = 4.5 to 6.0V Main system clock VDD = 2.7 to 3.3V Sub system clock TI0 Input Frequency fTI TI0 Input High, Low tTIH VDD = 4.5 to 6.0V 0.48 - - uS Level Width tTIL VDD = 2.7 to 3.3V 1.8 - - uS INT0 (1) - - uS tINTH INT1, 2, 3 10 - - uS tINTL KS0 to KS7 10 - - uS Input 800 - - nS Output 1600 - - nS Input 3200 - - nS Output 3800 - - nS Input 400 - - nS Output tKCY /2~50 - - nS Input 1600 - - nS Output tKCY /2~150 - - nS Input 100 - - nS Output 150 - - nS Input 400 - - nS Output 400 - - nS Input - - 300 nS Output - - 250 nS Input - - 1000 nS Output - - 1000 nS 10 - - uS Interrupt Input High, Low Level Width SCK Cycle Time tKCY VDD = 4.5 to 6.0V VDD = 2.7 to 3.3V SCK High, Low Level Width SI Set up Time to tKH VDD = 4.5 to 6.0V tKL VDD = 2.7 to 3.3V tSIK SCK High SI Hold Time to tKSI SCK High SCK to S0 Output tKSO VDD = 4.5 to 6.0V Delay Time VDD = 2.7 to 3.3V RESETB Low Level tRSL (1) 2tcy or 128/f X, depending on the setting of the interrupt mode register. KSI-W029-000 14 SD42C/P1008 AC Timing Measurement Points (Except XI and XTI) Measurement Points 0.8VDD 0.2VDD Clock Timing 0.8V DD 0.2V DD 1/XI tXH tXL XI VDD-0.5V 0.4V 1/XTI tXTH tXTL XTI VDD-0.5V 0.4V Timer Event Counter Timing 1/fTI tTIL TI0 tTIH 0.8VDD 0.2VDD Serial Transfer Timing tKCY tKL tKH SCK 0.8VDD 0.2VDD tSIK SI tKSI 0.8VDD 0.2VDD Input Data tKSO SO Output Data Interrupt Input Timing tINTL INT0~INT3 KS0~KS7 tINTH 0.8VDD 0.2VDD RESETB Input Timing RESETB tRSL 0.2VDD KSI-W029-000 15 SD42C/P1008 RAM Data Retention Characteristics ( in STOP Mode ) (T A = -40 to +85℃) PARAMETER SYMBOL Data Retention Supply Voltage VDDDR Data Retention Supply Current IDDDR Release Signal Set Time tSREL Oscillation Stabilization Wait Time tWAIT TEST CONDITION MIN. TYP. MAX. UNIT 2.0 - 6.0 V - 0.1 10 uA 0 - - uS When released by RESETB - 2 /fx 17 - mS When released by interrupt Signal - NOTE 1) - mS V DDDR = 2.0V NOTE 1) Depends on the setting of the basic interval timer mode register. (refer to the table below) ( fx = 4.19MHz ) BMOD2 BMOD1 BMOD0 Oscillation Stabilization 0 0 0 220/fX (Approximately 250ms) 0 1 1 217/fX (Approximately 31.3ms) 1 0 0 215/fX (Approximately 7.82ms) 1 0 1 213/fX (Approximately 1.95ms) KSI-W029-000 16 SD42C/P1008 RAM Data Retention Timing When STOP mode is released by RESETB input Internal Reset Operation Stabilization Wait Time Operation Mode STOP Mode RAM Data retention V DD VDDDR STOP instruction execution tSREL RESETB tWAIT When STOP mode is released by interrupt signal Stabilization Wait Time Operation Mode STOP Mode RAM Data retention VDD VDDDR STOP instruction execution tSREL tWAIT Interrupt Signal (Rising Edge) KSI-W029-000 17 SD42C/P1008 SD42P1008 Description The SD42P1008 is a system evaluation LSI having a built in One-Time Programming circuit. A programming and verification for the internal EPROM is achieved by using a general EPROM programmer with an adapter socket. The function of this device is exactly same as the SD42C1008 with programming of the internal EPROM. The SD42P1008 is the OTP version of the SD42C1008 with replacement of MASK ROM to EPROM as an internal ROM. Ordering Information Type NO. Marking Package Code SD42P1008 SD42P1008 QFP-80 69 68 67 P51/EPA5/kS5 71 70 P52/EPA6/kS6 72 P53/EPA7/kS7 SEG2 74 73 SEG0 SEG3 75 RESETB SEG4 SEG1 SEG5 SEG7 SEG9 SEG8 77 76 66 65 1 64 P50/EPA4/kS4 P43/EPA3/kS3 2 63 SEG14 3 62 P42/EPA2/kS2 SEG15 4 61 P41/EPA1/kS1 SEG16 5 60 P40/EPA0/kS0 SEG17 6 59 XO SEG18 7 58 XI SEG19 8 57 VPP/OEX SEG20 9 56 XTO SEG21 10 55 XTI SEG22 11 54 VDD SEG23 12 53 P33/EPD3 SEG24 13 52 P32/EPD2 SEG25 14 51 P31/EPD1 SEG26 15 50 P30/EPD0 SEG27 16 49 P13/EPA11/BUZ SEG28 17 48 P12/EPA10/SO SEG29 18 47 P11/EPA9/SI SEG30 19 46 P10/EPA8/SCK SEG31 20 45 P03/INT3 COM0 21 44 P02/CEX/INT2 COM1 22 43 P01/EPA13/INT1 COM2 23 42 P00/EPA12/INT0/T COM3 24 41 P23 39 40 P20/CLO P21 KSI-W029-000 P22 38 P83/EPD4 36 37 P82 P61 34 35 P81 P60 33 P80 VLC2 31 32 VSS 30 P63/TEST 28 29 P62 26 27 VLC1 25 VLC0 SD42P1008 BIAS SEG13 79 78 SEG6 80 SEG12 SEG10 SEG11 Pin Configuration 18 SD42C/P1008 Device Operation The operational modes of the SD42P1008 are listed in Table 1. A single 5V power supply is required in the read mode. All inputs are TTL levels except for VPP / OEX. V PP = 12.5±0.5V . PINS CEX V PP / OEX V DD OUTPUT READ VIL VIL 5.0V DOUT PROGRAM VIL V PP 6.0V DIN VERIFY VIL VIL 6.0V DOUT PROGRAM INHIBIT V IH V PP 6.0V High Z MODE TABLE 1. Operating Modes MODE PIN NAME EPROM MODE USER MODE TEST V IL V IH RESETB V IL V IH V IL TABLE 2. The modes of SD42P1008 DC Programming Characteristics PARAMETER LIMIT SYMBOL UNIT TEST CONDITION MIN. MAX. Input Low Voltage V IL -0.1 0.8 V Input High Voltage V IH 2.0 V DD V Output Low Voltage during Verify V OL IOL = 2.1mA - 0.45 V Output High Voltage during Verify V OH IOH = -400uA 2.4 - V Quick-pulse Programming V PP 12.5 13.0 V Quick-pulse Programming V DD 6.0 6.5 V KSI-W029-000 19 SD42C/P1008 Package Dimension [ UNIT : Millimeter ] 80 QFP 20.0±0.1 3.00MAX 14.0±0.1 17.9±0.25 0.80 0.15±0.05 0.35±0.05 23.9±0.25 1.8±0.2 0.8±0.15 KSI-W029-000 20