BB OPA549

®
OPA549
OPA
549
For most current data sheet and other product
information, visit www.burr-brown.com
High-Voltage, High-Current
OPERATIONAL AMPLIFIER
FEATURES
DESCRIPTION
● HIGH OUTPUT CURRENT:
8A Continuous
10A Peak
The OPA549 is a low-cost, high-voltage/high-current
operational amplifier ideal for driving a wide variety
of loads. This laser-trimmed monolithic integrated
circuit provides excellent low-level signal accuracy,
and high output voltage and current.
The OPA549 operates from either single or dual supplies for design flexibility. The input common-mode
range extends below the negative supply.
The OPA549 is internally protected against overtemperature conditions and current overloads. In addition, the OPA549 provides an accurate, user-selected
current limit. Unlike other designs which use a “power”
resistor in series with the output current path, the
OPA549 senses the load indirectly. This allows the
current limit to be adjusted from 0A to 10A with a
resistor/potentiometer, or controlled digitally with a
voltage-out or current-out DAC.
The Enable/Status (E/S) pin provides two functions. It
can be monitored to determine if the device is in
thermal shutdown, and it can be forced low to disable
the output stage and effectively disconnect the load.
The OPA549 is available in an 11-lead power ZIP
package. Its copper tab allows easy mounting to a heat
sink for excellent thermal performance. Operation is
specified over the extended industrial temperature
range, –40°C to +85°C.
● WIDE POWER SUPPLY RANGE:
Single Supply: +8V to +60V
Dual Supply: ±4V to ±30V
● WIDE OUTPUT VOLTAGE SWING
● FULLY PROTECTED:
Thermal Shutdown
Adjustable Current Limit
● OUTPUT DISABLE CONTROL
● THERMAL SHUTDOWN INDICATOR
● HIGH SLEW RATE: 9V/µs
● CONTROL REFERENCE PIN
● 11-LEAD POWER ZIP PACKAGE
APPLICATIONS
● VALVE, ACTUATOR DRIVER
● SYNCHRO, SERVO DRIVER
● POWER SUPPLIES
● TEST EQUIPMENT
● TRANSDUCER EXCITATION
● AUDIO POWER AMPLIFIER
V+
OPA549
VO
ILIM
Ref
RCL
RCL sets the current limit
value from 0A to 10A.
(Very Low Power Dissipation)
ES Pin
E/S
Forced Low: Output disabled
Indicates Low: Thermal shutdown
V–
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
®
©
1999 Burr-Brown Corporation
PDS-1450A
1
OPA549
Printed in U.S.A. November, 1999
SPECIFICATIONS: VS = ±2.25V to ±18V
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C
At TCASE = +25°C, VS = ±30V, Ref = 0V, and E/S pin open, unless otherwise noted.
OPA549T
PARAMETER
CONDITION
OFFSET VOLTAGE
Input Offset Voltage
vs Temperature
vs Power Supply
MIN
VOS
–500
IOS
–100
±0.5
±5
en
in
f = 1kHz
f = 1kHz
70
1
nV/√Hz
pA/√Hz
(V+) – 2.3
(V–) – 0.2
95
V
V
dB
107 || 6
109 || 4
Ω || pF
Ω || pF
110
100
dB
dB
0.9
9
See Typical Curve
20
0.015
MHz
V/µs
(V+) – 2.7
(V–) + 1.4
(V+) – 4.3
(V–) + 3.9
(V–) + 0.1
V
V
V
V
V
A
Arms
Linear Operation
Linear Operation
VCM = (V–) – 0.1V to (V+) – 3V
AOL
GBW
SR
THD+N
VO = ±25V, RL = 1kΩ
VO = ±25V, RL = 4Ω
(V+) – 3
(V–) – 0.1
80
100
G = 1, 50Vp-p Step, RL = 4Ω
G = –10, 50V Step
f = 1kHz,RL = 4Ω,G = +3, Power = 25W
IO = 2A
IO = –2A
IO = 8A
IO = –8A
RL = 8Ω to V–
Waveform Cannot Exceed 10A peak
(V+) – 3.2
(V–) + 1.7
(V+) – 4.8
(V–) + 4.6
(V–) + 0.3
±8
8
±50
Output Disabled
Output Disabled
See Typical Curve
750
E/S Pin Open or Forced High
E/S Pin Forced Low
E/S Pin Indicates High
E/S Pin Indicates Low
(Ref) + 2.4
Sourcing 20µA
Sinking 5µA, TJ > 160°C
(Ref) + 2.4
–50
–55
1
3
V–
(Ref) + 0.8
(V+) – 8
–3.5
±30
VS
8
IQ
ILIM Connected to Ref IO = 0
ILIM Connected to Ref
±26
±6
–40
–40
–55
60
±35
+85
+125
+125
1.4
30
No Heat Sink
A
A
mA
pF
(Ref) + 0.8
(Ref) + 3.5
(Ref) + 0.2
+160
+140
nA
nA/°C
nA
µs
%
0 to ±10
ILIM = 15800 • 4.75V/(7500Ω + RCL)
±200
±500
See Typical Curve
RCL = 7.5kΩ (ILIM = ±5A), RL = 4Ω
Ref (Reference Pin for Control Signals)
Voltage Range
Current(2)
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
Thermal Resistance, θJC
Thermal Resistance, θJA
mV
µV/°C
µV/V
VCM = 0V
TCASE = –40°C to +85°C
VCM = 0V
OUTPUT
Voltage Output, Positive
Negative
Positive
Negative
Negative
Maximum Continuous Current Output: dc(4)
ac(4)
Output Current Limit
Current Limit Range
Current Limit Equation
Current Limit Tolerance(1)
Capacitive Load Drive (Stable Operation) CLOAD
Output Disabled
Leakage Current
Output Capacitance
OUTPUT ENABLE /STATUS (E/S) PIN
Shutdown Input Mode
VE/S High (output enabled)
VE/S Low (output disabled)
IE/S High (output enabled)
IE/S Low (output disabled)
Output Disable Time
Output Enable Time
Thermal Shutdown Status Output
Normal Operation
Thermally Shutdown
Junction Temperature, Shutdown
Reset from Shutdown
POWER SUPPLY
Specified Voltage
Operating Voltage Range, (V+) – (V–)
Quiescent Current
Quiescent Current in Shutdown Mode
±5
100
INPUT IMPEDANCE
Differential
Common-Mode
FREQUENCY RESPONSE
Gain Bandwidth Product
Slew Rate
Full Power Bandwidth
Settling Time: ±0.1%
Total Harmonic Distortion + Noise(3)
±1
25
INPUT VOLTAGE RANGE
Common-Mode Voltage Range: Positive
VCM
Negative VCM
Common-Mode Rejection Ratio
CMRR
OPEN-LOOP GAIN
Open-Loop Voltage Gain
UNITS
±20
IB
NOISE
Input Voltage Noise Density
Current Noise Density
MAX
VCM = 0V, IO = 0
TCASE = –40°C to +85°C
VS = ±4V to ±30V, Ref = V –
dVOS/dT
PSRR
INPUT BIAS CURRENT(1)
Input Bias Current(2)
vs Temperature
Input Offset Current
TYP
V
V
µA
µA
µs
µs
V
V
°C
°C
V
mA
V
V
mA
mA
°C
°C
°C
°C/W
°C/W
NOTES: (1) High-speed test at TJ = +25°C. (2) Positive conventional current is defined as flowing into the terminal. (3) See “Total Harmonic Distortion + Noise vs
Frequency” in the Typical Performance Curves section for additional power levels. (4) See “Safe Operating Area” (SOA) in the Typical Performance Curves section.
®
OPA549
2
ABSOLUTE MAXIMUM RATINGS(1)
PACKAGE/ORDERING INFORMATION
Output Current ................................................ See SOA Curve (Figure 6)
Supply Voltage, V+ to V– ................................................................... 60V
Input Voltage Range ....................................... (V–) – 0.5V to (V+) + 0.5V
Input Shutdown Voltage ................................................... Ref – 0.5 to V+
Operating Temperature .................................................. –40°C to +125°C
Storage Temperature ..................................................... –55°C to +125°C
Junction Temperature ...................................................................... 150°C
Lead Temperature (soldering, 10s) ................................................. 300°C
ESD Capability (Human Body Model) ............................................. 2000V
6
1
3
Ref
5
7
–In
VO
8
ILIM
11-Lead Power ZIP
242
–40°C to +85°C
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
Tab connected to V–. Do not use to conduct current.
4
OPA549T
TEMPERATURE
RANGE
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
CONNECTION DIAGRAM
+In
PACKAGE
ELECTROSTATIC
DISCHARGE SENSITIVITY
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade device reliability.
2
PRODUCT
PACKAGE
DRAWING
NUMBER
10
9
11
E/S
V–
V+
Connect both pins 1 and 2 to output.
Connect both pins 5 and 7 to V–.
Connect both pins 10 and 11 to V+.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
3
OPA549
TYPICAL PERFORMANCE CURVES
At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted.
OPEN-LOOP GAIN AND PHASE
vs FREQUENCY
INPUT BIAS CURRENT vs TEMPERATURE
–130
100
–20
–120
–40
60
–60
40
–80
20
–100
0
–120
–20
–140
–40
–160
10M
Gain (dB)
80
1
10
100
1k
10k
100k
1M
Input Bias Current (nA)
0
Phase (°)
120
–IB
+IB
–110
–100
–90
–80
–70
–60
–50
–40
–60 –40
–20
0
Frequency (Hz)
9
8
8
8A
Current Limit (A)
Current Limit (A)
60
80
100 120 140
+ILIM, 8A
–ILIM, 8A
7
6
5A
5
4
3
2A
6
+ILIM, 5A
5
–ILIM, 5A
4
3
2
2
1
1
0
–75
40
CURRENT LIMIT vs SUPPLY VOLTAGE
CURRENT LIMIT vs TEMPERATURE
9
7
20
Temperature (°C)
+ILIM, 2A
–ILIM, 2A
0
–50
–25
0
25
50
75
100
0
125
5
10
15
20
25
Temperature (°C)
INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
QUIESCENT CURRENT vs TEMPERATURE
30
–200
VS = ±30V
–180
25
–160
Quiescent Current (mA)
Input Bias Current (nA)
30
Supply Voltage (V)
–140
–120
–100
–80
–60
–40
20
VS = ±5V
15
10
IQ Shutdown (output disabled)
5
–20
–0
–30
–20
–10
0
10
20
0
–75
30
®
OPA549
–50
–25
0
25
50
Temperature (°C)
Common-Mode Voltage (V)
4
75
100
125
TYPICAL PERFORMANCE CURVES (Cont.)
At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted.
POWER SUPPLY REJECTION RATIO
vs FREQUENCY
COMMON-MODE REJECTION RATIO vs FREQUENCY
120
Power Supply Rejection Ratio (dB)
Common-Mode Rejection (dB)
100
90
80
70
60
50
40
100
80
–PSRR
60
+PSRR
40
20
0
10
100
1k
10k
100k
10
100
1k
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
VOLTAGE NOISE DENSITY vs FREQUENCY
OPEN-LOOP GAIN, COMMON-MODE REJECTION RATIO
AND POWER SUPPLY REJECTION RATIO
vs TEMPERATURE
120
300
AOL, CMRR, PSRR (dB)
Voltage Noise (nV/√Hz)
250
200
150
100
110
AOL
100
PSRR
90
CMRR
50
80
–75
0
1
10
100
1k
10k
100k
100
125
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
1
16
G = +3
RL = 4Ω
15
14
0.7
13
0.6
12
0.5
11
0.4
10
SR+
0.3
9
0.2
THD+N (%)
GBW
Slew Rate (V/µs)
Gain-Bandwidth Product (MHz)
50
GAIN-BANDWIDTH PRODUCT AND
SLEW RATE vs TEMPERATURE
0.8
75W
10W
0.1
1W
0.1W
0.01
8
SR–
0.1
0
–75
0
Temperature (°C)
1
0.9
–50
Frequency (Hz)
7
0.001
6
–50
–25
0
25
50
75
100
20
125
100
1k
10k
20k
Frequency (Hz)
Temperature (°C)
®
5
OPA549
TYPICAL PERFORMANCE CURVES (Cont.)
At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted.
OUTPUT VOLTAGE SWING vs TEMPERATURE
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
5
5
IO = +8A
4
VSUPPLY – VOUT (V)
VSUPPLY– VOUT (V)
(V+) –VO
(V–) –VO
3
2
1
IO = –8A
3
IO = +2A
2
IO = –2A
1
0
0
0
2
4
6
8
–75
10
–50
–25
0
25
50
75
Output Current (A)
Temperature (°C)
MAXIMUM OUTPUT VOLTAGE SWING
vs FREQUENCY
OUTPUT LEAKAGE CURRENT
vs APPLIED OUTPUT VOLTAGE
30
100
125
30
40
5
Maximum output
voltage without
slew rate-induced
distortion.
4
Leakage Current (mA)
25
Output Voltage (Vp)
4
20
15
10
Leakage current with output disabled.
3
2
1
RCL = ∞
0
RCL = 0
–1
–2
–3
5
–4
0
10k
100k
–5
–40
1M
–30
–20
–10
0
10
20
Frequency (Hz)
Output Voltage (V)
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
25
20
20
Percent of Amplifiers (%)
25
15
10
5
0
15
10
5
0
0
4
8
12
16
20
24
28
32
36
40
44
48
52
56
60
64
68
72
76
80
84
–4.7
–4.23
–3.76
–3.29
–2.82
–2.35
–1.88
–1.41
–0.94
–0.47
0
0.47
0.94
1.41
1.88
2.35
2.82
3.29
3.76
4.23
4.7
Percent of Amplifiers (%)
1k
Offset Voltage (µV/°C)
Offset Voltage (mV)
®
OPA549
6
TYPICAL PERFORMANCE CURVES (Cont.)
At TCASE = +25°C, VS = ±30V and E/S pin open, unless otherwise noted.
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
LARGE-SIGNAL STEP RESPONSE
G = 3, CL = 1000pF
70
60
G = +1
10V/div
40
30
20
G = –1
10
0
0
5k
10k
15k
20k
25k
30k
35k
5µs/div
Load Capacitance (pF)
SMALL-SIGNAL STEP RESPONSE
G = 1, CL = 1000pF
100mV/div
SMALL-SIGNAL STEP RESPONSE
G = 3, CL = 1000pF
50mV/div
Overshoot (%)
50
2.5µs/div
2.5µs/div
®
7
OPA549
CONTROL REFERENCE (Ref) PIN
APPLICATIONS INFORMATION
The OPA549 features a reference (ref) pin to which the ILIM
and the Enable/Status (E/S) pin are referred. Ref simply
provides a reference point accessible to the user that can be
set to V–, ground, or any reference of the user’s choice.
Ref cannot be set below the negative supply or above (V+) – 8V.
If the minimum VS is used, Ref must be set at V–.
Figure 1 shows the OPA549 connected as a basic noninverting amplifier. The OPA549 can be used in virtually
any op amp configuration.
Power supply terminals should be bypassed with low series
impedance capacitors. The technique shown, using a ceramic and tantalum type in parallel, is recommended. Power
supply wiring should have low series impedance.
ADJUSTABLE CURRENT LIMIT
Be sure to connect both output pins (pins 1 and 2).
The OPA549’s accurate, user-defined current limit can be
set from 0A to 10A by controlling the input to the ILIM pin.
Unlike other designs, which use a power resistor in series
with the output current path, the OPA549 senses the load
indirectly. This allows the current limit to be set with a 0µA
to 633µA control signal. In contrast, other designs require a
limiting resistor to handle the full output current (up to 10A
in this case).
V+
10µF
+
0.1µF(2)
R2
R1
Although the design of the OPA549 allows output currents
up to 10A, it is not recommended that the device be operated
continuously at that level. The highest rated continuous
current capability is 8A. Continuously running the OPA549
at output currents greater than 8A will degrade long-term
reliability.
10, 11
E/S
9
3
1, 2
VO
OPA549
8
VIN
Ref
4
6
ILIM(1)
ZL
G = 1+
5, 7
R2
R1
Operation of the OPA549 with current limit less than 1A
results in reduced current limit accuracy. Applications requiring lower output current may be better suited to the
OPA547 or OPA548.
0.1µF(2)
Resistor-Controlled Current Limit
Figure 2a shows a simplified schematic of the internal
circuitry used to set the current limit. Leaving the ILIM pin
open programs the output current to zero, while connecting
ILIM directly to Ref programs the maximum output current
limit, typically 10A.
10µF
+
V–
NOTE: (1) ILIM connected to Ref gives the maximum
current limit, 10A (peak). (2) Connect capacitors directly to
package power supply pins.
With the OPA549, the simplest method for adjusting the
current limit uses a resistor or potentiometer connected
between the ILIM pin and Ref according to Equation 1:
FIGURE 1. Basic Circuit Connections.
R CL =
POWER SUPPLIES
75kV
– 7.5kΩ
I LIM
(1)
Commonly used values are shown in Figure 2.
The OPA549 operates from single (+8V to +60V) or dual
(±4V to ±30V) supplies with excellent performance. Most
behavior remains unchanged throughout the full operating
voltage range. Parameters that vary significantly with operating voltage are shown in the Typical Performance Curves.
Some applications do not require equal positive and negative
output voltage swing. Power supply voltages do not need to
be equal. The OPA549 can operate with as little as 8V
between the supplies and with up to 60V between the
supplies. For example, the positive supply could be set to
55V with the negative supply at –5V. Be sure to connect
both V– pins (pins 5 and 7) to the negative power supply
and both V+ pins (pins 10 and 11) to the positive power
supply. Package tab is internally connected to V–, however, do use the tab to conduct current.
Digitally-Controlled Current Limit
The low-level control signal (0µA to 633µA) also allows the
current limit to be digitally controlled by setting either a
current (ISET) or voltage (VSET). The output current ILIMcan be
adjusted by varying ISET according to Equation 2:
ISET = ILIM/15800
(2)
Figure 2b demonstrates a circuit configuration implementing this feature.
The output current ILIM can be adjusted by varying VSET
according to Equation 3:
VSET = (Ref) + 4.75V – (7500Ω)(ILIM)/15800
(3)
Figure 11 demonstrates a circuit configuration implementing this feature.
®
OPA549
8
(b) DAC METHOD (Current or Voltage)
(a) RESISTOR METHOD
Max IO = ILIM
±ILIM =
7500Ω
4.75V
(4.75) (15800)
Max IO = ILIM
7500Ω + RCL
±ILIM =15800 ISET
8
6
RCL =
=
Ref
15800 (4.75V)
ILIM
75kΩ
ILIM
7500Ω
4.75V
ISET
8
RCL
0.01µF
(optional, for noisy
environments)
6
– 7500Ω
D/A
Ref
ISET = ILIM/15800
VSET = (Ref) + 4.75V – (7500Ω) (ILIM)/15800
– 7.5kΩ
OPA549 CURRENT LIMIT: 0A to 10A
DESIRED
CURRENT LIMIT
RESISTOR(1)
(RCL)
CURRENT
(ISET)
VOLTAGE
(VSET)
0A(2)
2.5A
3A
4A
5A
6A
7A
8A
9A
10A
ILIM Open
22.6kΩ
17.4kΩ
11.3kΩ
7.5kΩ
4.99kΩ
3.24kΩ
1.87kΩ
845Ω
ILIM Connected to Ref
0µA
158µA
190µA
253µA
316µA
380µA
443µA
506µA
570µA
633µA
(Ref) + 4.75V
(Ref) + 3.56V
(Ref) + 3.33V
(Ref) + 2.85V
(Ref) + 2.38V
(Ref) + 1.90V
(Ref) + 1.43V
(Ref) + 0.95V
(Ref) + 0.48V
(Ref)
NOTES: (1) Resistors are nearest standard 1% values. (2) Offset in the current limit circuitry
may introduce approximately ±0.25A variation at low current limit values.
FIGURE 2. Adjustable Current Limit.
ENABLE/STATUS (E/S) PIN
The Enable/Status Pin provides two unique functions:
1) output disable by forcing the pin low and 2) thermal
shutdown indication by monitoring the voltage level at the
pin. Either or both of these functions can be utilized in an
application. For normal operation (output enabled), the E/S
pin can be left open or driven high (at least 2.4V above Ref).
A small value capacitor connected between the E/S pin and
CREF may be required for noisy applications.
OPA549
E/S
Ref
CMOS or TTL
Logic
Ground
Output Disable
To disable the output, the E/S pin is pulled to a logic low
(no greater than 0.8V above Ref). Typically the output is
shut down in 1µs. To return the output to an enabled state,
the E/S pin should be disconnected (open) or pulled to at
least 2.4V above Ref. It should be noted that driving the E/
S pin high (output enabled) does not defeat internal thermal shutdown; however, it does prevent the user from
monitoring the thermal shutdown status. See Figure 3 for
an example implementing this function.
FIGURE 3. Output Disable.
shows two OPA549s in a switched amplifier configuration.
The on/off state of the two amplifiers is controlled by the
voltage on the E/S pin. Under these conditions, the disabled
device will behave like a 750pF load. Slewing faster than
3V/µs will cause leakage current to rapidly increase in
devices that are disabled, and will contribute additional load.
At high temperature (125°C), the slewing threshold drops to
approximately 2V/µs. Input signals must be limited to avoid
excessive slewing in multiplexed applications.
This function not only conserves power during idle periods
(quiescent current drops to approximately 6mA) but also
allows multiplexing in multi-channel applications. Figure 12
®
9
OPA549
Thermal Shutdown Status
The OPA549 has thermal shutdown circuitry that protects
the amplifier from damage. The thermal protection circuitry
disables the output when the junction temperature reaches
approximately 160°C and allows the device to cool. When
the junction temperature cools to approximately 140°C, the
output circuitry is automatically re-enabled. Depending on
load and signal conditions, the thermal protection circuit
may cycle on and off. The E/S pin can be monitored to
determine if the device is in shutdown. During normal
operation, the voltage on the E/S pin is typically 3.5V above
Ref. Once shutdown has occurred, this voltage drops to
approximately 200mV above Ref. See Figure 4 for an
example implementing this function.
The Safe Operating Area (SOA curve, Figure 6) shows the
permissible range of voltage and current.
The safe output current decreases as VS – VO increases.
Output short circuits are a very demanding case for SOA. A
short circuit to ground forces the full power supply voltage
(V+ or V–) across the conducting transistor. Increasing the
case temperature reduces the safe output current that can be
tolerated without activating the thermal shutdown circuit of
the OPA549. For further insight on SOA, consult Application Bulletin AB-039.
20
10
PD
Ref
Output Current (A)
OPA549
E/S
HCT
E/S pin can interface
with standard HCT logic
inputs. Logic ground is
referred to Ref.
Logic
Ground
Output current can
be limited to less
than 8A—see text.
1
Pulse Operation Only
(Limit rms current to ≤ 8A)
2
5
10
TC = 125°C
20
50
100
POWER DISSIPATION
Power dissipation depends on power supply, signal, and load
conditions. For dc signals, power dissipation is equal to the
product of output current times the voltage across the conducting output transistor. Power dissipation can be minimized by using the lowest possible power supply voltage
necessary to assure the required output voltage swing.
Open-drain logic output can disable
amplifier's output with logic low.
HCT logic input monitors thermal
shutdown status during normal
operation.
For resistive loads, the maximum power dissipation occurs
at a dc output voltage of one-half the power supply voltage.
Dissipation with ac signals is lower. Application Bulletin
AB-039 explains how to calculate or measure power dissipation with unusual signals and loads.
Ref
HCT
(Thermal Status
Shutdown)
THERMAL PROTECTION
Power dissipated in the OPA549 will cause the junction
temperature to rise. Internal thermal shutdown circuitry
shuts down the output when the die temperature reaches
approximately 160°C and resets when the die has cooled
to 140°C. Depending on load and signal conditions, the
thermal protection circuit may cycle on and off. This limits
the dissipation of the amplifier but may have an undesirable
effect on the load.
Logic
Ground
FIGURE 5. Output Disable and Thermal Shutdown Status.
SAFE OPERATING AREA
Stress on the output transistors is determined both by the
output current and by the output voltage across the conducting output transistor, VS – VO. The power dissipated by the
output transistor is equal to the product of the output current
and the voltage across the conducting transistor, VS – VO.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature should be
limited to 125°C maximum. To estimate the margin of safety
®
OPA549
=1
FIGURE 6. Safe Operating Area.
Output Disable and Thermal Shutdown Status
As mentioned earlier, the OPA549’s output can be disabled
and the disable status can be monitored simultaneously.
Figure 5 provides an example of interfacing to the E/S pin.
Open Drain
(Output Disable)
7W
PD
VS – VO (V)
External logic circuitry or an LED can be used to indicate if
the output has been thermally shutdown, as demonstrated in
Figure 10.
E/S
0W
TC = 85°C
1
OPA549
TC = 25°C
=9
=4
8W
0.1
FIGURE 4. Thermal Shutdown Status.
PD
10
in a complete design (including heat sink) increase the
ambient temperature until the thermal protection is triggered. Use worst-case load and signal conditions. For good
reliability, thermal protection should trigger more than 35°C
above the maximum expected ambient condition of your
application. This produces a junction temperature of 125°C
at the maximum expected ambient condition.
screw torque, insulating material used (if any), and thermal
joint compound used (if any) also affect θCH. A typical θCH
for a mounted 11-lead power ZIP package is 0.5°C/W. Now
we can solve for θHA:
The internal protection circuitry of the OPA549 was designed to protect against overload conditions. It was not
intended to replace proper heat sinking. Continuously running the OPA549 into thermal shutdown will degrade reliability.
θHA = 6.6°C/W
θHA = [(TJ – TA)/ PD] – θJC – θCH
θHA = [(125°C – 40°C)/10W] – 1.4°C/W – 0.5°C/W
To maintain junction temperature below 125°C, the heat
sink selected must have a θHA less than 6.6°C/W. In other
words, the heat sink temperature rise above ambient must be
less than 66°C (6.6°C/W • 10W). For example, at 10W
Thermalloy model number 6396B has a heat sink temperature rise of 56°C (θHA = 56°C/10W = 5.6°C/W), which is
below the required 66°C required in this example. Thermalloy
model number 6399B has a sink temperature rise of 33°C
(θHA = 33°C/10W = 3.3°C/W), which is also below the
required 66°C required in this example. Figure 7 shows
power dissipation versus ambient temperature for a 11-lead
power ZIP package with the Thermalloy 6396B and 6399B
heat sinks.
AMPLIFIER MOUNTING AND HEAT SINKING
Most applications require a heat sink to assure that the
maximum operating junction temperature (125°C) is not
exceeded. In addition, the junction temperature should be
kept as low as possible for increased reliability. Junction
temperature can be determined according to the Equations:
where
TJ = TA + PD θJA
(4)
θJA = θJC + θCH + θHA
(5)
TJ = Junction Temperature (°C)
TA = Ambient Temperature (°C)
PD = Power Dissipated (W)
30
θJC = Junction-to-Case Thermal Resistance (°C/W)
PD = (TJ (max) – TA)/ θJA
(TJ (max) – 150°C)
Power Dissipation (W)
θCH = Case-to-Heat Sink Thermal Resistance (°C/W)
θHA = Heat Sink-to-Ambient Thermal Resistance (°C/W)
θJA =
Junction-to-Air Thermal Resistance (°C/W)
Figure 7 shows maximum power dissipation versus ambient
temperature with and without the use of a heat sink. Using
a heat sink significantly increases the maximum power
dissipation at a given ambient temperature as shown.
with Thermalloy 6396B
Heat Sink, θJA = 7.5°C/W
10
with No Heat Sink,
θJA = 30°C/W
0
The challenge in selecting the heat sink required lies in
determining the power dissipated by the OPA549. For dc
output, power dissipation is simply the load current times the
voltage developed across the conducting output transistor,
PD = IL (VS – VO). Other loads are not as simple. Consult
Application Bulletin AB-039 for further insight on calculating power dissipation. Once power dissipation for an application is known, the proper heat sink can be selected.
0
25
50
75
100
125
Ambient Temperature (°C)
Heat Sink Selection Example—An 11-lead power ZIP
package is dissipating 10 Watts. The maximum expected
ambient temperature is 40°C. Find the proper heat sink to
keep the junction temperature below 125°C (150°C minus
25°C safety margin).
Thermalloy 6396B
assume
OPA549
θ HA
θ CH
θ JC
θ JA
=
=
=
=
5.6°C/W
0.5°C/W
1.4°C/W
7.5°C/W
Thermalloy 6396B
assume
OPA549
θ HA
θ CH
θ JC
θ JA
=
=
=
=
3.3°C/W
0.5°C/W
1.4°C/W
5.2°C/W
FIGURE 7. Maximum Power Dissipation vs Ambient
Temperature.
Combining Equations (4) and (5) gives:
TJ = TA + PD ( θJC + θCH + θHA )
with Thermalloy 6399B
Heat Sink, θJA = 5.2°C/W
20
Another variable to consider is natural convection versus
forced convection air flow. Forced-air cooling by a small fan
can lower θCA (θCH + θHA ) dramatically. Some heat sink
manufacturers provide thermal data for both of these cases.
Heat sink performance is generally specified under idealized
conditions that may be difficult to achieve in an actual
application. For additional information on determining heat
sink requirements, consult Application Bulletin AB-038.
(6)
TJ, TA, and PD are given. θJC is provided in the Specifications Table, 1.4°C/W (dc). θCH can be obtained from the heat
sink manufacturer. Its value depends on heat sink size, area,
and material used. Semiconductor package type, mounting
®
11
OPA549
OUTPUT PROTECTION
As mentioned earlier, once a heat sink has been selected, the
complete design should be tested under worst-case load and
signal conditions to ensure proper thermal protection. Any
tendency to activate the thermal protection circuitry may
indicate inadequate heat sinking.
Reactive and EMF-generating loads can return load current
to the amplifier, causing the output voltage to exceed the
power supply voltage. This damaging condition can be
avoided with clamp diodes from the output terminal to the
power supplies as shown in Figure 8. Schottky rectifier
diodes with a 8A or greater continuous rating are recommended.
The tab of the 11-lead power ZIP package is electrically
connected to the negative supply, V–. It may be desirable to
isolate the tab of 11-lead power ZIP package from its
mounting surface with a mica (or other film) insulator. For
lowest overall thermal resistance, it is best to isolate the
entire heat sink/OPA549 structure from the mounting surface rather than to use an insulator between the semiconductor and heat sink.
VOLTAGE SOURCE APPLICATION
Figure 9 illustrates how to use the OPA549 to provide an
accurate voltage source with only three external resistors.
First, the current limit resistor, RCL , is chosen according to
the desired output current. The resulting voltage at the ILIM
pin is constant and stable over temperature. This voltage,
VCL, is connected to the non-inverting input of the op amp
and used as a voltage reference, thus eliminating the need for
an external reference. The feedback resistors are selected to
gain VCL to the desired output voltage level.
OUTPUT STAGE COMPENSATION
The complex load impedances common in power op amp
applications can cause output stage instability. For normal
operation, output compensation circuitry is typically not
required. However, for difficult loads or if the OPA549 is
intended to be driven into current limit, an R/C network may
be required. Figure 8 shows an output R/C compensation
(snubber) network which generally provides excellent stability.
PROGRAMMABLE POWER SUPPLY
A programmable source/sink power supply can easily be
built using the OPA549. Both the output voltage and output
current are user-controlled. Figure 10 shows a circuit using
potentiometers to adjust the output voltage and current while
Figure 11 uses digital-to-analog converters. An LED connected to the E/S pin through a logic gate indicates if the
OPA549 is in thermal shutdown.
A snubber circuit may also enhance stability when driving
large capacitive loads (>1000pF) or inductive loads (motors,
loads separated from the amplifier by long cables). Typically, 3Ω to 10Ω resistors in series with 0.01µF to 0.1µF
capacitors is adequate. Some variations in circuit values
may be required with certain loads.
R1
R2
V+
V+
R2
20kΩ
R1
5kΩ
G=–
R2
= –4
R1
VIN
VO = VCL (1 + R2/R1)
4.75V
7500Ω
D1
Ref
VCL
OPA549
D2
10Ω
(Carbon)
IO =
15800 (4.75V)
7500Ω + RCL
ILIM
Motor
V–
0.01µF
V–
D1, D2 : Schottky Diodes
0.01µF
(Optional, for noisy
environments)
RCL
Uses voltage developed at ILIM pin
as a moderately accurate reference
voltage.
For Example:
FIGURE 8. Motor Drive Circuit.
If ILIM = 7.9A, RCL = 2kΩ
VCL =
2kΩ • 4.75V
(2kΩ + 7500Ω)
Desired VO = 10V, G =
= 1V
10
1
= 10
R1 = 1kΩ and R2 = 9kΩ
FIGURE 9. Voltage Source.
®
OPA549
12
1kΩ
9kΩ
G=1+
= 10
1kΩ
+5V
10.5kΩ
Output
Adjust
V+ = +30V
V– = 0V
9kΩ
10kΩ
3
VO = 1V to 25V
IO = 0 to 10A
OPA549
0.12V to 2.5V
4
ILIM 8
6
9 E/S
Ref
R ≥ 250Ω
74HCT04
499Ω
+5V
V–
1kΩ
Current
Limit
Adjust
Thermal
Shutdown Status
0V to 4.75V
20kΩ
(LED)
0.01µF
FIGURE 10. Resistor-Controlled Programmable Power Supply.
V+ = +30V
V– = 0V
1kΩ
9kΩ
–5V
OUTPUT ADJUST
VREF
G = 10
+5V
VREF A
3
+5V
RFB A
1, 2
1/2 DAC7800/1/2(3)
IOUT A
VO = 7V to 25V
OPA549
10pF
9
4
1/2
OPA2336
E/S
6
Ref
DAC A
AGND A
ILIM
IO = 0A to 10A
74HCT04
R ≥ 250Ω
8
Thermal
Shutdown Status
(LED)
VREF B
RFB B
10pF
1/2 DAC7800/1/2
IOUT B
1/2
OPA2336
DAC B
0.01µF
DGND
AGND B
CURRENT LIMIT ADJUST
Choose DAC780X based on digital interface: DAC7800 - 12-bit
interface, DAC7801 - 8-bit interface + 4 bits, DAC7802 - serial interface.
FIGURE 11. Digitally-Controlled Programmable Power Supply.
®
13
OPA549
R1
R2
VIN1
OPA549
OPA549
ILIM
E/S
Ref
R3
VO
R4
RCL1
VIN2
VE/S
RCL2
Close for high current
(could be open drain
output of a logic gate).
OPA549
E/S
Limit output slew rates to ≤ 3V/µs (see text).
FIGURE 12. Switched Amplifier.
FIGURE 13. Multiple Current Limit Values.
R2
4kΩ
R1
1kΩ
Master
0.1Ω
OPA549
VIN
ILIM
Ref
20A Peak
VO
G=5
Slave
0.1Ω
OPA549
ILIM
Ref
FIGURE 14. Parallel Output for Increased Output Current.
®
OPA549
14