TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 2.6-W STEREO AUDIO POWER AMPLIFIER WITH FOUR SELECTABLE GAIN SETTINGS AND MUX CONTROL FEATURES • • • • • • • • • • Compatible With PC 99 Desktop Line-Out Into 10-kΩ Load Internal Gain Control, Which Eliminates External Gain-Setting Resistors 2.6-W/Ch Output Power Into 3-Ω Load Input MUX Select Terminal PC-Beep Input Depop Circuitry Stereo Input MUX Fully Differential Input Low Supply Current and Shutdown Current Surface-Mount Power Packaging 24-Pin TSSOP PowerPAD™ PWP PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 GND GAIN0 GAIN1 LOUT+ LLINEIN LHPIN PVDD RIN LOUT– LIN BYPASS GND 24 23 22 21 20 19 18 17 16 15 14 13 GND RLINEIN SHUTDOWN ROUT+ RHPIN VDD PVDD HP/LINE ROUT– SE/BTL PC-BEEP GND DESCRIPTION The TPA0312 is a stereo audio power amplifier in a 24-pin TSSOP thermally enhanced package capable of delivering 2.6 W of continuous RMS power per channel into 3-Ω loads. This device minimizes the number of external components needed, simplifying the design, and freeing up board space for other features. When driving 1 W into 8-Ω speakers, the TPA0312 has less than 0.65% THD+N across its specified frequency range. Included within this device is integrated depop circuitry that virtually eliminates transients that cause noise in the speakers. Amplifier gain is internally configured and controlled by way of two terminals (GAIN0 and GAIN1). BTL gain settings of 6 dB, 10 dB, 15.6 dB, and 21.6 dB (inverting) are provided, whereas SE gain is always configured as 4.1 dB for headphone drive. An internal input MUX allows two sets of stereo inputs to the amplifier. The HP/LINE terminal allows the user to select which MUX input is active, regardless of whether the amplifier is in SE or BTL mode. In notebook applications, where internal speakers are driven as BTL and the line outputs (often headphone drive) are required to be SE, the TPA0312 automatically switches into SE mode when the SE/BTL input is activated, and this reduces the gain to 4.1 dB. The TPA0312 consumes only 6 mA of supply current during normal operation. A miserly shutdown mode reduces the supply current to 150 µA. The PowerPAD™ package (PWP) delivers a level of thermal performance that was previously achievable only in TO-220-type packages. Thermal impedances of approximately 35°C/W are readily realized in multilayer PCB applications. This allows the TPA0312 to operate at full power into 8-Ω loads at an ambient temperature of 85°C. AVAILABLE OPTIONS TA –40°C to 85°C (1) PACKAGED DEVICE TSSOP (1) (PWP) TPA0312PWP The PWP package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA0312PWPR). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2004, Texas Instruments Incorporated TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. FUNCTIONAL BLOCK DIAGRAM RHPIN RLINEIN R MUX Volume Control − GAIN0 ROUT+ + GAIN1 Volume Control RIN − ROUT− PC-BEEP SE/BTL HP/LINE LHPIN LLINEIN + PC Beep MUX Control L MUX Depop Circuitry Volume Control Power Management PVDD VDD BYPASS SHUTDOWN GND − LOUT+ + LIN Volume Control − LOUT− + 2 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 TERMINAL FUNCTIONS TERMINAL NAME NO. I/O DESCRIPTION BYPASS 11 GAIN0 2 I Bit 0 of gain control GAIN1 3 I Bit 1 of gain control GND Tap to voltage divider for internal mid-supply bias generator 1, 12, 13, 24 Ground connection for circuitry. Connected to the thermal pad. LHPIN 6 I Left-channel headphone input, selected when SE/BTL is held high LIN 10 I Common left input for fully differential input. AC ground for single-ended inputs. LLINEIN 5 I Left-channel line input, selected when SE/BTL is held low LOUT+ 4 O Left-channel positive output in BTL mode and positive output in SE mode LOUT- 9 O Left-channel negative output in BTL mode and high-impedance in SE mode PC-BEEP 14 I The input for PC Beep mode. PC-BEEP is enabled when a > 1.5-V (peak-to-peak) square wave is input to PC-BEEP HP/LINE 17 I HP/LINE is the input MUX control input. When the HP/LINE terminal is held high, the headphone inputs (LHPIN or RHPIN [6, 20]) are active. When the HP/LINE terminal is held low, the line inputs (LLINEIN or RLINEIN [5, 23]) are active. PVDD 7, 18 I Power supply for output stage RHPIN 20 I Right-channel headphone input, selected when SE/BTL is held high RIN 8 I Common right input for fully differential input. AC ground for single-ended inputs. RLINEIN 23 I Right-channel line input, selected when SE/BTL is held low ROUT+ 21 O Right-channel positive output in BTL mode and positive output in SE mode ROUT- 16 O Right-channel negative output in BTL mode and high-impedance in SE mode SHUTDOWN 22 I Places entire IC in shutdown mode when held low, except PC-BEEP remains active SE/BTL 15 I Hold SE/BTL low for BTL mode and hold high for SE mode. VDD 19 I Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve highest performance. Thermal Pad Connect to ground. Must be soldered down in all applications to properly secure the device on the PC board. 3 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VDD Supply voltage VI Input voltage 6V –0.3 V to VDD +0.3 V Continuous total power dissipation Internally limited (see Dissipation Rating Table) TA Operating free-air temperature range –40°C to 85°C TJ Operating junction temperature range –40°C to 150°C Tstg Storage temperature range –65°C to 85°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds (1) 260°C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE TA≤ 25°C PACKAGE PWP (1) 2.7 DERATING FACTOR TA = 70°C TA = 85°C 21.8 mW/°C 1.7 W 1.4 W W (1) See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report (literature number SLMA002), for more information on the PowerPAD package. The thermal data was measured on a PCB layout based on the information in the section entitled Texas Instruments Recommended Board for PowerPAD of the before-mentioned document. RECOMMENDED OPERATING CONDITIONS VDD Supply voltage VIH High-level input voltage VIL Low-level input voltage SE/BTL, HP/LINE, GAIN0, GAIN1 SHUTDOWN MIN MAX 4.5 5.5 V 0.8 x VDD V 2 SE/BTL, HP/LINE 0.6 x VDD GAIN0, GAIN1 0.4 x VDD SHUTDOWN TA UNIT V 0.8 Operating free-air temperature –40 °C 85 ELECTRICAL CHARACTERISTICS at specified free-air temperature, VDD = 5 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS |VOO| Output offset voltage (measured differentially) VI = 0, Av = 6 dB PSRR Power supply rejection ratio VDD = 4.5 V to 5.5 V |IIH| High-level input current |IIL| Low-level input current IDD Supply current IDD(SD) Supply current, shutdown mode 4 MIN TYP MAX UNIT 25 mV VDD = 5.5 V, VI = VDD 1 µA VDD = 5.5 V, VI = 0 V 1 µA 77 dB BTL mode 6 10 SE mode 3 5 150 300 mA µA TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 OPERATING CHARACTERISTICS VDD = 5 V, TA = 25°C, RL = 8 Ω , Gain = 6 dB, BTL mode PARAMETER TEST CONDITIONS PO Output power RL = 3 Ω THD + N Total harmonic distortion plus noise PO = 1 W, BOM Maximum output power bandwidth THD = 5% Supply ripple rejection ratio f = 1 kHz, CB = 0.47 µF SNR Noise output voltage 2.6 THD + N = 1%, 2.05 f = 20 Hz to 15 kHz ZI Input impedance CB = 0.47 µF, f = 20 Hz to 20 kHz TYP THD + N= 10% BTL mode Signal-to-noise ratio Vn MIN MAX UNIT W 0.65% >15 kHz 72 dB 105 dB BTL mode 20 SE mode 18 µVRMS See Table 1 TYPICAL CHARACTERISTICS TABLE OF GRAPHS FIGURE vs Output power 1, 4-6, 9-11, 14-16, 18 vs Frequency 2, 3, 7, 8, 12, 13, 17, 19 THD+N Total harmonic distortion plus noise Vn Output noise voltage vs Bandwidth 21 Supply ripple rejection ratio vs Frequency 22, 23 Crosstalk vs Frequency 24, 25 Shutdown attenuation vs Frequency 26 Signal-to-noise ratio vs Frequency vs Output voltage SNR Closed-loop response PO PD Output power Power dissipation 20 27 28-30 vs Load resistance 31, 32 vs Output power 33, 34 vs Ambient temperature 35 5 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 10% AV = 6 dB f = 1 kHz BTL THD+N −Total Harmonic Distortion + Noise THD+N −Total Harmonic Distortion + Noise 10% RL = 4 Ω 1% RL = 8 Ω RL = 3 Ω 0.1% 0.01% 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 PO = 1.75 W RL = 3 Ω BTL 1% AV = 21.6 dB 0.1% AV = 15.6 dB 0.01% 20 3 PO − Output Power − W 1k 10k 20k f − Frequency − Hz Figure 2. TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10% RL = 3 Ω AV = 6 dB BTL THD+N −Total Harmonic Distortion + Noise THD+N −Total Harmonic Distortion + Noise 100 Figure 1. 10% 1% PO = 1.0 W PO = 0.5 W 0.1% f = 15 kHz 1% f = 1 kHz 0.1% f = 20 Hz RL = 3 Ω AV = 6 dB BTL PO = 1.75 W 0.01% 20 100 1k f − Frequency − Hz Figure 3. 6 AV = 6 dB 10k 20k 0.01% 0.01 0.1 1 PO − Output Power − W Figure 4. 10 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10% THD+N −Total Harmonic Distortion + Noise THD+N −Total Harmonic Distortion + Noise 10% f = 15 kHz 1% f = 1 kHz f = 20 Hz 0.1% RL = 3 Ω AV = 15.6 dB BTL 0.01% 0.01 0.1 1 PO − Output Power − W 1% f = 1 kHz f = 20 Hz 0.1% RL = 3 Ω AV = 21.6 dB BTL 0.01% 0.01 10 0.1 1 PO − Output Power − W 10 Figure 5. Figure 6. TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 10% PO = 1.75 W RL = 3 Ω BTL 1% AV = 21.6 dB AV = 6 dB 0.1% AV = 15.6 dB 0.01% 20 100 1k 10k 20k THD+N −Total Harmonic Distortion + Noise 10% THD+N −Total Harmonic Distortion + Noise f = 15 kHz RL = 4 Ω AV = 6 dB BTL 1% PO = 1.5 W 0.1% PO = 0.25 W PO = 1.0 W 0.01% 20 100 1k f − Frequency − Hz f − Frequency − Hz Figure 7. Figure 8. 10k 20k 7 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10% RL = 4 Ω AV = 6 dB BTL THD+N −Total Harmonic Distortion + Noise THD+N −Total Harmonic Distortion + Noise 10% TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER f = 15 kHz 1% f = 1 kHz 0.1% f = 20 Hz 0.01% 0.01 0.1 1 PO − Output Power − W f = 1 kHz 0.1% f = 20 Hz RL = 4 Ω AV = 15.6 dB BTL 0.1 1 PO − Output Power − W 10 Figure 9. Figure 10. TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 10% THD+N −Total Harmonic Distortion + Noise THD+N −Total Harmonic Distortion + Noise 1% 0.01% 0.01 10 10% f = 15 kHz 1% f = 1 kHz f = 20 Hz 0.1% RL = 4 Ω AV = 21.6 dB BTL 0.01% 0.01 0.1 1 PO − Output Power − W Figure 11. 8 f = 15 kHz 10 RL = 8 Ω AV = 6 dB BTL 1% 0.1% PO = 0.25 W PO = 1.0 W 0.01% 20 PO = 0.5 W 100 1k f − Frequency − Hz Figure 12. 10k 20k TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10% PO = 1 W RL = 8 Ω BTL THD+N −Total Harmonic Distortion + Noise THD+N −Total Harmonic Distortion + Noise 10% 1% AV = 21.6 dB AV = 6 dB 0.1% AV = 15.6 dB 0.01% 20 100 1k RL = 8 Ω AV = 6 dB BTL f = 15 kHz 1% f = 1 kHz 0.1% f = 20 Hz 0.01% 0.01 10k 20k f − Frequency − Hz Figure 13. Figure 14. TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER f = 15 kHz 1% f = 1 kHz 0.1% 0.01% 0.01 10 10% RL = 8 Ω AV = 15.6 dB BTL THD+N −Total Harmonic Distortion + Noise 10% THD+N −Total Harmonic Distortion + Noise 0.1 1 PO − Output Power − W f = 20 Hz 0.1 1 PO − Output Power − W Figure 15. 10 f = 15 kHz 1% f = 1 kHz f = 20 Hz 0.1% RL = 8 Ω AV = 21.6 dB BTL 0.01% 0.01 0.1 1 PO − Output Power − W 10 Figure 16. 9 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER 10% RL = 32 Ω AV = 4.1 dB SE 1% PO = 25 mW 0.1% PO = 50 mW PO = 75 mW 0.01% 20 100 1k THD+N −Total Harmonic Distortion + Noise THD+N −Total Harmonic Distortion + Noise 10% RL = 32 Ω AV = 4.1 dB SE 1% f = 15 kHz 0.1% f = 1 kHz f = 20 Hz 0.01% 0.01 10k 20k f − Frequency − Hz Figure 17. Figure 18. TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT VOLTAGE THD+N −Total Harmonic Distortion + Noise THD+N −Total Harmonic Distortion + Noise RL = 10 kΩ AV = 4.1 dB SE 1% 0.1% VO = 1 VRMS 0.01% 0.001% 20 1 10% 10% 100 1k f − Frequency − Hz Figure 19. 10 0.1 PO − Output Power − W 10k 20k RL = 10 kΩ AV = 4.1 dB SE 1% 0.1% f = 20 Hz f = 15 kHz 0.01% f = 1 kHz 0.001% 0.1 1 VO − Output Voltage − VRMS Figure 20. 3 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 OUTPUT NOISE VOLTAGE vs BANDWIDTH SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY 0 100 V n − Output Noise Voltage − µ V 90 Supply Ripple Rejection Ratio − dB VDD = 5 V RL = 4Ω 80 70 60 50 40 AV = 21.6 dB 30 AV = 15.6 dB 20 −20 RL = 8 Ω CB = 0.47 µF, AV = 6 dB BTL −40 −60 −80 −100 10 AV = 6 dB 0 10 100 1k −120 20 10k BW − Bandwidth − Hz Figure 21. Figure 22. SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY CROSSTALK vs FREQUENCY 10k 20k 0 RL = 32 Ω CB = 0.47 µF, AV =4.1 dB SE −20 −40 Crosstalk − dB Supply Ripple Rejection Ratio − dB 1k f − Frequency − Hz 0 −20 100 −60 PO = 1 W RL = 8 Ω Av = 6 dB BTL −40 −60 −80 −80 −100 −100 −120 20 −120 20 LEFT TO RIGHT RIGHT TO LEFT 100 1k 10k 20k 100 1k f − Frequency − Hz f − Frequency − Hz Figure 23. Figure 24. 10k 20k 11 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 CROSSTALK vs FREQUENCY SHUTDOWN ATTENUATION vs FREQUENCY 0 VI = 1 VRMS −20 Shutdown Attenuation − db Crosstalk − dB −20 0 VO = 1 VRMS RL = 10 kΩ Av = 4.1 dB SE −40 −60 LEFT TO RIGHT −80 −100 RL = 10 kΩ, SE −40 −60 RL = 32 Ω, SE −80 −100 RL = 8 Ω, BTL RIGHT TO LEFT −120 20 100 1k −120 20 10k 20k 100 1k f − Frequency − Hz f − Frequency − Hz Figure 25. Figure 26. SIGNAL-TO-NOISE RATIO vs FREQUENCY 140 SNR − Signal-To-Noise Ratio − dB 130 PO = 1 W RL = 8 Ω BTL 120 AV = 6 dB AV = 15.6 dB 110 100 90 AV = 21.6 dB 80 70 60 20 100 1k f − Frequency − Hz Figure 27. 12 10k 20k 10k 20k TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 CLOSED-LOOP RESPONSE 180° 10 7.5 Gain 90° 5 Phase 0° 0 Phase Gain − dB 2.5 −2.5 −5 RL = 8 Ω AV = 6 dB BTL −90° −7.5 −10 10 −180° 100 1k 10k 100k 1M f − Frequency − Hz Figure 28. CLOSED-LOOP RESPONSE 180° 30 25 90° 20 Gain Phase 0° 10 Phase Gain − dB 15 5 0 RL = 8 Ω AV = 15.6 dB BTL −90° −5 −10 10 −180° 100 1k 10k 100k 1M f − Frequency − Hz Figure 29. 13 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 CLOSED-LOOP RESPONSE 180° 30 25 Gain 90° 20 Phase 0° 10 Phase Gain − dB 15 5 0 RL = 8 Ω AV = 21.6 dB BTL −90° −5 −10 10 −180° 100 1k 10k 1M 100k f − Frequency − Hz Figure 30. OUTPUT POWER vs LOAD RESISTANCE OUTPUT POWER vs LOAD RESISTANCE 3.5 1500 AV = 6 dB BTL 1250 PO− Output Power − mW PO − Output Power − W 3 AV = 4.1 dB SE 2.5 2 10% THD+N 1.5 1 1% THD+N 0.5 1000 750 10% THD+N 500 250 1% THD+N 0 0 0 8 16 24 32 40 48 RL − Load Resistance − Ω Figure 31. 14 56 64 0 8 16 24 32 40 48 RL − Load Resistance − Ω Figure 32. 56 64 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 POWER DISSIPATION vs OUTPUT POWER POWER DISSIPATION vs OUTPUT POWER 1.8 0.4 3Ω PD − Power Dissipation − W 0.35 1.4 1.2 4Ω 1 0.8 0.6 8Ω 0.3 f = 1 kHz BTL Each Channel 0.2 0 0 0.5 1 1.5 PO − Output Power − W 2 4Ω 0.25 0.2 0.15 8Ω 0.1 0.4 0.05 0 0 2.5 f = 1 kHz SE Each Channel 32 Ω 0.1 0.2 0.3 0.4 0.5 0.6 PO − Output Power − W Figure 33. 0.7 0.8 Figure 34. POWER DISSIPATION vs AMBIENT TEMPERATURE 7 ΘJA4 6 PD − Power Dissipation − W PD − Power Dissipation − W 1.6 ΘJA1 = 45.9°C/W ΘJA2 = 45.2°C/W ΘJA3 = 31.2°C/W ΘJA4 = 18.6°C/W 5 4 ΘJA3 3 ΘJA1,2 2 1 0 −40 −20 0 20 40 60 80 100 120 140 160 TA − Ambient Temperature − °C Figure 35. 15 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 THERMAL INFORMATION The thermally enhanced PWP package is based on the 24-pin TSSOP, but includes a thermal pad (see Figure 36) to provide an effective thermal contact between the IC and the PWB. Traditionally, surface mount and power have been mutually exclusive terms. A variety of scaled-down TO-220-type packages have leads formed as gull wings to make them applicable for surface-mount applications. These packages, however, have only two shortcomings: they do not address the low profile (< 2 mm) requirements of many of today's advanced systems, and they do not offer a terminal-count high enough to accommodate increasing integration. On the other hand, traditional low-power, surface-mount packages require power-dissipation derating that severely limits the usable range of many high-performance analog circuits. The PowerPAD™ package (thermally enhanced TSSOP) combines fine-pitch, surface-mount technology with thermal performance comparable to much larger power packages. The PowerPAD™ package is designed to optimize the heat transfer to the PWB. Because of the small size and limited mass of a TSSOP package, thermal enhancement is achieved by improving the thermal conduction paths that remove heat from the component. The thermal pad is formed using a patented lead-frame design and manufacturing technique to provide a direct connection to the heat-generating IC. When this pad is soldered or otherwise thermally coupled to an external heat dissipator, high power dissipation in the ultrathin, fine-pitch, surface-mount package can be reliably achieved. DIE Side View (a) Thermal Pad DIE End View (b) Bottom View (c) Figure 36. Views of Thermally Enhanced PWP Package 16 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 APPLICATION INFORMATION SELECTION OF COMPONENTS Figure 37 and Figure 38 are schematic diagrams of typical notebook computer application circuits. Right CIRHP Head− 0.47 µF phone Input 20 Signal CIRLINE Right 0.47 µF Line Input Signal 23 RHPIN RLINEIN R MUX Volume Control − + 8 RIN CRIN 0.47 µF PC-BEEP 14 Input Signal CPCB 0.47 µF ROUT+ 21 Volume Control COUTR 330 µF PC-BEEP − + PCBeep ROUT− 16 VDD 1 kΩ 100 kΩ 2, 3 17 15 GAIN0 GAIN1 HP/LINE SE/BTL Gain/ MUX Control Depop Circuitry Power Management Left CILHP Head− 0.47 µF phone Input Signal CILLINE Left 0.47 µF Line Input Signal 6 LHPIN 5 LLINEIN 10 CLIN 0.47 µF LIN PVDD 18 VDD 19 BYPASS SHUT− DOWN 11 GND L MUX Volume Control See Note A VDD CSR 0.1 µF VDD CSR 0.1 µF 22 CBYP 0.47 µF To System Control − + LOUT+ 4 − + LOUT− 9 1 kΩ 1, 12, 13, 24 COUTL 330 µF Volume Control 100 kΩ A. A 0.1-µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower frequency noise signals, a larger electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier. Figure 37. Typical TPA0312 Application Circuit Using Single-Ended Inputs and Input MUX 17 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 APPLICATION INFORMATION (continued) CIRHP− 0.47 µF Right Negative Differential Input Signal Right Positive Differential Input Signal PC-BEEP Input Signal 20 CIRIN− 0.47 µF 23 RHPIN RLINEIN R MUX Volume Control − ROUT+ 21 + CIRIN+ 0.47 µF 8 RIN 14 PC-BEEP Volume Control COUTR 330 µF − PCBeep CPCB 0.47 µF ROUT− 16 VDD + 1 kΩ 100 kΩ 2, 3 GAIN0 GAIN1 17 HP/LINE 15 SE/BTL Gain/ MUX Control Depop Circuitry Power Management CILHP 0.47 µF Left Negative Differential Input Signal Left Positive Differential Input Signal 6 LHPIN 5 LLINEIN PVDD 18 VDD 19 BYPASS SHUT− DOWN 11 GND L MUX CILIN− 0.47 µF Volume Control − LOUT+ See Note A VDD CSR 0.1 µF VDD CSR 0.1 µF 22 CBYP 0.47 µF To System Control 4 1 kΩ 1, 12, 13, 24 + 10 LIN COUTL 330 µF Volume Control CILIN 0.47 µF − LOUT− 9 + 100 kΩ A. A 0.1-µF ceramic capacitor should be placed as close as possible to the IC. For filtering lower frequency noise signals, a larger electrolytic capacitor of 10 µF or greater should be placed near the audio power amplifier. Figure 38. Typical TPA0312 Application Circuit Using Differential Inputs 18 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 GAIN SETTING VIA GAIN0 AND GAIN1 INPUTS The gain of the TPA0312 is set by two input terminals, GAIN0 and GAIN1. Table 1. GAIN SETTINGS GAIN0 GAIN1 SE/BTL AV 0 0 0 6 dB 0 1 0 10 dB 1 0 0 15.6 dB 1 1 0 21.6 dB X X 1 4.1 dB The gains listed in Table 1 are realized by changing the taps on the input resistors inside the amplifier. This causes the input impedance, ZI, to be dependant on the gain setting. The actual gain settings are controlled by ratios of resistors, so the actual gain distribution from part-to-part is quite good. However, the input impedance will shift by 30% due to shifts in the actual resistance of the input impedance. For design purposes, the input network (discussed in the next section) should be designed assuming an input impedance of 10 kΩ, which is the absolute minimum input impedance of the TPA0312. At the lower gain settings, the input impedance could increase as high as 115 kΩ. INPUT RESISTANCE Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest value to over 6 times that value. As a result, if a single capacitor is used in the input high pass filter, the –3-dB or cutoff frequency also changes by over 6 times. If an additional resistor is connected from the input pin of the amplifier to ground, as shown in the following figure, the variation of the cutoff frequency is much reduced. ZF C IN Input Signal ZI R The typical input impedance at each gain setting is given in the table below: Av ZI 21.6 dB 25 kΩ 15.6 dB 45 kΩ 10 dB 70 kΩ 6 dB 90 kΩ The –3-dB frequency can be calculated using Equation 1: 1 ƒ –3 dB 2 C R R I (1) If the filter must be more accurate, the value of the capacitor should be increased while the value of the resistor to ground should be decreased. In addition, the order of the filter could be increased. INPUT CAPACITOR, CI In the typical application, an input capacitor, CI, is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, CI and the input impedance of the amplifier, ZI, form a high-pass filter with the corner frequency determined in Equation 2. 19 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 −3 dB fc(highpass) 1 2 ZI C I fc (2) The value of CI is important to consider as it directly affects the bass (low frequency) performance of the circuit. Consider the example where ZI is 26 kΩ and the specification calls for a flat bass response down to 65 Hz. Equation 2 is reconfigured as Equation 3. 1 C I 2 Z f c I (3) In this example, CI is 94 nF; so, one would likely choose a value in the range of 0.1 nF to 1 µF. A further consideration for this capacitor is the leakage path from the input source through the input network (CI) and the feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high-gain applications. For this reason, a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at VDD/2, which is likely higher than the source dc level. Note that it is important to confirm the capacitor polarity in the application. POWER SUPPLY DECOUPLING, CS The TPA0312 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF, placed as close as possible to the device VDD lead, works best. For filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audio power amplifier is recommended. MIDRAIL BYPASS CAPACITOR, CBYP The midrail bypass capacitor, CBYP, is the most critical capacitor and serves several important functions. During start-up or recovery from shutdown mode, CBYP determines the rate at which the amplifier starts up. The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and THD+N. Bypass capacitor values of 0.47-µF to 1-µF ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance. 20 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 OUTPUT COUPLING CAPACITOR, CC In the typical single-supply SE configuration, an output coupling capacitor (CC) is required to block the dc bias at the output of the amplifier thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by Equation 4. −3 dB fc(high) 1 2 RL C C fc (4) The main disadvantage, from a performance standpoint, is the load impedances are typically small, which drives the low-frequency corner higher, degrading the bass response. Large values of CC are required to pass low frequencies into the load. Consider the example where a CC of 330 µF is chosen and loads vary from 3 Ω, 4 Ω, 8 Ω, 32 Ω, 10 kΩ, to 47 kΩ. Table 2 summarizes the frequency response characteristics of each configuration. Table 2. COMMON LOAD IMPEDANCES VS LOW FREQUENCY OUTPUT CHARACTERISTICS IN SE MODE RL (Ω) CC (µF) LOWEST FREQUENCY( Hz) 3 330 161 4 330 120 8 330 60 32 330 15 10,000 330 0.05 47,000 330 0.01 As Table 2 indicates, most of the bass response is attenuated into a 4-Ω load, an 8-Ω load is adequate, headphone response is good, and drive into line level inputs (a home stereo, for example) is exceptional. USING LOW-ESR CAPACITORS Low-ESR capacitors are recommended throughout this applications section. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves like an ideal capacitor. 21 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 BRIDGE-TIED LOAD VERSUS SINGLE-ENDED MODE Figure 39 shows a Class-AB audio power amplifier (APA) in a BTL configuration. The TPA0312 BTL amplifier consists of two Class-AB amplifiers driving both ends of the load. There are several potential benefits to this differential drive configuration, but initially consider power to the load. The differential drive to the speaker means that as one side is slewing up, the other side is slewing down, and vice versa. This in effect doubles the voltage swing on the load as compared to a ground-referenced load. Plugging 2 × VO(PP) into the power equation, where voltage is squared, yields 4× the output power from the same supply rail and load impedance (see Equation 5). V O(PP) V (rms) 2 2 2 V (rms) Power R L (5) VDD VO(PP) RL 2x VO(PP) VDD –VO(PP) Figure 39. Bridge-Tied Load Configuration In a typical computer sound channel operating at 5 V, bridging raises the power into an 8-Ω speaker from a singled-ended (SE, ground reference) limit of 250 mW to 1 W. In sound power that is a 6-dB improvement—which is loudness that can be heard. In addition to increased power, there are frequency response concerns. Consider the single-supply SE configuration shown in Figure 40. A coupling capacitor is required to block the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 33 µF to 1000 µF); so, they tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance of the system. This frequency limiting effect is due to the high-pass filter network created with the speaker impedance and the coupling capacitance and is calculated with Equation 6. 1 fc 2 R C L C (6) For example, a 68-µF capacitor with an 8-Ω speaker would attenuate low frequencies below 293 Hz. The BTL configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency performance is then limited only by the input network and speaker response. Cost and PCB space are also minimized by eliminating the bulky coupling capacitor. 22 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 VDD –3 dB VO(PP) CC RL VO(PP) fc Figure 40. Single-Ended Configuration and Frequency Response Increasing power to the load does carry a penalty of increased internal power dissipation. The increased dissipation is understandable considering that the BTL configuration produces 4× the output power of the SE configuration. Internal dissipation versus output power is discussed further in the Crest Factor and Thermal Considerations section. SINGLE-ENDED OPERATION In SE mode the load is driven from the primary amplifier output for each channel (OUT+, terminals 21 and 4). The amplifier switches single-ended operation when the SE/BTL terminal is held high. This puts the negative outputs in a high-impedance state, and reduces the amplifier's gain to 4.1 dB. BTL AMPLIFIER EFFICIENCY Class-AB amplifiers are notoriously inefficient. The primary cause of these inefficiencies is voltage drop across the output stage transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage drop that varies inversely to output power. The second component is due to the sine-wave nature of the output. The total voltage drop can be calculated by subtracting the RMS value of the output voltage from VDD. The internal voltage drop multiplied by the RMS value of the supply current, IDDrms, determines the internal power dissipation of the amplifier. An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power supply to the power delivered to the load. To accurately calculate the RMS and average values of power in the load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 41). VO IDD IDD(avg) V(LRMS) Figure 41. Voltage and Current Waveforms for BTL Amplifiers Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are different between SE and BTL configurations. In an SE application, the current waveform is a half-wave rectified shape, whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different. Keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, which supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform. The following equations are the basis for calculating amplifier efficiency. 23 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 P Efficiency of a BTL amplifier P L SUP Where: 2 V rms 2 V V P L , and V P , therefore, P P L LRMS L 2 R 2R L L 1 and P SUP VDD I DDavg and I DDavg 2V V P P sin(t) dt 1 P [cos(t)] 0 R R R L L 0 L V Therefore, 2V V DD P R L substituting PL and PSUP into Equation 7, P SUP PL = Power delivered to load PSUP = Power drawn from power supply VLRMS = RMS voltage on BTL load RL = Load resistance VP = Peak voltage on BTL load IDDavg = Average current drawn from the power supply VDD = Power supply voltage ηBTL = Efficiency of a BTL amplifier 2 Efficiency of a BTL amplifier Where: V P VP 2 RL 2 V DD V P RL VP 4 VDD 2 PL RL (7) Therefore, BTL 2 PL RL 4V DD (8) Table 3 employs Equation 8 to calculate efficiencies for four different output power levels. Note that the efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting in a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at full output power is less than in the half-power range. Calculating the efficiency for a specific system is the key to proper power supply design. For a stereo 1-W audio system with 8-Ω loads and a 5-V supply, the maximum draw on the power supply is almost 3.25 W. Table 3. EFFICIENCY VS OUTPUT POWER IN 5-V, 8-Ω, BTL SYSTEMS (1) 24 OUTPUT POWER (W) EFFICIENCY (%) PEAK VOLTAGE (V) INTERNAL DISSIPATION (W) 0.25 31.4 2.00 0.55 0.50 44.4 2.83 0.62 1.00 62.8 4.00 0.59 1.25 70.2 4.47 (1) 0.53 High peak voltages cause the THD to increase. TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 A final point to remember about Class-AB amplifiers (either SE or BTL) is how to manipulate the terms in the efficiency equation to utmost advantage when possible. Note that in Equation 8, VDD is in the denominator. This indicates that as VDD goes down, efficiency goes up. CREST FACTOR AND THERMAL CONSIDERATIONS Class-AB power amplifiers dissipate a significant amount of heat in the package under normal operating conditions. A typical music CD requires 12 dB to 15 dB of dynamic range, or headroom above the average power output, to pass the loudest portions of the signal without distortion. In other words, music typically has a crest factor between 12 dB and 15 dB. When determining the optimal ambient operating temperature, the internal dissipated power at the average output power level must be used. From the TPA0312 data sheet, one can see that when the TPA0312 is operating from a 5-V supply into a 3-Ω speaker, 4-W peaks are available. Converting watts to dB: P P 10Log W 10Log 4 W 6 dB dB 1W P ref (9) Subtracting the headroom restriction to obtain the average listening level without distortion yields: • 6 dB - 15 dB = -9 dB (15-dB crest factor) • 6 dB - 12 dB = -6 dB (12-dB crest factor) • 6 dB - 9 dB = -3 dB (9-dB crest factor) • 6 dB - 6 dB = 0 dB (6-dB crest factor) • 6 dB - 3 dB = 3 dB (3-dB crest factor) Converting dB back into watts: P W 10PdB10 P ref 63 mW (18−dB crest factor) 125 mW (15−dB crest factor) 250 mW (9−dB crest factor) 500 mW (6−dB crest factor) 1000 mW (3−dB crest factor) 2000 mW (15−dB crest factor) (10) 25 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 This is valuable information to consider when attempting to estimate the heat dissipation requirements for the amplifier system. Comparing the absolute worst case, which is 2 W of continuous power output with a 3-dB crest factor, against 12-dB and 15-dB applications drastically affects maximum ambient temperature ratings for the system. Using the power dissipation curves for a 5-V, 3-Ω system, the internal dissipation in the TPA0312 and maximum ambient temperatures is shown in Table 4. Table 4. TPA0312 POWER RATING, 5-V, 3-Ω, STEREO PEAK OUTPUT POWER (W) (1) AVERAGE OUTPUT POWER POWER DISSIPATION (W/Channel) MAXIMUM AMBIENT TEMPERATURE (1) 4 2 W (3 dB) 1.7 -3°C 4 1000 mW (6 dB) 1.6 6°C 4 500 mW (9 dB) 1.4 24°C 4 250 mW (12 dB) 1.1 51°C 4 125 mW (15 dB) 0.8 78°C 4 63 mW (18 dB) 0.6 85°C Package limited to 85°C ambient Table 5. TPA0312 POWER RATING, 5-V, 8-Ω, STEREO (1) PEAK OUTPUT POWER AVERAGE OUTPUT POWER POWER DISSIPATION (W/Channel) MAXIMUM AMBIENT TEMPERATURE (1) 2.5 W 1250 mW (3-dB crest factor) 0.55 85°C 2.5 W 1000 mW (4-dB crest factor) 0.62 85°C 2.5 W 500 mW (7-dB crest factor) 0.59 85°C 2.5 W 250 mW (10-dB crest factor) 0.53 85°C Package limited to 85°C ambient The maximum dissipated power, PDmax, is reached at a much lower output power level for a 3-Ω load than for an 8-Ω load. As a result, this simple formula for calculating PDmax may be used for a 3-Ω application: 2V2 DD P Dmax 2R L (11) However, in the case of an 8-Ω load, the PDmax occurs at a point well above the normal operating power level. The amplifier may therefore be operated at a higher ambient temperature than required by the PDmax formula for an 8-Ω load, but do not exceed the maximum ambient temperature of 85°C. The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor for the PWP package is shown in the dissipation rating table (see page 4). Converting this to θJA: 1 1 45°CW Θ JA 0.022 Derating Factor (12) To calculate maximum ambient temperatures, first consider that the numbers from the dissipation graphs are per channel so the dissipated power needs to be doubled for two-channel operation. Given θJA, the maximum allowable junction temperature, and the total internal dissipation, the maximum ambient temperature can be calculated with the following equation. The maximum recommended junction temperature for the TPA0312 is 150°C. The internal dissipation figures are taken from the Power Dissipation vs Output Power graphs. T A Max T J Max ΘJA P D 150 45(0.6 2) 96°C (15−dB crest factor) NOTE: Internal dissipation of 0.6 W is estimated for a 2.6-W system with 15-dB crest factor per channel. Package limited to 85°C 26 (13) TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 Table 4 and Table 5 show that for some applications no airflow is required to keep junction temperatures in the specified range. The TPA0312 is designed with thermal protection that turns the device off when the junction temperature surpasses 150°C to prevent damage to the IC. Table 4 and Table 5 were calculated for maximum listening volume without distortion. When the output level is reduced the numbers in the table change significantly. Also, using 8-Ω speakers dramatically increases the thermal performance by increasing amplifier efficiency. SE/BTL OPERATION The ability of the TPA0312 to easily switch between BTL and SE modes is one of its most important cost-saving features. This feature eliminates the requirement for an additional headphone amplifier in applications where internal stereo speakers are driven in BTL mode but external headphone or speakers must be accommodated. Internal to the TPA0312, two separate amplifiers drive OUT+ and OUT-. The SE/BTL input (terminal 15) controls the operation of the follower amplifier that drives LOUT- and ROUT- (terminals 9 and 16). When SE/BTL is held low, the amplifier is on and the TPA0312 is in the BTL mode. When SE/BTL is held high, the OUT- amplifiers are in a high-output impedance state, which configures the TPA0312 as an SE driver from LOUT+ and ROUT+ (terminals 4 and 21). IDD is reduced by approximately one-half in SE mode. Control of the SE/BTL input can be from a logic-level CMOS source or, more typically, from a resistor divider network as shown in Figure 42. 20 23 RHPIN RLINEIN R MUX Volume Control − + 8 RIN ROUT+ 21 Volume Control VDD − + ROUT− 16 100 kΩ SE/BTL COUTR 330 µF 15 1 kΩ 100 kΩ Figure 42. TPA0312 Resistor Divider Network Circuit Using a readily available 1/8-in. (3,5-mm) stereo headphone jack, the control switch is closed when no plug is inserted. When closed, the 100-kΩ/1-kΩ divider pulls the SE/BTL input low. When a plug is inserted, the 1-kΩ resistor is disconnected and the SE/BTL input is pulled high. When the input goes high, the OUT- amplifier is shut down causing the speaker to mute (virtually open-circuits the speaker). The OUT+ amplifier then drives through the output capacitor (CO) into the headphone jack. 27 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 INPUT MUX OPERATION CIRHP 0.47 µF Right Headphone Input Signal CIRLINE 0.47 µF 20 RHPIN 23 RLINEIN R MUX Volume Control Right Line Input Signal 8 CRIN 0.47 µF RIN − + ROUT+ − + ROUT− 16 21 Volume Control SE/BTL 15 HP/LINE 2 Figure 43. TPA0312 Example Input MUX Circuit The TPA0312 offers the capability for the designer to use separate headphone inputs (RHPIN, LHPIN) and line inputs (RLINEIN, LLINEIN). The inputs can be different if the input signal is single-ended. If using a differential input signal, the inputs must be the same because the inputs share a common RIN, LIN. Although the typical application in Figure 37 shows the input mux control signal HP/LINE tied to SE/BTL, that configuration is not required. The input mux can be used to select between two inputs that are used in both SE and BTL modes. If using the TPA0312 with a single-ended input, the RIN and LIN terminals must be tied through a capacitor to ground, as shown in Figure 43. RIN and LIN must not be tied to bypass or an offset occurs on the output causing the device to pop when turning on and off. Input coupling capacitors can be eliminated when using differential inputs, but are used to obtain maximum output power. If the input capacitors are eliminated, the dc offset must match the voltage on BYPASS or the output power is limited. 28 TPA0312 www.ti.com SLOS335A – DECEMBER 2000 – REVISED OCTOBER 2004 PC-BEEP OPERATION The PC-BEEP input allows a system beep to be sent directly from a computer through the amplifier to the speakers with few external components. The input is activated automatically. When the PC-BEEP input is active, both LINEIN and HPIN inputs are deselected, and both the left and right channels are driven in BTL mode with the signal from PC-BEEP. The gain from the PC-BEEP input to the speakers is fixed at 0.3 V/V and is independent of the volume setting. When the PC-BEEP input is deselected, the amplifier returns to the previous operating mode and volume setting. Furthermore, if the amplifier is in shutdown mode, activating PC-BEEP takes the device out of shutdown, outputs the PC-BEEP signal, then returns the amplifier to shutdown mode. The preferred input signal is a square wave or pulse train. To be accurately detected, the signal must have a minimum of 1.5-Vpp amplitude, rise and fall times of less than 0.1 µs and a minimum of eight rising edges. When the signal is no longer detected, the amplifier returns to its previous operating mode and volume setting. To ac-couple the PC-BEEP input, choose a coupling-capacitor value to satisfy Equation 14: C PCB 1 2 ƒ PCB (100 k) (14) The PC-BEEP input can also be dc-coupled to avoid using this coupling capacitor. The pin normally rests at midrail when no signal is present. SHUTDOWN MODES The TPA0312 employs a shutdown mode of operation designed to reduce supply current, IDD, to the absolute minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state, IDD = 150 µA. SHUTDOWN should never be left unconnected because amplifier operation would be unpredictable. Table 6. HP/LINE, SE/BTL, AND SHUTDOWN FUNCTIONS INPUTS (1) (1) (2) HP/LINE SE/BTL X (2) AMPLIFIER STATE SHUTDOWN INPUT OUTPUT X (2) Low X (2) Mute Low Low High Line BTL Low High High Line SE High Low High HP BTL High High High HP SE Inputs should never be left unconnected. X = do not care 29 THERMAL PAD MECHANICAL DATA www.ti.com PWP (R-PDSO-G24) THERMAL INFORMATION This PowerPAD™ package incorporates an exposed thermal pad that is designed to be attached directly to an external heatsink. When the thermal pad is soldered directly to the printed circuit board (PCB), the PCB can be used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to a ground plane or special heatsink structure designed into the PCB. This design optimizes the heat transfer from the integrated circuit (IC). For additional information on the PowerPAD package and how to take advantage of its heat dissipating abilities, refer to Technical Brief, PowerPAD Thermally Enhanced Package, Texas Instruments Literature No. SLMA002 and Application Brief, PowerPAD Made Easy, Texas Instruments Literature No. SLMA004. Both documents are available at www.ti.com. The exposed thermal pad dimensions for this package are shown in the following illustration. 13 24 Exposed Thermal Pad 2,40 1,65 1 12 4,48 3,75 Top View NOTE: All linear dimensions are in millimeters PPTD029 Exposed Thermal Pad Dimensions PowerPAD is a trademark of Texas Instruments IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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