SN65LVELT23 www.ti.com......................................................................................................................................................... SLLS929A – JUNE 2009 – REVISED AUGUST 2009 3.3-V Dual Differential LVPECL/LVDS Buffer to LVTTL Translator FEATURES 1 • • • • • • • • Dual 3.3-V Differential LVPECL/LVDS to LVTTL Buffer Translator 24-mA LVTTL Ouputs Operating Range – PECL VCC = 3 V to 3.6 V With GND = 0 V Support for Clock Frequencies to >180 MHz 2-ns Typical Propagation Delay Internal Input Pullup and Pulldown Resistors Built-in Temperature Compensation Drop-In Compatible to MC100LVELT23 PINOUT ASSIGNMENT D0 1 8 VCC D0 2 7 Q0 LVPECL 6 Q1 D1 4 5 GND APPLICATIONS • • Table 1. PIN DESCRIPTION Data and Clock Transmission Over Backplane Signaling Level Conversion for Clock or Data DESCRIPTION PIN FUNCTION D0, D0, D1, D1 PECL inputs Q0, Q1 TTL outputs VCC Positive supply The SN65LVELT23 is a low-power dual GND LVPECL/LVDS to LVTTL translator device. The device includes circuitry to maintain inputs at VCC/2 when left open. The SN65LVELT23 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 option. ORDERING INFORMATION (1) (1) LVTTL D1 3 Ground PART NUMBER PART MARKING PACKAGE LEAD FINISH SN65LVELT23D LVEL23 SOIC NiPdAu SN65LVELT23DGK SIMI MSOP NiPdAu Devices with lead (Pb)-bearing terminals not initially available; contact TI sales representative for further information. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated SN65LVELT23 SLLS929A – JUNE 2009 – REVISED AUGUST 2009......................................................................................................................................................... www.ti.com ABSOLUTE MAXIMUM RATINGS PARAMETER CONDITION VALUE UNIT 3.8 V 0 to 3.8 V Absolute supply voltage, VCC GND = 0 and Vi ≤ VCC Absolute input voltage, VI Output current Continuous 50 Surge 100 mA Operating temperature range –40 to 85 °C Storage temperature range –65 to 150 °C POWER DISSIPATION RATINGS PACKAGE CIRCUIT-BOARD MODEL POWER RATING TA < 25°C (mW) THERMAL RESISTANCE, JUNCTION-TO-AMBIENT, NO AIRFLOW DERATING FACTOR TA > 25°C (mW/°C) POWER RATING TA = 85°C (mW) Low-K 719 139 7 288 High-K 840 119 8 336 Low-K 469 213 5 188 High-K 527 189 5 211 SOIC MSOP THERMAL CHARACTERISTICS PARAMETER θJB Junction-to-board thermal resistance θJC Junction-to-case thermal resistance PACKAGE VALUE SOIC 79 MSOP 120 SOIC 98 MSOP 74 UNIT °C/W °C/W KEY ATTRIBUTES CHARACTERISTICS VALUE Moisture sensitivity level Level 1 Flammability rating (oxygen index: 28 to 34) UL 94 V-0 at 0.125 in. (3.18 mm) ESD human-body model 2 kV ESD charged-device model 1.5 kV Internal pulldown resistor 50 kΩ Internal pullup resistor 50 kΩ Meets or exceeds JEDEC Spec EIA/JESD78 latchup test 2 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65LVELT23 SN65LVELT23 www.ti.com......................................................................................................................................................... SLLS929A – JUNE 2009 – REVISED AUGUST 2009 LVTTL OUTPUT DC CHARACTERISTICS (1) (VCC = 3.3 V; GND = 0 V) (2) PARAMETER IOS Output short-circuit current VOH Output high voltage (3) IOH = –3.0 mA VOL Output low voltage IOL = 24 mA (1) (2) (3) –40°C CONDITION 25°C MIN TYP MAX –120 –30 MIN 85°C TYP MAX –120 2.4 –30 2.4 MIN TYP –120 MAX –30 2.4 0.5 UNIT mA V 0.5 0.5 V Device meets the specifications after thermal equilibrium has been established when mounted in a socket or printed circuit board with maintained transverse airflow greater than 500 lfpm (2.54 m/s). Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. All values vary 1:1 with Vcc; Vcc can vary ±0.3 V LVTTL output RL = 500 Ω to GND LVPECL INPUT DC CHARACTERISTICS (1) (VCC = 3.3 V; GND = 0.0 V) (2) –40°C PARAMETER 25°C 85°C UNIT MIN TYP MAX MIN TYP MAX MIN TYP MAX 10 21 25 10 21 25 10 21 25 mA 15 21 21 21 ICCH Power-supply current (outputs set to high) ICCL Power-supply current (outputs set to low) 27 15 27 15 27 mA VIH Input high voltage (3) 2135 2420 2135 2420 2135 2420 mV VIL Input low voltage (3) 1490 1825 1490 1825 1490 1825 mV VIHCMR Input high-voltage common-mode range (differential) (4) 1.2 VCC 1.2 VCC 1.2 VCC V IIH Input high current 150 µA IIL Input low current (1) (2) (3) (4) 150 –150 150 –150 µA –150 Device meets the specifications after thermal equilibrium has been established when mounted in a socket or printed circuit board with maintained transverse airflow greater than 500 lfpm (2.54 m/s). Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Input and output parameters vary 1:1 with VCC. VCC can vary ±0.3 V. LVTTL output RL = 500 Ω to GND VIHCMR minimum varies 1:1 with GND, VIHCMR maximum varies 1:1 with VCC. AC CHARACTERISTICS (1) (VCC = 3.3 V; GND = 0.0 V) (2) PARAMETER (3) –40°C 25°C MIN TYP MAX MIN TYP 180 300 1.2 85°C MAX MIN TYP 180 300 1.2 MAX UNIT fMAX Maximum switching frequency (4) 180 300 tPLH/tPHL Propagation delay to output at 1.5 V 1.2 1.6 2.2 1.7 2.2 1.8 2.2 ns tSK++ Output-to-output skew++ 30 160 30 150 30 150 ps tSK– – Output to output skew– – 45 180 45 160 45 135 ps tSKPP Part- to-part skew 60 200 60 200 70 200 ps tJITTER Random clock jitter (RMS) 4 10 VPP Input voltage swing tr/tf Output rise/fall times (0.8 V – 2 V) (1) (2) (3) (4) (5) (6) (5) (6) MHz 4 10 4 10 ps 200 800 1000 200 800 1000 200 800 1000 mV 330 585 330 600 900 330 630 900 ps 900 Device meets the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm (2.54 m/s). Electrical parameters are assured only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Input parameters vary 1:1 with VCC. VCC can vary ±0.3 V. TTL output RL = 500 Ω to GND and CL = 20 pF to GND; see Figure 1. fmax measured for VOL < 0.5 V and VOH > 2.4 V. See Figure 5. Skews are measured between outputs under identical conditions. 200-mV input assured full logic swing at the output. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65LVELT23 3 SN65LVELT23 SLLS929A – JUNE 2009 – REVISED AUGUST 2009......................................................................................................................................................... www.ti.com Typical Output Loading Used for Device Evaluation Application TTL Receiver Characteristic Test RL *CL *CL Includes Fixture Capacitance AC TEST LOAD GND Figure 1. TTL Output Loading Used for Device Evaluation 2.0 V 0.8 V tr tf Figure 2. Output Rise and Fall Times IN IN 1.5 V 1.5 V OUT tPLH tPHL Figure 3. Output Propagation Delay D VPP(min) VPP(max) D Figure 4. Input Voltage Swing 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65LVELT23 SN65LVELT23 www.ti.com......................................................................................................................................................... SLLS929A – JUNE 2009 – REVISED AUGUST 2009 OUTPUT VOLTAGE vs FREQUENCY 5 VCC = 3.3 V VOH @ TA = −40°C PO − Output Voltage − V 4 VOH @ TA = 25°C 3 VOH @ TA = 85°C 2 VOL @ TA = −40°C VOL @ TA = 25°C 1 VOL @ TA = 85°C 0 0 50 100 150 200 250 300 350 400 450 500 f − Frequency − MHz G001 Figure 5. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65LVELT23 5 SN65LVELT23 SLLS929A – JUNE 2009 – REVISED AUGUST 2009......................................................................................................................................................... www.ti.com REVISION HISTORY Changes from Revision Original (June 2009) to Revision A ......................................................................................... Page • 6 Changed MIN and MAX values for tPLH/tPHL in AC CHARACTERISTICS table..................................................................... 3 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): SN65LVELT23 PACKAGE OPTION ADDENDUM www.ti.com 4-Aug-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN65LVELT23D ACTIVE SOIC D 8 Lead/Ball Finish 75 Green (RoHS & no Sb/Br) CU NIPDAU MSL Peak Temp (3) Level-1-260C-UNLIM SN65LVELT23DGK PREVIEW MSOP DGK 8 80 TBD Call TI Call TI SN65LVELT23DGKR PREVIEW MSOP DGK 8 2500 TBD Call TI Call TI SN65LVELT23DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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