TI SNJ54AHC573J

SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004
D Operating Range 2-V to 5.5-V VCC
D 3-State Outputs Directly Drive Bus Lines
D Latch-Up Performance Exceeds 250 mA Per
SN54AHC573 . . . J OR W PACKAGE
SN74AHC573 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
JESD 17
description/ordering information
The ’AHC573 devices are octal transparent
D-type latches designed for 2-V to 5.5-V VCC
operation.
When the latch-enable (LE) input is high, the
Q outputs follow the data (D) inputs. When LE is
low, the Q outputs are latched at the logic levels
of the D inputs.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
2D
1D
OE
VCC
3D
4D
5D
6D
7D
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
2Q
3Q
4Q
5Q
6Q
8D
GND
LE
8Q
7Q
OE does not affect the internal operations of the
latches. Old data can be retained or new data can
be entered while the outputs are in the
high-impedance state.
1Q
SN54AHC573 . . . FK PACKAGE
(TOP VIEW)
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or the high-impedance state. In
the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and increased drive
provide the capability to drive bus lines without
interface or pullup components.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
PDIP − N
SN74AHC573N
Tube
SN74AHC573DW
Tape and reel
SN74AHC573DWR
SOP − NS
Tape and reel
SN74AHC573NSR
AHC573
SSOP − DB
Tape and reel
SN74AHC573DBR
HA573
Tube
SN74AHC573PW
Tape and reel
SN74AHC573PWR
TVSOP − DGV
Tape and reel
SN74AHC573DGVR
HA573
CDIP − J
Tube
SNJ54AHC573J
SNJ54AHC573J
CFP − W
Tube
SNJ54AHC573W
SNJ54AHC573W
LCCC − FK
Tube
SNJ54AHC573FK
SNJ54AHC573FK
TSSOP − PW
−55°C
−55
C to 125
125°C
C
TOP-SIDE
MARKING
Tube
SOIC − DW
−40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
SN74AHC573N
AHC573
HA573
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2004, Texas Instruments Incorporated
!"# $"%&! '#(
'"! ! $#!! $# )# # #* "#
'' +,( '"! $!#- '# #!#&, !&"'#
#- && $##(
$'"! !$& ./0
&& $## # ##'
"&# )#+# #'( && )# $'"!
$'"!
$!#- '# #!#&, !&"'# #- && $##(
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004
FUNCTION TABLE
(each latch)
INPUTS
OE
LE
D
OUTPUT
Q
L
H
H
H
L
H
L
L
L
L
X
Q0
H
X
X
Z
logic diagram (positive logic)
OE
LE
1
11
C1
1D
2
1D
19
1Q
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004
recommended operating conditions (see Note 3)
SN54AHC573
VCC
VIH
Supply voltage
VCC = 2 V
VCC = 3 V
High-level input voltage
VI
VO
IOH
MAX
2
5.5
1.5
VCC = 5.5 V
VCC = 2 V
VIL
MIN
Output voltage
∆t/∆v
2.1
V
V
0.5
0.9
0.9
1.65
1.65
V
0
5.5
0
5.5
V
0
VCC
−50
0
VCC
−50
mA
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
VCC = 3.3 V ± 0.3 V
Input transition rise or fall rate
5.5
3.85
VCC = 2 V
VCC = 3.3 V ± 0.3 V
Low-level output current
2
UNIT
1.5
2.1
VCC = 5 V ± 0.5 V
VCC = 2 V
IOL
MAX
0.5
Input voltage
High-level output current
MIN
3.85
VCC = 3 V
VCC = 5.5 V
Low-level input voltage
SN74AHC573
VCC = 5 V ± 0.5 V
−4
−4
−8
−8
50
50
4
4
8
8
100
100
20
20
V
mA
mA
mA
ns/V
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VCC
MIN
TA = 25°C
TYP
MAX
2V
1.9
2
1.9
1.9
3V
2.9
3
2.9
2.9
4.5 V
4.4
4.5
4.4
4.4
IOH = −4 mA
3V
2.58
2.48
2.48
IOH = −8 mA
4.5 V
3.94
3.8
3.8
TEST CONDITIONS
IOH = −50 mA
VOH
IOL = 50 mA
VOL
IOL = 4 mA
IOL = 8 mA
II
IOZ
VI = 5.5 V or GND
VI = VIL or VIH, VO = VCC or GND
ICC
Ci
VI = VCC or GND,
VI = VCC or GND
IO = 0
SN54AHC573
MIN
MAX
SN74AHC573
MIN
MAX
UNIT
V
2V
0.1
0.1
0.1
3V
0.1
0.1
0.1
4.5 V
0.1
0.1
0.1
3V
0.36
0.5
0.44
V
4.5 V
0.36
0.5
0.44
0 V to 5.5 V
±0.1
±1*
±1
mA
5.5 V
±0.25
±2.5
±2.5
mA
5.5 V
4
40
40
mA
10
pF
5V
2.5
10
Co
VO = VCC or GND
5V
3.5
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
pF
3
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004
timing requirements over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
TA = 25°C
MIN
MAX
SN54AHC573
MIN
MAX
SN74AHC573
MIN
MAX
UNIT
tw
Pulse duration, LE high
5
5
5
ns
tsu
Setup time, data before LE↓
3.5
3.5
3.5
ns
th
Hold time, data after LE↓
1.5
1.5
1.5
ns
timing requirements over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
TA = 25°C
MIN
MAX
tw
Pulse duration, LE high
tsu
th
SN54AHC573
MIN
MAX
SN74AHC573
MIN
MAX
UNIT
5
5
5
ns
Setup time, data before LE↓
3.5
3.5
3.5
ns
Hold time, data after LE↓
1.5
1.5
1.5
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
D
Q
CL = 15 pF
tPLH
tPHL
LE
Q
CL = 15 pF
tPZH
tPZL
OE
Q
CL = 15 pF
tPHZ
tPLZ
OE
Q
CL = 15 pF
tPLH
tPHL
D
Q
CL = 50 pF
tPLH
tPHL
LE
Q
CL = 50 pF
tPZH
tPZL
OE
Q
CL = 50 pF
tPHZ
tPLZ
OE
Q
CL = 50 pF
TA = 25°C
MIN
TYP
MAX
POST OFFICE BOX 655303
SN74AHC573
MIN
MAX
MIN
MAX
7*
11*
1*
13*
1
13
7*
11*
1*
13*
1
13
7.6*
11.9*
1*
14*
1
14
7.6*
11.9*
1*
14*
1
14
7.3*
11.5*
1*
13.5*
1
13.5
7.3*
11.5*
1*
13.5*
1
13.5
8.3*
11*
1*
13*
1
13
8.3*
11*
1*
13*
1
13
9.5
14.5
1
16.5
1
16.5
9.5
14.5
1
16.5
1
16.5
10.1
15.4
1
17.5
1
17.5
10.1
15.4
1
17.5
1
17.5
9.8
15
1
17
1
17
9.8
15
1
17
1
17
10.7
14.5
1
16.5
1
16.5
10.7
14.5
1
16.5
1
16.5
tsk(o)
CL = 50 pF
∗ On products compliant to MIL-PRF-38535, this parameter is not production tested.
∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply.
4
SN54AHC573
• DALLAS, TEXAS 75265
1.5**
1.5
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
D
Q
CL = 15 pF
tPLH
tPHL
LE
Q
CL = 15 pF
tPZH
tPZL
OE
Q
CL = 15 pF
tPHZ
tPLZ
OE
Q
CL = 15 pF
tPLH
tPHL
D
Q
CL = 50 pF
tPLH
tPHL
LE
Q
CL = 50 pF
tPZH
tPZL
OE
Q
CL = 50 pF
tPHZ
tPLZ
OE
Q
CL = 50 pF
MIN
TA = 25°C
TYP
MAX
SN54AHC573
SN74AHC573
MIN
MAX
MIN
MAX
4.5*
6.8*
1
8*
1
8
4.5*
6.8*
1
8*
1
8
5*
7.7*
1
9*
1
9
5*
7.7*
1
9*
1
9
5.2*
7.7*
1
9*
1
9
5.2*
7.7*
1
9*
1
9
5.2*
7.7*
1
9*
1
9
5.2*
7.7*
1
9*
1
9
6
8.8
1
10
1
10
6
8.8
1
10
1
10
6.5
9.7
1
11
1
11
6.5
9.7
1
11
1
11
6.7
9.7
1
11
1
11
6.7
9.7
1
11
1
11
6.7
9.7
1
11
1
11
6.7
9.7
1
11
1
11
tsk(o)
CL = 50 pF
∗ On products compliant to MIL-PRF-38535, this parameter is not production tested.
∗∗ On products compliant to MIL-PRF-38535, this parameter does not apply.
1**
1
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4)
SN74AHC573
PARAMETER
MIN
MAX
UNIT
VOL(P)
Quiet output, maximum dynamic VOL
1
V
VOL(V)
Quiet output, minimum dynamic VOL
−0.8
V
VOH(V)
Quiet output, minimum dynamic VOH
VIH(D)
High-level dynamic input voltage
VIL(D)
Low-level dynamic input voltage
4
V
3.5
V
1.5
V
TYP
UNIT
NOTE 4: Characteristics are for surface-mount packages only.
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance
No load,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
f = 1 MHz
16
pF
5
SCLS242K − OCTOBER 1995 − REVISED JANUARY 2004
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
RL = 1 kΩ
From Output
Under Test
Test
Point
S1
VCC
Open
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
VCC
50% VCC
Timing Input
tw
tsu
VCC
Input
50% VCC
50% VCC
0V
th
VCC
50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
50% VCC
Input
50% VCC
0V
tPLH
In-Phase
Output
tPHL
50% VCC
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
VCC
Output
Control
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
0V
tPZL
50% VCC
tPLZ
≈VCC
50% VCC
tPZH
tPLH
VOH
50% VCC
VOL
50% VCC
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9685601Q2A
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
5962-9685601QRA
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
1
TBD
Call TI
Level-NC-NC-NC
TBD
Call TI
Call TI
Lead/Ball Finish
MSL Peak Temp (3)
5962-9685601QSA
ACTIVE
CFP
W
20
SN74AHC573DBLE
OBSOLETE
SSOP
DB
20
SN74AHC573DBR
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573DBRE4
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573DGVR
ACTIVE
TVSOP
DGV
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573DGVRE4
ACTIVE
TVSOP
DGV
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573DW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573DWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573DWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573DWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573N
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74AHC573NE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74AHC573NSR
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573NSRE4
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573PW
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573PWE4
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573PWLE
OBSOLETE
TSSOP
PW
20
TBD
Call TI
SN74AHC573PWR
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AHC573PWRG4
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SNJ54AHC573FK
ACTIVE
LCCC
FK
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54AHC573J
ACTIVE
CDIP
J
20
1
TBD
Call TI
Level-NC-NC-NC
SNJ54AHC573W
ACTIVE
CFP
W
20
1
TBD
Call TI
Level-NC-NC-NC
(1)
Call TI
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2005
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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