SP5502 1.3GHz I2C BUS 4-Address Synthesiser Supersedes version in April 1994 Consumer IC Handbook, HB3120 - 2.0 DS3031 - 5.0 January 1997 The SP5502 is a single-chip frequency synthesiser designed for TV tuning systems. Control data is entered in the standard I2C BUS format. The SP5502 has four programmable I2C BUS addresses, which allows two or more synthesisers to be used in a system. The device is available in two variants: the SP5502F in 14lead miniature plastic package (MP14) and the SP5502S in 16lead miniature plastic package (MP16). See Features below for functional differences between the devices. FEATURES ■ Complete 1·3GHz Single Chip System ■ Programmable via the I2C BUS ■ Low Power Consumption (240mW Typ.) ■ Low Radiation ■ Phase Lock Detector ■ Varactor Drive Amp Disable ■ 5320mA Controllable Outputs (SP5502S) ■ 3320mA Controllable Outputs (SP5502F) ■ Variable I2C BUS Address for Multi-Tuner Applications ■ ESD Protection * * Normal ESD handling precautions should be observed. APPLICATIONS ■ Cable Tuning Systems ■ VCRs Fig. 1 Pin connections – top view ORDERING INFORMATION SP5502F KG MPAS (14-lead miniature plastic package) SP5502S KG MPAS (16-lead miniature plastic package) Fig. 2 Block diagram of SP5502S. (Ports P0 and P4 not present on SP5502F) SP5502 ELECTRICAL CHARACTERISTICS TAMB = 210°C to 180°C, VCC = 14·5V to 15·5V. All pin references are to the SP5502S (MP16 package). These Characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage ranges unless otherwise stated. Reference frequency 4MHz unless otherwise stated. Value Characteristic Pin Units Min. Supply current Prescaler input voltage Prescaler input voltage 12 13,14 Prescaler input impedance Prescaler input capacitance 13,14 SDA, SCL Input high voltage Input low voltage Input high current Input low current Leakage current SDA Output voltage Charge pump current low Charge pump current high Charge pump output leakage current Charge pump drive output current Charge pump amplifier gain Recommended crystal series resistance Crystal oscillator drive level Crystal oscillator negative resistance Output Ports Sink current Leakage current Input Port P3 input current high P3 input current low 4,5 4,5 4,5 4,5 4,5 Typ. Max. 48 60 300 300 12·5 30 4 1 1 1 16 mA VCC = 5V mVrms 80MHz to 1GHz mVrms 1·3GHz, see Fig. 5 Ω pF 50 2 3 0 Conditions VCC 1·5 10 210 10 V V µA µA µA Input voltage = VCC Input voltage = 0V When VCC = 0V 0·4 V Sink current = 3mA µA µA nA Byte 4, bit 2 = 0, pin 1 = 2V Byte 4, bit 2 = 1, pin 1 = 2V Byte 4, bit 4 = 1, pin 1 = 2V V pin 16 = 0·7V 650 6170 65 500 6400 10 200 40 2 750 6,7,9-11 6,7,9-11 20 8 8 Ω Parallel resonant crystal (note 2) mV p-p Ω 10 mA µA VOUT = 0·7V (see note 1) VOUT = 13·2V 1 20·5 mA mA V pin 8 = VCC V pin 8 = 0V NOTES 1. Source impedance between all output ports and ground is approximately 5Ω. This should be taken into account when calculating output port saturation voltages. 2. The maximum resistance quoted refers to all conditions, including start-up. FUNCTIONAL DESCRIPTION (Except where otherwise indicated, ‘SP5502’ refers to both variants) The SP5502 is programmed from an I2 C BUS. Data and Clock are fed in on the SDA and SCL lines respectively as defined by the I2C Bus format. The synthesiser can either accept new data (write mode) or send data (read mode). The Tables in Fig. 3 illustrate the format of the data. The device can be programmed to respond to several addresses, which enables the use of more than one synthesiser in an I2C Bus system. Table 3 shows how the address is selected by applying a voltage to P3. The address input is shown in Fig. 6. The LSB of the address Byte (R/W) sets the device into read mode if it is high and write mode if it is low. When the SP5502 receives a correct address Byte it pulls the SDA line low during the acknowledge period and during following acknowledge periods after further data Bytes are programmed. When the SP5502 is programmed into the read mode the controlling device accepting the data must pull down the SDA line during the following acknowledge period to read another status Byte. 2 WRITE MODE (FREQUENCY SYNTHESIS) When the device is in the write mode Bytes 213 select the synthesised frequency while Bytes 415 select the output port states and charge pump information. Once the correct address is received and acknowledged, the first Bit of the next Byte determines whether that Byte is interpreted as Byte 2 or 4, a logic 0 for frequency information and a logic 1 for charge pump and output port information. Additional data Bytes can be entered without the need to readdress the device until an I2 C stop condition is recognised. This allows a smooth frequency sweep for fine tuning or AFC purposes. If the transmission of data is stopped mid-byte (i.e., by another device on the bus) then the previously programmed byte is maintained. Frequency data from Bytes 2 and 3 is stored in a 15-bit shift register and is used to control the division ratio of the 15-bit programmable divider which is preceded by a divide-by-8 prescaler and amplifier to give excellent sensitivity at the local oscillator input; see Fig 5. The input impedance is shown in Fig 7. SP5502 The programmed frequency can be calculated by multiplying the programmed division ratio by 8 times the comparison frequency FCOMP . When frequency data is entered, the phase comparator, via the charge pump and varactor drive amplifier, adjusts the local oscillator control voltage until the output of the programmable divider is frequency and phase locked to the comparison frequency. The reference frequency may be generated by an external source capacitively coupled into pin 2 or provided by an onchip 4MHz crystal controlled oscillator. Note that the comparison frequency is 7·8125kHz when a 4MHz reference is used. Bit 2 of Byte 4 of the programming data (CP) controls the current in the charge pump circuit, a logic 1 for 6170µA and a logic 0 for 650µA, allowing compensation for the variable tuning slope of the tuner and also to enable fast channel changes over the full band. Bit 4 of Byte 4 (T0) disables the charge pump if set to a logic 1. Bit 8 of Byte 4 (OS) switches the charge pump drive amplifier’s output off when it is set to a logic 1. Bit 3 of Byte 4 (T1) selects a test mode where the phase comparator inputs are available on P2 and P7, a logic 1 connects FCOMP to P2 and FDIV to P7. Byte 5 programs the output ports P0-P2, P4 and P7 on the SP5502S (P1, P2 and P7 only on SP5502F), a logic 0 for a high impedance output, logic 1 for low impedance (on). READ MODE When the device is in the read mode the status data read from the device on the SDA line takes the form shown in Table 2. Bit 1 (POR) is the power supply to the device has dropped below a nominal 3V and the programmed information lost (e.g., when the device is initially turned on). The POR is set to 0 when the read sequence is terminated by a stop command. The outputs are all set to high impedance when the device is initially powered up. Bit 2 (FL) indicates whether the device is phase locked, a logic 1 is present if the device is locked and a logic 0 if the device is unlocked. MSB Address LSB 1 1 0 0 0 Programmable divider 0 14 13 12 11 Programmable divider 7 2 2 Charge pump and test bits 1 P7 I/O port control bits 2 2 6 5 2 2 MA1 MA0 10 2 9 2 1 0 A Byte 1 8 A Byte 2 0 2 2 4 2 3 2 2 2 2 2 A Byte 3 CP T1 T0 1 1 1 OS A Byte 4 X X P4* X P2 P1 P0* A Byte 5 1 A Byte 1 N A Byte 2 Table 1 Write data format (MSB transmitted first) Address Status byte 1 1 POR FL 0 0 0 N N N MA1 MA0 N N Table 2 Read data format MA1 MA0 Voltage input to P3 0 0 0V to 0·1VCC 0 1 Open circuit 1 0 0·4VCC to 0·6VCC† 1 1 0·9VCC to VCC Table 3 Address selection A : MA1, MA0 : CP : T1 : T0 : OS : P7, P4*, P2, P1, P0* POR : FL : X : N : Acknowledge bit Variable address bits (see Table 3) Charge Pump current select Test mode selection Charge pump disable Varactor drive Output disable Switch : Control output port states Power On Reset indicator Phase lock detect flag Don’t care Not valid NOTES † Programmed by connecting a 15kΩ resistor between Address Select Port P3 and VCC. * Don’t care condition on SP5502F. Fig. 3 Data formats 3 SP5502 APPLICATION A typical application is shown in Fig. 4. All input/output interface circuits are shown in Fig. 6. Fig. 4 Typical application Fig. 5 Typical input sensitivity 4 SP5502 Fig. 6 SP5502 input/output interface circuits 5 SP5502 Fig. 7 Typical input impedance ABSOLUTE MAXIMUM RATINGS All voltages are referred to VEE = 0V Pin Parameter Value Units Conditions SP5502S SP5502F Min. Max. 12 10 20·3 7 V 13,14 11,12 2·5 V p-p Port voltage 6,7, 9-11 6,7, 9-11 8 6,8, 9 6,8, 9 7 14 6 VCC10·3 V V V Total port output current 6,7, 9-11 6,8, 9 50 mA 13,14 11,12 20·3 VCC10·3 V Charge pump DC offset 1 1 20·3 VCC10·3 V Drive output DC offset 16 14 20·3 VCC10·3 V Crystal oscillator DC offset 2 2 20·3 VCC10·3 V 4,5 4,5 20·3 VCC10·3 V With VCC applied VCC not applied Supply voltage RF input voltage RF input DC offset SDA, SCL input voltage 20·3 20·3 20·3 20·3 5·5 V 255 1150 °C 1150 °C MP16 thermal resistance, chip-to-ambient MP16 thermal resistance, chip-to-case 111 41 °C/W °C/W MP14 thermal resistance, chip-to-ambient MP14 thermal resistance, chip-to-case 123 45 °C/W °C/W Power consumption at 5·5V 363 mW Storage temperature Junction temperature 6 Port in off state Port in on state http://www.mitelsemi.com World Headquarters - Canada Tel: +1 (613) 592 2122 Fax: +1 (613) 592 6909 North America Tel: +1 (770) 486 0194 Fax: +1 (770) 631 8213 Asia/Pacific Tel: +65 333 6193 Fax: +65 333 6192 Europe, Middle East, and Africa (EMEA) Tel: +44 (0) 1793 518528 Fax: +44 (0) 1793 518581 Information relating to products and services furnished herein by Mitel Corporation or its subsidiaries (collectively “Mitel”) is believed to be reliable. However, Mitel assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Mitel or licensed from third parties by Mitel, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Mitel, or non-Mitel furnished goods or services may infringe patents or other intellectual property rights owned by Mitel. This publication is issued to provide information only and (unless agreed by Mitel in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Mitel without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Mitel’s conditions of sale which are available on request. M Mitel (design) and ST-BUS are registered trademarks of MITEL Corporation Mitel Semiconductor is an ISO 9001 Registered Company Copyright 1999 MITEL Corporation All Rights Reserved Printed in CANADA TECHNICAL DOCUMENTATION - NOT FOR RESALE