RF2513 11 UHF TRANSMITTER Typical Applications • Single- or Dual-Channel LO Source • 433/868/915MHz ISM Band Systems • FM/FSK Transmitter • Wireless Security Systems • Wireless Data Transmitters Product Description 0.157 0.150 1 0.012 0.008 0.344 0.337 0.025 8°MAX 0°MIN 0.050 0.016 Optimum Technology Matching® Applied ü Si BJT GaAs HBT GaAs MESFET Si Bi-CMOS SiGe HBT Si CMOS 0.0688 0.0532 0.2440 0.2284 0.0098 0.0075 Package Style: SSOP-24 11 Features LVL ADJ MOD IN RESNTR- RESNTR+ VCO TUNE LOOP FLT VREF P OSC B1 OSC E OSC B2 • Fully Integrated PLL Circuit 7 16 18 20 22 23 13 3 2 1 • 10mW Output Power at 433MHz • 2.7V to 5.0V Supply Voltage • Low Current and Power Down Capability Gain Control TX OUT Phase Detector & Charge Pump 8 Ref. Select Prescaler 128/129 or 64/65 • 300MHz to 1000MHz Frequency Range 24 OSC SEL 12 PRESCL OUT 14 MOD CTRL 15 DIV CTRL • Narrowband and Wideband FM Ordering Information RF2513 RF2513 PCBA-L RF2513 PCBA-M RF2513 PCBA-H Functional Block Diagram Rev B8 010509 UHF Transmitter Fully Assembled Evaluation Board, 433MHz Fully Assembled Evaluation Board, 868MHz Fully Assembled Evaluation Board, 915MHz RF Micro Devices, Inc. 7625 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 11-23 TRANSCEIVERS The RF2513 is a monolithic integrated circuit intended for use as a low-cost frequency synthesizer and transmitter. The device is provided in a 24 pin SSOP package and is designed to provide a phased locked frequency source for use in local oscillator or transmitter applications. The chip can be used in FM or FSK applications in the U.S. 915MHz ISM band and European 433MHz or 868MHz ISM band. The integrated VCO, dual-modulus/dual-divide (128/129 or 64/65) prescaler, and reference oscillator require only the addition of an external crystal to provide a complete phase-locked oscillator. A second reference oscillator is available to support two channel applications. 0.0098 0.0040 RF2513 Absolute Maximum Ratings Parameter Supply Voltage Power Down Voltage (VPD) Operating Ambient Temperature Storage Temperature Parameter Rating Unit -0.5 to +5.5 -0.5 to VCC -40 to +85 -40 to +150 VDC V °C °C Specification Min. Typ. Max. Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Unit T=25 °C, VCC =3.6V, Freq=915MHz Overall Frequency Range Modulation Modulation Frequency Maximum FM Deviation Condition 300 to 1000 FM/FSK MHz 2 200 MHz kHz Dependent upon Supply Voltage PLL and Prescaler Prescaler Divide Ratio PLL Lock TIme 64/65 or 128/129 4/PLL BW PLL Phase Noise Reference Frequency Max Crystal RS Charge Pump Current ms -72 -95 17 100 +40 TBD -40 dBc/Hz dBc/Hz MHz Ω µA The PLL lock time, from power up, is set externally by the bandwidth of the loop filter. 10kHz Offset, 10kHz loop bandwidth 100kHz Offset, 10kHz loop bandwidth Transmit Section TRANSCEIVERS 11 Maximum Power Level +3 Power Control Range Power Control Sensitivity Antenna Port Impedance Antenna Port VSWR Modulation Input Impedance Harmonics Spurious 15 +8 +2 dBm dBm dB dB/V Ω 10 50 1.5:1 4 kΩ dBc dBc -23 Freq=433MHz Freq=915MHz TX ENABL=“1” TX Mode Compliant to Part 15.249 and I-ETS 300 220 Power Down Control Logic Controls “ON” Logic Controls “OFF” Control Input Impedance Turn On Time 2.0 Voltage supplied to the input; device is “ON” Voltage supplied to the input; device is “OFF” 5 + 4/PLL BW 4 V V kΩ ms ms From Change in OSC SEL,7.075MHz XTAL 1 V V mA mA mA µA Specifications Operating limits TX Mode, LVL ADJ=3.6V TX Mode, LVL ADJ=0V PLL Only LVL ADJ=0V, PLL ENABL=0V, TX ENABL=0V, OSC SEL=0V 1.0 25 Turn Off Time From Change in OSC SEL,7.075MHz XTAL Power Supply Voltage Current Consumption 11-24 3.6 2.7 to 5.0 27 10 8 Rev B8 010509 RF2513 Pin 1 Function OSC B2 2 OSC E 3 OSC B1 4 PLL ENABL 5 GND1 6 VCC3 7 LVL ADJ Description This pin is connected directly to the reference oscillator transistor base. The intended reference oscillator configuration is a modified Colpitts. An appropriate capacitor as chosen by the customer should be connected between pin 1 and pin 2. This pin is connected directly to the emitter of the reference oscillator transistor. An appropriate capacitor as chosen by the customer should be connected from this pin to ground. This pin is connected directly to the reference oscillator transistor base. The intended reference oscillator configuration is a modified Colpitts. An appropriate capacitor as chosen by the customer should be connected between pin 3 and pin 2. This pin is used to power up or down the VCO and PLL. A logic high (PLL ENABL>2.0V) powers up the VCO and PLL electronics. A logic low (PLL ENABL<1.0V) powers down the PLL and VCO. Interface Schematic OSC B1 OSC B2 OSC E See pin 1. See pin 1. 50 kΩ PLL ENABL Ground connection for the PA buffer amp. Keep traces physically short and connect immediately to ground plane for best performance. This pin is used to supply DC bias to the transmitter PA. A RF bypass capacitor should be connected directly to this pin and returned to ground. A 100pF capacitor is recommended for 915MHz applications. A 220pF capacitor is recommended for 433MHz applications. This pin is used to vary the transmitter output power. An output level adjustment range greater than 12dB is provided through analog voltage control of this pin. DC current of the transmitter power amp ia also reduced with output power. This pin MUST be low when the transmitter is disabled. 40 kΩ LVL ADJ 400 8 TX OUT RF output pin for the transmitter electronics. TX OUT output impedance is a low impedance when the transmitter is enabled. TX OUT is a high impedance when the transmitter is disabled. 4 kΩ VCC 11 20 9 GND2 10 VCC1 11 TX ENABL 12 13 Ground connection for the Tx PA functions. Keep traces physically short and connect immediately to ground plane for best performance. This pin is used to supply DC bias to the PA buffer amp. A RF bypass capacitor should be connected directly to this pin and returned to ground. A 100pF capacitor is recommended for 915MHz applications. A 220pF capacitor is recommended for 433MHz applications. Enables the transmitter circuits. TX ENABL>2.0V powers up all transmitter functions. TX ENABL<1.0V turns off all transmitter functions except the PLL functions. PRESCL OUT Dual-modulus/Dual-divide prescaler output. The output can be interfaced to an external PLL IC for additional flexibility in frequency programming. VREF P Bias voltage reference pin for bypassing the prescaler and phase detector. The bypass capacitor should be of appropriate size to provide filtering of the reference crystal frequency and be connected directly to this pin. Rev B8 010509 TRANSCEIVERS TX OUT 20 kΩ TX ENABL 40 kΩ PRESCL OUT 11-25 RF2513 Pin 14 15 Function Description MOD CTRL This pin is used to select the prescaler modulus. A logic “high” selects 64 or 128 for the prescaler divisor. A logic “low” selects 65 or 129 for the prescaler divisor. DIV CTRL 16 MOD IN 17 18 VCC2 RESNTR- This pin is used to select the desired prescaler divisor. A logic “high” selects the 64/65 divisor. A logic low selects the 128/129 divisor. Interface Schematic MOD CTL DIV CTL FM analog or digital modulation can be imparted to the VCO through See pin 18. this pin. The VCO varies in accordance to the voltage level presented to this pin. To set the deviation to a desired level, a voltage divider referenced to Vcc is the recommended. Because the modulation varactors are part of the resonator tank, the deviation is slightly dependent upon the components used in the external tank. This pin is used to is supply DC bias to the VCO, prescaler, and PLL. The RESNTR pins are used to supply DC voltage to the VCO, as well as to tune the center frequency of the VCO. Equal value inductors should be connected to this pin and pin 20. RESNTR+ RESNTR- 4 kΩ MOD IN 19 20 21 NC RESNTR+ GND3 22 VCO TUNE Not internally connected. See pin 18. GND is the ground shared on chip by the VCO, prescaler, and PLL electronics. Keep traces physically short and connect immediately to ground plane for best performance. Loop filter input to VCO. See pin 18. RESNTR+ RESNTR- 11 4 kΩ TRANSCEIVERS VCO TUNE 23 LOOP FLT OUT Output of the charge pump. An RC network from this pin to ground is used to establish the PLL bandwidth. VCC LOOP FLT 24 OSC SEL ESD 11-26 A logic high (OSC SEL>2.0V) applied to this pin powers on reference oscillator 2 and powers down reference oscillator 1. A logic low (OSC SEL<1.0V) applied to this pin powers on reference oscillator 1 and powers down reference oscillator 2. This diode structure is used to provide electrostatic discharge protection to 3kV using the Human body model. The following pins are protected: 1-3, 9, 10,12-15, 17, 21-23. VCC Rev B8 010509 RF2513 RF2513 Theory of Operation The RF2513 is provided in a 24-pin SSOP-24 package and is designed to operate from a supply voltage ranging from 2.2V to 5.0V, accommodating designs using three NiCd battery cells, two AAA flashlight cells, or a lithium button battery. The device is capable of providing up to 10mW output power into a 50Ω load (+10dBm) and is intended to comply with FCC requirements for unlicensed remote control transmitters. RF2513 Functional Blocks A PLL consists of a reference oscillator, phase detector, loop filter, voltage controlled oscillator (VCO), and a programmable divider in the feedback path. The RF2513 includes all of these internally, except for the loop filter and the reference oscillator’s crystal and two feedback capacitors. The reference oscillators are Colpitts type oscillators. Pins 1 (OSC B2), 2 (OSC E), and 3 (OSC B1) provide connections to the internal transistors used as reference oscillators. The Colpitts configuration is a low parts-count topology with reliable performance and reasonable phase noise. Alternatively, an external signal could be injected into the base of either transistor. In either case, the drive level should be around 500mVPP. This level prevents overdriving the device and keeps phase noise and reference spurs minimal. The user sets which oscillator is operational by setting pin 24 (OSC SEL) either high or low. This allows the implementation of two channel systems. The prescaler divides the Voltage Controlled Oscillator (VCO) frequency down by either 64/65 or 128/129, using a series of flip-flops, depending upon the logic level present at pin 15 (DIV CTRL). A high logic level will select the 64/65 divisor. A low logic level will select the 128/129 divisor. This divided signal is then fed into the phase detector where it is compared with the reference frequency. Rev B8 010509 In addition to the DIV CTRL setting, one also sets the prescaler modulus by setting pin 14 (MOD CTRL) either high or low. A high logic level will select the 64/ 128 divisor. A low logic level will select the 65/129 divisor. Pin 12 (PRESCL OUT) provides access to the prescaler output. This is used for interfacing to an external PLL IC. The RF2513 contains an onboard phase detector and charge pump. The phase detector compares the phase of the reference oscillator to the phase of the VCO. The phase detector is implemented using flipflops in a topology referred to as either “digital phase/ frequency detector” or “digital tri-state comparator”. The circuit consists of two D flip-flops whose outputs are combined with a NAND gate which is then tied to the reset on each flip-flop. The outputs of the flip-flops are also connected to the charge pump. Each flip-flop output signal is a series of pulses whose frequency is related to the flip-flop input frequency. When both inputs of the flip-flops are identical, the signals are both frequency and phase locked. If they are different, they will provide signals to the charge pump which will either charge or discharge the loop filter or enter into a high impedance state. This is where the name “tri-state comparator” comes from. The main benefit of this type of detector it’s ability to correct for errors in both phase and frequency. When locked, the detector uses phase error for correction. When unlocked, it will use the frequency error for correction. This type of detector will lock under all conditions. The prescaler and the phase detector bias voltage is brought out through pin 13 (VREF P). This allows bypassing of the of these two circuits to filter the reference crystal frequency. The charge pump consists of two transistors, one for charging the loop filter and the other for discharging the loop filter. It’s inputs are the outputs of the phase detector flip-flops. Since there are two flip-flops, there are four possible states. If both amplifier inputs are low, then the amplifier pair goes into a high impedance state, maintaining the charge on the loop filter. The state where both inputs are high will not occur. The other states are either charging or discharging the loop filter. The loop filter integrates the pulses coming from 11-27 11 TRANSCEIVERS Introduction The RF2513 is a low-cost FM/FSK UHF transmitter designed for applications operating within the 300MHz to 1000MHz frequency range. It is particularly intended for 315/433/868MHz band systems, remote keyless entry systems, and FCC Part 15.231 periodic transmitters. It can also be used as a single- or dual-channel local oscillator signal source. The integrated VCO, phase detector, prescaler, and reference oscillator require only the addition of an external crystal to provide a complete phase-locked loop. RF2513 the charge pump to create a control voltage for the voltage controlled oscillator. The voltage controlled oscillator (VCO) is a tuned differential amplifier with the bases and collectors cross-coupled to provide positive feedback and a 360° phase shift. The tuned circuit is located in the collectors. It is comprised of internal varactors and two external inductors. The designer selects the inductors for the desired frequency of operation. These inductors also provide DC bias for the VCO. The output of the VCO is buffered and applied to the prescaler circuit, where it is divided down and compared to the reference oscillator frequency. The PLL and VCO circuitry can be enabled by setting applying a “high” logic level to pin 4 (PLL ENABL). Conversely, the PLL and VCO circuitry will be turned off if the level is tied “low”. The transmit amplifier is a two stage amplifier consisting of a driver and an open collector final stage. It is capable of providing 8dBm of output power into a 50Ω load while operating from a 3.6V power supply. The output power is adjustable by the setting of pin 7 (LVL ADJ). This analog input allows the designer a 15dB range of output power. As the LVL ADJ voltage is reduced, the output power and current consumption are reduced. LVL ADJ must be low when the transmitter is disabled. TRANSCEIVERS 11 Additionally, the transmitter circuitry can be disabled entirely by applying a “low” logic level to pin 11 (TX ENABL). During transmission, this pin should be tied “high”. This pin controls all circuitry except for the PLL circuitry. During transmission the transmitter is enabled and the impedance of the output pin, pin 8 (TX OUT), is low. When the transmitter is not enabled, the impedance becomes high. The RF2513 contains onboard band gap reference voltage circuitry which provides a stable DC bias over varying temperature and supply voltages. Designing with the RF2513 The reference oscillator is built around the onboard transistor at pins 1, 2 and 3. The intended topology is of a Colpitts oscillator. The Colpitts oscillator is quite common and requires few external components, making it ideal for low cost solutions. The topology of this type of oscillator is as seen in the following figure. 11-28 VCC C2 X1 C1 This type of oscillator is a parallel resonant circuit for a fundamental mode crystal. The transistor amplifier is an emitter follower and the voltage gain is developed by the tapped capacitor impedance transformer. The series combination of C1 and C2 act in parallel with the input capacitance of the transistor to capacitively load the crystal. The nominal capacitor values can be calculated with the following equations. 60 ⋅ C load 1 C 1 = ------------------------ and C 2 = -------------------------1 freq MHz 1 ------------- – -----C load C 1 The load capacitance is usually 32pF. The variable freq is the oscillator frequency in MHz. The frequency can be adjusted by either changing C2 or by placing a variable capacitor in series with the crystal. As an example, assume a desired frequency of 14MHz and a load capacitance of 32pF. C1 =137.1pF and C2 =41.7pF. These capacitor values provide a starting point. The drive level of the oscillator should be checked by looking at the signal at pin 2 (OSC E). It has been found that the level at this pin should generally be around 500mVPP or less. This will reduce the reference spur levels and reduce noise from distortion. If this level is higher than 500mVPP then decrease the value of C1. The values of these capacitors are usually tweaked during design to meet performance goals, such as minimizing the start-up time. Additionally, by placing a variable capacitor in series with the crystal, one is able to adjust the frequency. This will also alter the drive level, so it should be checked again. An important part of the overall design is the voltage controlled oscillator (VCO). The VCO is configured as a differential amplifier. The VCO is tuned via the external inductors, capacitor and varactor. The varactor capacitance is set by the loop filter output voltage through a 4kΩ resistor. Rev B8 010509 RF2513 RESNTR+ RESNTR- L LOOP FLT L 4 kΩ nected to the charge pump output through an internal 4kΩ resistor. The loop filter is then connected in parallel to this point at pin 23 (LOOP FLT). This limits the loop filter topology to a second order filter usually consisting of a shunt capacitor and a shunt series RC. A passive filter is most common, as it is a low cost and low noise design. An additional pole could be used for reducing the reference spurs, however there is not a way to add the series resistor. This should not be a reason for concern however. The schematic of the loop filter is as follows. Charge Pump Loop Filter VCC R2 2 1 1 1 L = æ ---------------- ö ⋅ ---- ⋅ --è 2 ⋅ π ⋅ fø C 2 In this equation, f is the desired operating frequency and L is the value of the inductor required. The value C is the amount of capacitance presented by the varactor, capacitor and parasitics. The factor of one half is due to the inductors being in each leg. The setup of the VCO can be summarized as follows. First, open the loop. Next, get the VCO to run on the desired frequency by selecting the proper inductor and capacitor values. The capacitor value will need to include the varactor and circuit parasitics. After the VCO is running at the desired frequency, then set the VCO sensitivity. The sensitivity is determined by connecting the control voltage input point to ground and noting the frequency. Then connect the same point to the supply and again note the frequency. The difference between these two frequencies divided by the supply voltage is the VCO sensitivity expressed in Hz/V. Increasing the inductor value while decreasing the capacitor value will increase the sensitivity. Decreasing the inductor value while increasing the capacitor value will lower the sensitivity. VCO C1 C2 The transfer function is s ⋅ τ2 + 1 F ( s ) = R 2 ⋅ -----------------------------------------s ⋅ τ2 ⋅ ( s ⋅ τ1 + 1 ) where the time constants are defined as C1 ⋅ C2 τ 2 = R 2 ⋅ C 2 and τ 1 = R 2 ⋅ ------------------C1 + C2 11 The frequency at which unity gain occurs is given by 1 ω LBW = ------------------τ1 ⋅ τ2 This is also the loop bandwidth. If the phase margin (PM) and the loop bandwidth (ωLBW) are known, it is possible to calculate the time constants. These are found using the following equations. When increasing or decreasing component values, make sure that the center frequency remains constant. Finally, close the loop. sec ( PM ) – tan ( PM ) 1 τ 1 = -------------------------------------------------- and τ 2 = ------------------------ωLBW ω 2 LBW ⋅ τ 1 External to the part, the designer needs to implement a loop filter to complete the PLL. The loop filter converts the output of the charge pump into a voltage that is used to control the VCO. Internally, the VCO is con- With these known, it is then possible to determine the values of the filter components. Rev B8 010509 11-29 TRANSCEIVERS To tune the VCO the designer only needs to calculate the value of the inductors connected to pins 18 and 20 (RESNTR- and RESNTR+). The inductor value is determined by the following equation. RF2513 2 τ 1 K PD ⋅ K VCO 1 + ( ω LBW ⋅ τ 2 ) - ⋅ ---------------------------------------C 1 = ----- ⋅ ---------------------------2 τ2 ω2 1 + ( ω LBW ⋅ τ 1 ) LBW ⋅ N τ2 C 2 = C 1 ⋅ æ ----- – 1ö è τ1 ø τ2 R 2 = -----C2 As an example, consider a loop bandwidth of 50kHz, a phase margin of 45°, a divide ratio of 64, a KVCO of 20MHz/V, and a KPD of 0.01592mA/2πrad. Time constant τ1 is 1.31848µs, time constant τ2 is 7.68468µs, C1 is 131.15pF, C2 is 633.26pF, and R2 is 12.14kΩ. In order to perform these calculations, one will need to know the value of two constants, KVCO and KPD. KPD is calculated by dividing the charge pump current by 2π. For the RF2513, the charge pump current is 40µA. KVCO is best found empirically as it will change with frequency and board parasitics. By briefly connecting pin 23 (LOOP FLT) to VCC and then to ground, the frequency tuning range of the VCO can be seen. Dividing the difference between these two frequencies by the difference in the voltage gives KVCO in MHz/V. TRANSCEIVERS 11 The control lines provide an interface for connecting the device to a microcontroller or other signal generating mechanism. The designer can treat pin 16 (MOD IN), pin 15 (DIV CTRL), pin 14 (MOD CTRL), pin 24 (OSC SEL), and pin 7 (LVL ADJ) as control pins whose voltage level can be set. mended that pre-compliance testing be performed so that there are no surprises during final compliance testing. This will help keep the product development and release on schedule. Working with a laboratory offers the benefit of years of compliance testing experience and familiarity with the regulatory issues. Also, the laboratory can often provide feedback that will help the designer make the product compliant. On the other hand, having a GTEM cell or an open air test site locally offers the designer the ability to rapidly determine whether or not design changes impact the product's compliance. Set-up of an open air test site and the associated calibration is not trivial. An alternative is to use a GTEM test cell. After the design has been completed and passes compliance testing, application will need to be made with the respective regulatory bodies for the geographic region in which the product will be operated to obtain final certifications. Conclusions The RF2513 is an FM/FSK UHF transmitter that features a phase-locked output. This device is suitable for use in a CFR Part 15.231 compliant product as well as a local oscillator signal source. Two examples of showing these applications have been provided. Further, the RF2513 is packaged in a low cost SSOP-24 plastic package and requires few external parts, thus making it suitable for low cost designs. General RF bypassing techniques must be observed to get the best performance. Choose capacitors such that they are series resonant near the frequency of operation. Board layout is always an area in which great care must be taken. The board material and thickness are used in calculating the RF line widths. The use of vias for connection to the ground plane allows one to connect to ground as close as possible to ground pins. When laying out the traces around the VCO, it is desirable to keep the parasitics equal between the two legs. This will allow equal valued inductors to be used. Pre-compliance testing should be performed during the design process. This can be done with a GTEM cell or at a compliance testing laboratory. It is recom11-30 Rev B8 010509 RF2513 Pin Out OSC B2 1 24 OSC SEL OSC E 2 23 LOOP FLT OUT OSC B1 3 22 VCO TUNE PLL ENABL 4 21 GND3 GND1 5 20 RESNTR+ VCC3 6 19 NC LVL ADJ 7 18 RESNTR- TX OUT 8 17 VCC2 GND2 9 16 MOD IN VCC1 10 15 DIV CTRL TX ENABL 11 14 MOD CTRL PRESCL OUT 12 13 VREF P TRANSCEIVERS 11 Rev B8 010509 11-31 RF2513 Evaluation Board Schematic H (915MHz) and M (868MHz) Boards (Download Bill of Materials from www.rfmd.com.) P2 P1 AUDIO P1-1 R5* 0Ω D2* R3* 0Ω D1* C20 3-10 pF R4* 0Ω X2* P1-3 1 LVL ADJ 2 GND 3 PLL ON P2-1 P2-3 P3 1 PRESC OUT 2 GND 3 TX EN P3-1 P3-3 P3-5 X1 P4 1 AUDIO 2 GND 3 OSCSLT 4 GND 5 VCC P4-1 P4-3 1 DIV 64 2 GND 3 MOD CTL C3 100 pF C1 100 pF Ref Select 2 VCC C4 10 nF 21 4 C5 22 pF LVL ADJ Phase Detector/ Charge Pump 7 L1 8.2 nH 50 Ω µstrip C6 4 pF C7 4 pF VCC C8 100 pF Gain Control TX EN C10 22 pF R1 L2 L3 6.8 nH 18 L4 56 nH C12 10 nF C13 22 pF C14 4.7 µF 8 17 9 16 J2 MOD IN 15 DIV 64 11 14 MOD CTL 12 13 50 Ω µstrip 10 C9 10 nF C16 20 19 6 C18 100 nF C17 22 5 J1 RF OUT 23 3 PLL ON OSC SEL 24 1 C2* 100 pF Prescaler 2513401A, 402A C11 0.1 µF PRESC OUT R2* * Denotes optional. These parts are not normally populated. X1 (MHz) X2 (MHz) R1 (kΩ) L2 (nH) C16 (nF) C17 (nF) M (868MHz) 13.57734 13.41015 2.2 8.2 47 nF 4.7 H (915MHz) 7.15909 7.07549 5.1 6.8 22 nF 2.2 TRANSCEIVERS 11 Board 11-32 Rev B8 010509 RF2513 Evaluation Board Schematic L (433MHz) Board P1 P1-1 P1-3 AUDIO R5* 0Ω D2* R3* 0Ω D1* P2 1 LVL ADJ 2 GND 3 PLL ON P2-1 P2-3 PRESC OUT 2 GND 3 TX EN P3-1 P3-3 P3-5 C21 3-10 pF R4* 0Ω P4 P3 1 1 AUDIO 2 GND 3 OSCSLT 4 GND 5 VCC P4-1 P4-3 1 DIV 64 2 GND 3 MOD CTL X1 6.78 MHz X2* C3 100 pF 1 C2* 100 pF C1 100 pF 2 3 PLL ON VCC C4 10 nF 5 LVL ADJ J1 RF OUT 50 Ω µstrip C19 8 pF L1 22 nH C6 15 pF 7 L2 22 nH C7 8 pF VCC C8 100 pF TX EN PRESC OUT R2* C10 100 pF L3 39 nH Gain Control C16 22 nF R1 4.7 kΩ 20 L4 39 nH 19 18 L5 220 nH C12 10 nF C13 100 pF C14 4.7 µF 8 17 9 16 J2 MOD IN 15 DIV 64 11 14 MOD CTL 12 13 50 Ω µstrip 10 C9 10 nF C17 2.2 nF 21 Phase Detector/ Charge Pump 6 C18 100 nF 23 22 4 C5 100 pF OSC SEL 24 Ref Select Prescaler C11 0.1 µF 2513400A TRANSCEIVERS 11 Rev B8 010509 11-33 RF2513 Evaluation Board Layout 433MHz Board Size 2.0” x 2.0” Board Thickness 0.031”, Board Material FR-4 Evaluation Board Layout 868MHz Board Size 2.0” x 2.0” TRANSCEIVERS 11 Evaluation Board Layout 915MHz Board Size 2.0” x 2.0” 11-34 Rev B8 010509 RF2513 TX Power versus VCC Level Adjust = VCC 7.0 -40°C -15°C +10°C +35°C +60°C +85°C 5.0 -40°C -15°C +10°C +35°C +60°C +85°C 35.0 30.0 ICC (mA) 3.0 TX Power (dBm) ICC versus VCC Level Adjust = VCC 40.0 1.0 25.0 -1.0 20.0 -3.0 15.0 -5.0 10.0 2.5 3.0 3.5 4.0 VCC (V) 4.5 5.0 2.5 3.0 3.5 4.0 4.5 5.0 VCC (V) TRANSCEIVERS 11 Rev B8 010509 11-35 RF2513 TRANSCEIVERS 11 11-36 Rev B8 010509