IN44780U DOT MATRIX LIQUID CRYSTAL DISPLAY CONTROLLER & DRIVER FEATURES FUNCTION • Internal Memory • Character type dot matrix LCD driver & controller - Character Generator ROM: 8320 bits - Character Generator RAM: 512 bit • Internal driver: 16 common and 40 segment signal output - Display Data RAM: 80 x 8 bits for 80 digits • Display character format: 5 x 7 dots + cursor, 5 x 10 dots + cursor • Internal automatic reset circuit at power ON • Internal oscillation circuit • Easy interface with a 4-bit or 8-bit MPU • Power Supply Voltage: +5V ± 10% • Display character pattern: • LCD Driving Voltage for display: 0 ~ -5V(V5) 5 x 7 dots format: 192 kinds, 5 x 10 dots format: 32 kinds • Duty factor selection (sselected by programs) • The special character pattern can be programmable by 1/8 duty: 5 x 7 dots format 1 line, Character Generator RAM directly 1/11 duty: 5 x 10 dots format 1 line • A customer character pattern can be programmable by mask 1/16 duty: 5 x 7 dots format 2 line • Bare chip available option • Pin-to-Pin replacement for KS0066, HD44780, SED1278 • Wide range of instruction function: Display clear, Cursor home, Display ON/OFF, Display shift Cursor ON/OFF, Display character blink, Cursor shift DESCRIPTION The IZ44780 is a dot matrix liquid crystal display controller & driver LSI that displays alphanumerics, characters and symbols. It drives dot matrix LCD under microcomputer control. All functions needed for dot matrix LCD drive are internally provided on one chip. ODERING INFORMATION Type CGROM IZ44780 – 00 English Numberal Russian IZ44780 – 01 English Numberal Japanese IZ44780 – XX Custom font (XX – ROM code) ABSOLUTE MAXIMUM RATINGS Characteristic Power Supply Voltage Driver Supply Voltage Input Voltage Operating Temperature Storage Temperature Symbol Value Unit VDD V1 ~ V5 VI Ta Tstg - 0.3 ~ 7.0 VDD - 13.5 ~ VDD + 0.3 -0.3 ~VDD + 0.3 - 20 ~ + 75 - 55 ~ + 125 V V V o C o C Notes: Must keep the relation of VDD ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5 1 IN44780U BLOCK DIAGRAM Power supply for LCD Drive V1 Par allel/ Ser ial Data conversion Circuit V2 V3 V4 V5 5 5 Busy Flag Char acter Gener at or ROM 8320 bit s Cursor Blink Cont rol Circuit Char act er Gener ator RAM 512 bits DB0~DB3 4 DB4~DB7 4 8 I/ O Buf fer SEG1 8 Segment to 40 - bit 40 - bit SEG40 Shif t 40 L at ch 40 Sign al 40 Dr iver Regist er Cir cuit 7 R/ W RS E 8 8 Data Register 7 8 I nstruct ion Register 8 I nstruct ion Decoder 7 7 Display Data RAM 80 x 8 bit s D 7 Address Counter 16 - bit Shif t 16 Register 7 OSC1 OSC2 COM1 to Common COM16 Sign al 16 Driver CLK 1 Timing Gener at ion Circuit CLK 2 M V DD V SS 2 IN44780U ELECTRICAL CHARACTERISTICS (Ta = 25oC, VDD = +5V, VSS = 0V unless otherwise specified) Characteristic Symbol Operating Voltage Operating Current (*1) VDD IDD HIGH Input Voltage VIH LOW Input Voltage VIL HIGH Output Voltage VOH IOH = -0.205 mA IOH = -40µA LOW Output Voltage VOL IOL = 1.2mA IOL = 40µA VCOM IO = ± 0.1mA E, DB0 ~ DB7, 2.2 R/W, RS OSC1 VDD-1.0 E, DB0 ~ DB7, -0.3 R/W, RS OSC1 -0.2 DB0 ~ DB7 2.4 CLK1, CLK2, M, 0.9VDD D DB0 ~ DB7 CLK1, CLK2, M, D COM1 ~ COM16 VSEG ILKG VIN =0V ~ VDD SEG1 ~ SEG40 E VCC = 5V (test pull up R) RS, R/W, DB0 ~ DB7 Driver Voltage Descending Input Leakage Current Input LOW Current Frequency (*1) External Duty Clock Rise time Fall time Internal Clock Frequency(*1) Ceramic Resonator Oscillation Frequency (*1) LCD Driving Voltage (*2) Notes: *1). IIL Test Condition Applicable Terminals Typ Max Unit 5.5 0.6 V 0.35 VDD V VDD 0.6 V 4.5 Internal oscillation or external clock fOSC = 270KHz Rf = 91KΩ ± 2% VDD – V5 1/5 bias VLCD2 1/4 bias Oscillation circuit 3 V -1 0.4 0.1VDD V 1.0 V 1.0 1 µA -125 -250 µA 125 250 350 KHz OSC1 46 50 OSC1, OSC2 190 270 55 0.2 0.2 350 % µs µs KHz 245 250 255 fOSC2 VLCD1 1.0 -50 fEC DUTY tR tF fOSC1 Min V1 ~ V5 4.6 10.0 3.0 10.0 V IN44780U Resistor circuit OSC1 External clock circuit OSC1 OSC2 OSC2 Rf Rf: 91kΩ+2% Frequency input open *2). Input the voltage listed in table below to V1 ~ V5 Duty 1/8, 1/11 1/16 Bias 1/4 1/5 VDD – VLCD/4 VDD – VLCD/2 VDD – VLCD/2 VDD – 3VLCD/4 VDD – VLCD VDD – VLCD/5 VDD – 2VLCD/5 VDD – 3VLCD/5 VDD – 4VLCD/5 VDD – VLCD Power supply V1 V2 V3 V4 V5 *VLCD is the LCD driving voltage, refer to the initial set of the instruction code. AC CHARACTERISTICS (VDD = 5V, VSS = 0V, Ta = 25oC) (1) Write mode (Writing data from MPU to IZ44780) Characteristic Symbol Test pin Min E Cycle Time tC E 500 E Rise Time tR E 25 ns E Fall Time tF E 25 ns E Pulse Width (High, Low) tW E 220 ns R/W and RS Set-up Time tSU1 R/W, RS 40 ns R/W and RS Hold Time tH1 R/W, RS 10 ns Data Set-up Time tSU2 DB0 ~ DB7 60 ns Data Hold Time tH2 DB0 ~ DB7 10 ns 4 Typ Max Unit ns IN44780U RS VIH1 V IH1 VIL1 VIL1 t SU1 R/ W t H1 VIL1 VIL1 t H1 tW VIL1 E tR t SU2 t H2 VIH1 DB0 ~ DB7 VIH1 Valid Data VIL1 VIL1 tC (2) Read mode (Reading data from IZ44780 to MPU) Characteristic Symbol Test pin Min E Cycle Time tC E 500 E Rise Time tR E 25 ns E Fall Time tF E 25 ns E Pulse Width (High, Low) tW E 220 ns R/W and RS Set-up Time tSU1 R/W, RS 40 ns R/W and RS Hold Time tH1 R/W, RS 10 ns Data Output Delay Time tD DB0 ~ DB7 Data Hold Time tH2 DB0 ~ DB7 5 Typ Max ns 120 20 Unit ns ns IN44780U RS V IH1 VIH1 V IL1 t SU V IL1 tH R/ W VIL1 tW tH tF VIH1 E VIL1 V IL1 VIL1 tR tD t DH V IH1 DB0 ~ DB7 V IH1 Valid Data V IL1 V IL1 tC (3) Interface mode with HD44100, KS0065 Characteristic Symbol Test pin Min Clock Pulse Width High tWCKH CLK 800 ns Clock Pulse Width Low tWCKL CLK 800 ns Data Set-up Time tSU D 300 ns Data Hold Time tDH D 300 ns Clock Set-up Time tCSU CLK 500 ns M Delay Time tDM M -1000 0.9VDD 0.9V DD CLK1 t WCKH t WCKH t CSU CLK2 0.9VDD 0.9V DD 0.1V DD 0.1V DD t WCK1 t CSU D M 0.1V DD 0.9VDD 0.1VDD t SU 0.9V DD t DM 6 0.9V DD 0.1V DD t DM Typ Max 1000 Unit ns IN44780U TERMINAL DESCRIPTION Pin VDD VSS V1 – V5 INPUT/OUTPUT Name Operating Voltage Power DESCRIPTION For logical circuit (+5V ± 10%) 0V(GND) Bias voltage level for LCD driving INTERFACE Power Supply Segment signal output for LCD driving LCD SEG1– SEG40 COM1– COM16 OSC1 Output Negative Supply Voltage Segment output Output Common output Common signal output for LCD driving LCD Input Oscillator OSC2 Output Both pin connected to Rf resistor or ceramic resonator for internal oscillator circuit. In case of external frequency use only, the frequency is input to OSC1 terminal. Clock output terminal for the serially transferred data to be latched to the driver. Clock output terminal used when D terminal data output shifts the inside of the driver. The alternating signal to convert LCD drive waveform to AC. Resistor or Ceramic Resonator CLK1 CLK2 Data latch clock Output M Alternated signal for LCD driver output Display data interface D E Data shift clock Input Enable Character pattern data, which is corresponding to each common signal, is supplied to driver serially. High Selection Low Non selection Start anable signal to read or write the data R/W signal input is used to select the read/write mode High Read mode Low Write mode R/W Read/Write RS Register select Register selection input High Data register (for read and write) Low Instruction register (for write), Busy flag, address counter (for read) Data interface Used for data transfer between the MPU and IZ44780. These terminals are for data bus with bidirectional three-state. Initial 4 bit (DB0-DB3) are not used during 4 bit operation (DB7 can be used as a busy flag) DB0 – DB7 Input/Output HD44100, KS0065, IZ0065 7 MPU IN44780U CONTROL and DISPLAY COMMANDS Command Remark RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Execution time (fOSC=250KHz) DISPLAY CLEAR L RETURN HOME L ENTRY MODE SET L L L L L L L L L L L L L L L L L L L L L H L H I/D H X SH 1.64 ms 1.64 ms 40µs Cursor move to first digit *I/D: set cursor move direction I/D H L Increase Decrease *SH: Specifies shift of display SH H L DISPLAY ON/OFF L L L L L L H D C B 40µs Display is shifted Display is not shifted *Display D H L Display on Display off H L Cursor on Cursor off B H L Blinking on Blinking off SC H L Display shift Cursor move R/L H L Right shift Left shift DL H *Cursor C *Blinking SHIFT SET FUNCTION L L L L L L L L L H H DL S/C R/L X N F X X X 40µs 40µs L SET CG RAM ADDRESS L L L SET DD RAM ADDRESS READ BUSY FLAG & ADDRESS L L H WRITE DATA READ DATA H H H CG RAM address (corresponds to cursor address) DD RAM address L H BF Address Counter used for Both DD & CG RAM address L H Write Data Read Data Note: X – Don’t care. 8 8 bits interface 4 bits interface N H L 2 line display 1 line display F H L 5x10 dots 5x7 dots 40µs CG RAM Data is sent and received after this setting 40µs DD RAM Data is sent and received after this setting 0µs 46µs 46µs BF H L Busy Ready -Reads BF indication internal operating is being performed. -Reads address counter contents Write data DD or CG RAM Read data from DD or CG RAM IN44780U APPLICATION CIRCUIT SEG1~SEG40 D OSC1 OSC2 V SS M SC1 ~ SC40 SC1 ~ SC40 LCD Panel SC1 ~ SC40 DL2 D R1 DL1 D R2 IZ0065 FCS BT1510 C L 1 SH L 1 CL 2 SH L 2 M VS S VD D V6 V 5 V 4 V 3 V2 V 1 V E E V1 DL2 D R1 DL1 IZ0065 D R 2 F CS BT1510 C L 1 SH L 1 CL 2 SH L 2 M VSS VD D V 6 V 5 V 4 V 3 V2 V 1 V E E V2 DL2 D R1 DL1 D R2 IZ0065 FCS CL 1 BT1510 SH L 1 CL 2 SH L 2 M VSS VD D V 6 V 5 V 4 V 3 V 2 V 1 VE E V1 V DD V2 V3 CLK 1 CLK2 V DD V3 V4 V5 V4 V5 V L CD (1/ 5 b i as) GND or ot her voltage 9 COM1~COM16 BT1578 IZ44780 DB0 ~ DB7 To MPU When KS0065, HD44100 is externally connected to the IZ44780, you can increase the number of display digits up to 80 characters. IN44780U PAD LAYOUT 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 65 40 66 39 67 68 38 69 37 70 36 71 35 72 (0,0) 73 34 33 IZ44780 BT1578 PAD DIAGRAM 74 75 32 Chip size : 4000 x 4900 Pad size : 120 x 120 Unit : µm 76 77 78 31 30 29 28 79 27 80 26 25 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 PAD LOCATION (Unit: µm) Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 Pad Name SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 GND OSC1 OSC2 V1 V2 X -2221 -2041 -1804 -1624 -1444 -1264 -1084 -904 -724 -544 -364 -184 -4 176 35 536 716 896 1076 1256 1436 1616 1920 2100 2299 2299 2299 Y Pad No. -1830 28 -1830 29 -1830 30 -1830 31 -1830 32 -1830 33 -1830 34 -1830 35 -1830 36 -1830 37 -1830 38 -1830 39 -1830 40 -1830 41 -1830 42 -1830 43 -1830 44 -1830 45 -1830 46 -1830 47 -1830 48 -1830 49 -1830 50 -1830 51 -1552 52 -1372 53 -1192 54 Pad Name V3 V4 V5 CL1 CL2 VCC M D RS R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 10 X 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2299 2188 2008 1812 1632 1436 1256 961 781 601 421 241 61 -119 -299 Y Pad No. -1012 55 -832 56 -862 57 -472 58 -292 59 -112 60 68 61 248 62 428 63 608 64 788 65 1090 66 1270 67 1830 68 1830 69 1830 70 1830 71 1830 72 1830 73 1830 74 1830 75 1830 76 1830 77 1830 78 1830 79 1830 80 1830 Pad Name COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 X -530 -710 -941 -1121 -1301 -1481 -1661 -1841 -2036 -2216 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 -2298 Y 1830 1830 1830 1830 1830 1830 1830 1830 1830 1830 1404 1224 1044 864 684 504 324 144 -36 -216 -396 -576 -756 -936 -1116 -1296