AK8180A 2.5V, 3.3V LVCMOS 1:10 Clock Fanout Buffer AK8180A Description Features The AK8180A is a member of AKM’ｓ LVCMOS clock fanout buffer family designed for telecom, networking and computer applications, requiring a range of clocks with high performance and low skew. The AK8180A distributes 10 buffered clocks configured by pin-setting per bank. Each bank has the selected output divided by one or two through DSELx pin. Each of 3-bank outputs operate at 2.5V or 3.3V respectively. The 10 outputs can drive terminated 50 W transmission lines. The AK8180A is available in a 7mm x 7mm 32-pin LQFP package. Configurable 3-bank 10 LVCMOS outputs Selectable two LVCMOS inputs Single, dual and mixed voltage supply available on 2.5V and 3.3V Clock output frequency up to 250MHz Output-to-output skew : 200ps max Tri-state outputs Enable to drive up to 20 series terminated clock lines Operating Temperature Range: -40 to +85℃ Package: 32-pin LQFP (Pb free) Pin compatible with MPC9446 Block Diagram MS1281-E-00 Mar-2011 -1- AK8180A GND QB0 VDDB QB1 GND QB2 VDDB VDDC Pin Descriptions 24 23 22 21 20 19 18 17 VDDA 25 16 QC3 QA2 26 15 GND GND 27 14 QC2 QA1 28 13 VDDC VDDA 29 12 QC1 QA0 30 11 GND GND 31 10 QC0 MR/OE 32 9 VDDC 4 5 6 CCLK1 DSELA DSELB 7 8 GND 3 DSELC 2 CCLK0 CCLK_SEL 1 VDD AK8180A Package: 32-Pin LQFP(Top View) Pin No. Pin Name Pin Type Pullup /down Description 1 CCLK_SEL IN PD CCLK Select Input. 2 VDD -- -- 3 CCLK0 IN PU Clock Inputs 4 CCLK1 IN PU Clock Inputs 5 DSELA IN PD Divide Select Input for Output Bank A Power Supply for Core 6 DSELB IN PD Divide Select Input for Output Bank B 7 DSELC IN PD Divide Select Input for Output Bank C 8, GND -- -- Ground 9 VDDC -- -- Power Supply for Output bank C 10 QC0 OUT --- Clock output Bank C 11 GND -- -- Ground 12 QC1 OUT --- Clock output Bank C (continued on next page) Mar-2011 MS1281-E-00 -2- AK8180A Pin No. Pin Name Pin Type Pullup /down Description 13 VDDC -- -- Power Supply for Output bank C 14 QC2 OUT --- Clock output Bank C 15 GND -- -- Ground 16 QC3 OUT --- Clock output Bank C 17 VDDC -- -- Power Supply for Output bank C 18 VDDB -- -- Power Supply for Output bank B 19 QB2 OUT --- Clock output Bank B 20 GND -- -- Ground 21 QB1 OUT --- Clock output Bank B 22 VDDB -- -- Power Supply for Output bank B 23 QB0 OUT --- Clock output Bank B 24 GND -- -- Ground 25 VDDA -- -- Power Supply for Output bank A 26 QA2 OUT --- Clock output Bank A 27 GND -- -- Ground 28 QA1 OUT --- Clock output Bank A 29 VDDA -- -- Power Supply for Output bank A 30 QA0 OUT --- Clock output Bank A 31 GND -- -- Ground 32 MR/ OE IN PD Master Reset and Output Enable (Output disable = High impedance) PU: Pull up PD: Pull down Ordering Information Part Number Marking Shipping Packaging Package Temperature Range AK8180A AK8180A Tape and Reel 32-pin LQFP -40 to 85 ℃ MS1281-E-00 Mar-2011 -3- AK8180A Absolute Maximum Rating Over operating free-air temperature range unless otherwise noted (1) Items Supply voltage Input voltage Symbol Ratings Unit VDD -0.3 to 4.6 V Vin GND-0.3 to VDD+0.3 V IIN ±10 mA Tstg -55 to 130 °C Input current (any pins except supplies) Storage temperature (1) Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to absolute-maximum-rating conditions for extended periods may affect device reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. ESD Sensitive Device This device is manufactured on a CMOS process, therefore, generically susceptible to damage by excessive static voltage. Failure to observe proper handling and installation procedures can cause damage. AKM recommends that this device is handled with appropriate precautions. Recommended Operation Conditions Parameter Operating temperature Supply voltage (1) Symbol Conditions Min Ta VDD, VDDA VDDB, VDDC Typ -40 ±5% Max Unit 85 °C 2.375 2.5 2.625 3.135 3.3 3.465 V (1) Supply voltages require to be supplied from each single source of 2.5V or 3.3V. A decoupling capacitor of 0.1mF for power supply line should be located close to each VDD pin. Supported VDD Supply Voltage Configurations Supply Voltage Configuration VDD VDDA 3.3 V 3.3 V 3.3 V 3.3 V and 2.5 V 3.3 V 3.3 V or 2.5 V 2.5 V 2.5 V 2.5 V VDDB VDDC GND 3.3 V 3.3 V 0V 3.3 V or 2.5 V 3.3 V or 2.5 V 2.5 V 0V 2.5 V 0V General Specification Parameter Symbol Conditions Min Typ Unit Output Termination Voltage VTT ESD Protection 1 MM Machine model 200 V ESD Protection 2 HBM Human Body Model 2000 V 200 mA Latch-Up Immunity LU Input Capacitance CIN VDD/2 Max 4.0 Mar-2011 V pF MS1281-E-00 -4- AK8180A Power Supply Current <3.3V> Parameter Full operation Symbol (1) Quiescent state (1) (1) The outputs have no loads. VDD=VDDA=VDDB=VDDC= 3.3V±5%, Ta: -40 to +85℃ Conditions Min Typ Max Unit IDD1 CCLK0=250MHz CCLK1=H 84 105 mA IDD2 CCLK0=H CCLK1=H 0.8 1.7 mA CCLK_SEL=L, DSELA=DSELB=DSELC=L, MR/OE =L DC Characteristics <3.3V> All specifications at VDD=VDDA=VDDB=VDDC= 3.3V±5%, Ta: -40 to +85℃, unless otherwise noted Parameter Symbol Conditions MIN TYP MAX Unit High Level Input Voltage VIH LVCMOS 2.0 VDD+0.3 V Low Level Input Voltage VIL LVCMOS -0.3 0.8 V I L1 Vin=GND or VDD -200 +200 μA Input Current (1) High Level Output Voltage VOH Low level Output Voltage VOL Output Impedance ZOUT (1) (2) IOH= -24mA (2) IOL= +24mA (2) 2.4 V 0.55 0.30 IOL= +12mA V W 14-17 Input pull-up / pull down resistors influence input current. The AK8180A is capable of driving 50 W transmission lines of the incident edge. Each output drives one 50 W parallel terminated transmission line to a termination voltage of VTT. Alternatively, the device drives up to two 50 W series terminated transmission lines. AC Characteristics <3.3V> (1) All specifications at VDD=VDDA=VDDB=VDDC= 3.3V±5%, Ta: -40 to +85℃, unless otherwise noted Parameter Symbol Input Frequency (2) Conditions fIN CCLK0,1 tpwIN CCLK0,1 trIN,tfOUT CCLK0,1 Output Frequency (2) fOUT DSELA,B,C= 0 x1 output DSELA,B,C= 1 x1/2 output Propagation Delay tPLH tPHL CCLK0,1 to any Q CCLK0,1 to any Q Output Disable Time Input Pulse Width Input Rise/Fall time (3) MIN TYP MAX Unit 250 MHz 1.4 ns 1.0 ns 250 125 MHz 3.4 3.4 ns tPLZ,tPHZ 10 ns Output Enable Time tPZL,tPZH 10 ns Output-to-Output Skew tsk(O) 150 200 350 ps Device-to-Device Skew tskPP 2.25 ns 200 ps 55 53 % 1.0 ns Output Pulse Skew Output Duty Cycle (4) (5) Output Rise/Fall Time 0.8 to 2.0V 1.15 1.15 2.0 2.0 Within one bank Any output, same output divider Any output, Any output divider tsk(P) DCOUT DCREF= 50% x1 output DCREF= 25-75% x1/2 output 45 47 tr, tf 0.55 to 2.4V 0.1 50 50 AC characteristics apply for parallel output termination of 50 W to VTT. The AK8180A is functional up to an input and output clock frequency of 350MHz and is characterized up to 250MHz. Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, input pulse width, output duty cycle and maximum frequency specifications. (4) Output pulse skew tskO is the absolute difference of the propagation delay times:| tPLH - tPHL |. (5) Output duty cycle is frequency dependent (= 0.5 ± tskO x fout). For example at fout = 125 MHz the output duty cycle limit is 50% ± 2.5%. (1) (2) (3) MS1281-E-00 Mar-2011 -5- AK8180A Power Supply Current <2.5V> Parameter Full operation Symbol (1) Quiescent state VDD=VDDA=VDDB=VDDC= 2.5V±5%, Ta: -40 to +85℃ (1) Conditions Min Typ Max Unit IDD1 CCLK0=250MHz CCLK1=H 62 75 mA IDD2 CCLK0=H CCLK1=H 0.5 1.0 mA (1) The outputs have no loads. CCLK_SEL=L, DSELA=DSELB=DSELC=L, MR/OE =L DC Characteristics <2.5V> All specifications at VDD=VDDA=VDDB=VDDC= 2.5V±5%, Ta: -40 to +85℃, unless otherwise noted Parameter Symbol High Level Input Voltage VIH Low Level Input Voltage Input Current (1) High Level Output Voltage LVCMOS MIN TYP 1.7 MAX Unit VDD+0.3 V VIL LVCMOS -0.3 0.7 V I L1 Vin=GND or VDD -200 +200 μA VOH IOH= -15mA (2) IOL= +15mA (2) Low level Output Voltage VOL Output Impedance ZOUT (1) (2) Conditions 1.8 V 0.6 V W 17-20 Input pull-up / pull down resistors influence input current. The AK8180A is capable of driving 50 W transmission lines of the incident edge. Each output drives one 50 W parallel terminated transmission line to a termination voltage of VTT. Alternatively, the device drives up to two 50 W series terminated transmission lines. AC Characteristics <2.5V> (1) All specifications at VDD=VDDA=VDDB=VDDC= 2.5V±5%, Ta: -40 to +85℃, unless otherwise noted Parameter Input Frequency Symbol (2) Input Pulse Width Input Rise/Fall time (3) Output Frequency (2) Propagation Delay Conditions fIN CCLK0,1 tpwIN CCLK0,1 trIN,tfOUT CCLK0,1 fOUT MIN TYP MAX Unit 250 MHz 1.4 ns 0.7 to 1.7V 1.0 DSELA,B,C= 0 x1 output 250 DSELA,B,C= 1 x1/2 output 125 tPLH CCLK0,1 to any Q 1.3 2.4 4.3 tPHL CCLK0,1 to any Q 1.3 2.4 4.3 ns MHz ns Output Disable Time tPLZ,tPHZ 10 ns Output Enable Time tPZL,tPZH 10 ns Output-to-Output Skew tsk(O) Within one bank 150 Any output, same output divider 200 Any output, Any output divider 350 ps Device-to-Device Skew tskPP 3.0 ns Output Pulse Skew (4) tsk(P) 200 ps Output Duty Cycle DCOUT DCREF= 50% 55 % Output Rise/Fall Time tr, tf 0.6 to 1.8V 1.0 ns (1) (2) (3) (4) x1 or 1/2 output 45 0.1 50 AC characteristics apply for parallel output termination of 50 W to VTT. The AK8180A is functional up to an input and output clock frequency of 350MHz and is characterized up to 250MHz. Violation of the 1.0 ns maximum input rise and fall time limit will affect the device propagation delay, device-to-device skew, input pulse width, output duty cycle and maximum frequency specifications. Output pulse skew tskO is the absolute difference of the propagation delay times:| tPLH - tPHL |. Mar-2011 MS1281-E-00 -6- AK8180A AC Characteristics <mixed with 3.3V and 2.5V> (1)(2) All specifications at VDD=3.3V±5%, VDDA, VDDB, VDDC=2.5V±5%, Ta: -40 to +85℃, unless otherwise noted Parameter Symbol Propagation Delay Output-to-Output Skew Conditions MIN TYP MAX tPLH CCLK0,1 to any Q 1.2 2 3.7 tPHL CCLK0,1 to any Q 1.2 2 3.7 tsk(O) Within one bank 150 Any output, same output divider 250 Any output, Any output divider 350 Unit ns ps Device-to-Device Skew tskPP 2.5 ns Output Pulse Skew (3) tsk(P) 250 ps Output Duty Cycle DCOUT 55 % (1) (2) (3) DCREF= 50% x1 or 1/2 output 45 50 AC characteristics apply for parallel output termination of 50 W to VTT. For all other AC specifications, refer to 2.5V and 3.3V tables according to the supply voltage of the output bank. Output pulse skew tskO is the absolute difference of the propagation delay times:| tPLH - tPHL |. Figure 1 CCLK0,1 AC Test Reference Figure 2 Output Translation Time Test Reference Figure 3 Propagation Delay Test Reference MS1281-E-00 Mar-2011 -7- AK8180A Figure 4 Figure 5 Output-to-Output Skew Output Pulse Skew Test Reference Figure 6 Output Duty Cycle (DC) Mar-2011 MS1281-E-00 -8- AK8180A Function Table The following table shows the inputs/outputs clock state configured through the control pins. Table 1: Control-Pin-Setting Function Table Control Pin Default 0 1 CCLK_SEL 0 CCLK0 CCLK1 DSELA 0 QA0-2 = REFCLK x 1 QA0-2 = REFCLK x 1/2 DSELB 0 QB0-2 = REFCLK x 1 QB0-2 = REFCLK x 1/2 DSELC 0 QC0-3 = REFCLK x 1 QC0-3 = REFCLK x 1/2 MR/ OE 0 Output enabled Internal reset. Outputs disabled. (High impedance) REFCLK is the selected input clock through the CCLK_SEL pin. MS1281-E-00 Mar-2011 -9- AK8180A Package Information · Mechanical data : 32-lead LQFP 9.00±0.20 7.00 17 25 16 32 9 7.00 0.80 8 0.37±0.05 0.20 M 0゜～7゜ 1.60MAX 1 1.35～1.45 9.00±0.20 24 0.60±0.10 0.10 S Mar-2011 0.05～0.15 0.09～0.20 S MS1281-E-00 - 10 - AK8180A · Marking a: b: c: #1 Pin Index Part number Date code (7 digits) b c a AKM and the logo - - are the brand of AKM’ｓ IC’s and identify that AKM continues to offer the best choice for high performance mixed-signal solution under this brand. · RoHS Compliance All integrated circuits form Asahi Kasei Microdevices Corporation (AKM) assembled in “lead-free” packages* are fully compliant with RoHS. (*) RoHS compliant products from AKM are identified with “Pb free” letter indication on product label posted on the anti-shield bag and boxes. MS1281-E-00 Mar-2011 - 11 - AK8180A IMPORTANT NOTICE These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. Descriptions of external circuits, application circuits, software and other related information contained in this document are provided only to illustrate the operation and application examples of the semiconductor products. You are fully responsible for the incorporation of these external circuits, application circuits, software and other related information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein. Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKM. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. Mar-2011 MS1281-E-00 - 12 -