AOSMD AON6450L

AON6450L
N-Channel SDMOS TM Power Transistor
General Description
Product Summary
The AON6450L is fabricated with SDMOSTM trench
technology that combines excellent RDS(ON) with low gate
charge.The result is outstanding efficiency with controlled
switching behavior. This universal technology is well suited
for PWM, load switching and general purpose applications.
Parameter
VDS
ID (at VGS=10V)
100V
52A
RDS(ON) (at VGS=10V)
< 14.5mΩ
RDS(ON) (at VGS = 7V)
< 17.5mΩ
100% UIS Tested!
100% R g Tested!
- RoHS Compliant
- Halogen Free
D
Top View
Fits SOIC8
footprint !
G
S
DFN5X6
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
TC=25°C
Continuous Drain
Current
Pulsed Drain Current
C
Avalanche Current C
C
TC=25°C
Power Dissipation
B
TA=25°C
Power Dissipation A
TA=70°C
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
AD
Maximum Junction-to-Ambient
Maximum Junction-to-Case
EAR
Steady-State
Steady-State
41
A
84
mJ
W
33
2.3
RθJA
RθJC
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W
1.4
TJ, TSTG
Symbol
t ≤ 10s
A
83
PDSM
Junction and Storage Temperature Range
Rev 0: January 2009
9
PD
TC=100°C
A
7
IAR
Repetitive avalanche energy L=0.1mH
V
110
IDSM
TA=70°C
±25
33
IDM
TA=25°C
Continuous Drain
Current
Units
V
52
ID
TC=100°C
Maximum
100
°C
-55 to 150
Typ
14
40
1
Max
17
55
1.5
Units
°C/W
°C/W
°C/W
Page 1 of 7
AON6450L
Electrical Characteristics (T J=25°C unless otherwise noted)
Parameter
Symbol
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250µA, VGS=0V
VDS=100V, VGS=0V
100
50
Gate-Body leakage current
VDS=0V, VGS= ±25V
VGS(th)
ID(ON)
Gate Threshold Voltage
On state drain current
VDS=VGS ID=250µA
2.8
VGS=10V, VDS=5V
110
VGS=10V, ID=20A
TJ=125°C
VGS=7V, ID=20A
gFS
Forward Transconductance
VSD
Diode Forward Voltage
IS=1A,VGS=0V
Maximum Body-Diode Continuous Current
IS
VDS=5V, ID=20A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
Qg(4.5V) Total Gate Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
VGS=0V, VDS=50V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=50V, ID=20A
Units
V
TJ=55°C
Static Drain-Source On-Resistance
Max
10
IGSS
RDS(ON)
Typ
µA
100
nA
3.4
4
V
12.1
14.5
22.8
27.5
14
17.5
mΩ
1
V
52
A
A
52
0.7
mΩ
S
2000
2570
3100
pF
170
250
330
pF
50
80
120
pF
0.4
0.8
1.2
Ω
34
43
52
nC
9
11.5
14
nC
11
14
17
nC
8
13.5
19
nC
VGS=10V, VDS=50V, RL=2.5Ω,
RGEN=3Ω
15
ns
5
ns
28.5
ns
5
ns
trr
Body Diode Reverse Recovery Time
IF=20A, dI/dt=500A/µs
17
24
31
Qrr
Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs
75
108
140
ns
nC
A. The value of RθJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on
the user's specific board design, and the maximum temperature of 150°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initial
TJ =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
G. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
Rev 0: January 2009
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 0: January 2009
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Page 2 of 7
AON6450L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
110
110
10V
100
7V
90
7.5V
90
6.5V
80
70
70
60
60
ID(A)
ID (A)
80
50
6V
40
VDS=5V
100
50
40
30
30
20
10
125°C
20
VGS=5.5V
10
25°C
0
0
0
1
2
3
4
0
5
16
2
3
4
5
6
7
8
Normalized On-Resistance
2.2
15
RDS(ON) (mΩ)
1
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
VGS=7V
14
13
VGS=10V
12
11
2
VGS=10V
ID=20A
1.8
1.6
1.4
VGS=7V
ID=20A
1.2
17
5
2
10
1
0.8
0
5
0
10
15
20
25
30
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
25
50
75
100
125
150
175
Temperature (°C)
0
Figure 4: On-Resistance vs. Junction Temperature
18
(Note E)
30
1.0E+02
ID=20A
1.0E+01
25
40
125°C
20
IS (A)
RDS(ON) (mΩ)
1.0E+00
15
1.0E-01
125°
1.0E-02
25°C
1.0E-03
25°C
10
1.0E-04
1.0E-05
5
5
6
7
8
9
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 0: January 2009
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0.0
0.2
0.4
0.6
0.8
VSD (Volts)
Figure 6: Body-Diode Characteristics
1.0
(Note E)
Page 3 of 7
AON6450L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
3500
VDS=50V
ID=20A
3000
Capacitance (pF)
VGS (Volts)
8
6
4
2
Ciss
2500
2000
1500
Coss
1000
Crss
500
0
0
0
10
20
30
40
50
0
Qg (nC)
Figure 7: Gate-Charge Characteristics
10
20
30
40
50
VDS (Volts)
Figure 8: Capacitance Characteristics
400
1000.0
TJ(Max)=150°C
TC=25°C
350
10µs
10.0
RDS(ON)
limited
100µs
DC
1.0
1ms
TJ(Max)=150°C
TC=25°C
0.1
0.0
0.01
300
10µs
Power (W)
ID (Amps)
100.0
0.1
250
150
100
50
1
10
VDS (Volts)
ZθJC Normalized Transient
Thermal Resistance
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
100
1000
0
0.0001
0.001
0.01
1
0
10
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
PD
0.1
Ton
0.01
0.00001
0.1
Pulse Width (s)
18
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
RθJC=1.5°C/W
1
17
5
2
10
200
Figure 9: Maximum Forward Biased
Safe Operating Area (Note F)
10
60
Single Pulse
0.0001
0.001
0.01
0.1
T
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 0: January 2009
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Page 4 of 7
AON6450L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
90
80
50
TA=25°C
Power Dissipation (W)
IAR (A) Peak Avalanche Current
60
TA=100°C
40
30
TA=150°C
20
10
TA=125°C
70
60
50
40
30
20
10
0
0
0.000001
0
0.00001
0.0001
Time in avalanche, tA (s)
Figure 12: Single Pulse Avalanche capability (Note
C)
50
75
100
125
150
TCASE (°C)
Figure 13: Power De-rating (Note F)
10000
60
TA=25°C
50
1000
40
Power (W)
Current rating ID(A)
25
30
20
17
5
2
10
100
10
10
1
0.0001
0
0
25
50
75
100
125
TCASE (°C)
Figure 14: Current De-rating (Note F)
ZθJA Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
0.01
1
100
10000
0
18
150
Pulse Width (s)
Figure 15: Single Pulse Power Rating Junction-toAmbient (Note G)
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
RθJA=55°C/W
0.1
PD
0.01
Ton
Single Pulse
0.001
0.0001
0.001
0.01
0.1
1
T
10
100
1000
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance (Note G)
Rev 0: January 2009
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Page 5 of 7
AON6450L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
26
20
25ºC
16
Qrr
90
18
125ºC
20
trr (ns)
120
Irm (A)
Qrr (nC)
25
22
150
25ºC
Irm
8
0
5
10
15
20
25
0
125ºC
10
30
6
Irm
0
0
200
400
600
800
125ºC
25
20
2
1000
1.5
trr
25ºC
1
15
25ºC
0
0
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200
400
0.5
S
125º
5
di/dt (A/µs)
Figure 19: Diode Reverse Recovery Charge and
Peak Current vs. di/dt
Rev 0: January 2009
30
2
10
25ºC
25
Is=20A
trr (ns)
14
60
20
35
Irm (A)
Qrr (nC)
25ºC
Qrr
15
40
18
90
10
30
150
120
5
IS (A)
Figure 18: Diode Reverse Recovery Time and
Softness Factor vs. Conduction Current
22
125ºC
0.4
125ºC
0
26
180
25ºC
S
IS (A)
Figure 17: Diode Reverse Recovery Charge and
Peak Current vs. Conduction Current
Is=20A
1.2
0
30
210
25ºC
1.6
0.8
5
10
0
trr
10
12
30
di/dt=800A/µs
15
14
60
2
125ºC
S
180
30
24
125ºC
di/dt=800A/µs
S
210
600
800
0
1000
di/dt (A/µs)
Figure 20: Diode Reverse Recovery Time and
Softness Factor vs. di/dt
Page 6 of 7
AON6450L
Gate Charge Test Circuit & W aveform
Vgs
Qg
10V
+
+ Vds
VDC
-
VDC
DUT
Qgs
Qgd
-
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
+ Vdd
DUT
Vgs
VDC
Rg
-
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
t off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
E AR= 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
VDC
Rg
-
I AR
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds -
Isd
Vgs
Ig
Rev 0: January 2009
Vgs
Isd
L
+ Vdd
VDC
-
IF
t rr
dI/dt
I RM
Vdd
Vds
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Page 7 of 7