DM9006EP Product Brief Two Port Ethernet Switch Controller with 8/16-bit Processor Interface January 2009 Rev.1.0 The DM9006 is a fully integrated and cost-effective fast Ethernet switch controller with two ports 10M/100M PHY, and local bus interface. The controller provides basic Layer-2 switch functions and advance IEEE 802.1Q VLAN, priority queuing scheme, IGMP snooping protocol. The integrated two ports PHY are compliant with IEEE 802.3u standards. Block Diagram Switch Engine Port 0 10/100 M 10 /100 M PHY MAC Port 1 10/100 M 10 /100 M MDI / MDIX PHY MAC MDI / MDIX 8 / 16 bit Processor Host Processor Interface MAC Memory Switch Fabric Embedded BIST Memory Switch Memory Controller Management Bus Control MIB EEPROM Registers Counters Interface EEPROM Specifications Ethernet Switch with two 10/100Mb PHY with 16-bit Processor Interface Per port supports 4 priority queues by Port-based, 802.1P VLAN, and IP TOS priority. Support 802.1Q VLAN up-to 16 VLAN group. Support VLAN ID tag/untag options Per port support bandwidth, ingress and egress rate control. Support Broadcast Storming filter function Support Store and Forward switching approach Support IEEE 802.3x Flow Control in Full-duplex mode. Support Back Pressure Flow Control in Half-duplex mode. Recode up-to 1K Uni-cast MAC addresses Automatic aging scheme EEPROM interface for power up configurations Support MIB-II counters Local bus slave architecture Support multicast filter function TCP/IP/UDP/IPv4 checksum offload Support IGMP Snooping v1, v2 Support port security WoL (Wake-on-LAN) Compatible with 3.3V and 5.0V tolerant I/O DSP PHY with HP Auto-MDIX, DSP architecture PHY Transceiver. 64-pin LQFP, 0.18 um process Application VoIP CPE (ATA, IP Phone, Video Phone) IP STB, IPC, Internet Radio Ordering Information Part Number Pin Count DM9006EP 64 DAVICOM Semiconductor, Inc. No.6, Li-Hsin Rd.VI, Science Park, Hsin-Chu, Taiwan, R.O.C. TEL: 886-3-5798797 FAX: 886-3-5646929 E-mail: [email protected] Package LQFP (Pb-Free)