preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 1/19 FEATURES APPLICATIONS ♦ ♦ ♦ ♦ ♦ Dual voltage supply by buck/boost converters with adjustable, back-end linear regulators ♦ Power management for laser, encoder, and automotive applications ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ Wide input voltage range of +4 to +36 V Reverse polarity protection up to -36 V with autarky function Universal buck/boost converter with high efficiency Two back-end, adjustable linear regulators (1.5 V to 5.5 V) with a total of up to 300 mA of output current and a separate output voltage monitor Low residual ripple with small capacitors in the µF range Separate enable inputs for the linear regulators Two switched linear regulator outputs Integrated switching transistors and flyback diodes Converter cut-off current can be set by an external resistor Integrated 3 MHz oscillator with no external components Active noise spectrum reduction Error messaging with overtemperature, overvoltage, and undervoltage at the current-limited open-collector output Wide temperature range of -40 °C to 125 °C Protective circuitry against ESD Space saving 24-pin QFN package PACKAGES QFN24 4 mm x 4 mm (RoHS compliant) BLOCK DIAGRAM LVBH 4...36V CVB 1μF CVBR 10μF VB 22μH VBR VBL VHL VH CVH 3.3μF REVERSE PROTECT. VH1 INTERNAL SUPPLY VCC1 VBROK VOLTAGE MONITOR NAUT BUCK POE1 1 AUTARKY DETECT. TOK THERMAL SHUTDOWN BOOST 1 VH2 CONTROL VCC2 BIAS RREF OSCILLATOR REFERENCE R1 VCC2 R3 1.5...5.5V CVCC2 1μF SUPPLY SWITCH 2 LIN.-REG.2 V1OK ENV2 OUTPUT ENABLE CFG1 CONFIGURATION VCC1: 5V/3.3V/R1:R2 VCC2: 3.3V/2.5V/R3:R4 CFG2 R2 2 CVH2 3.3μF VCC1,VCC2 ENV1 VCC1 POE2 2 SWITCHING REGULATOR 1.5...5.5V CVCC1 1μF SUPPLY SWITCH 1 LIN.-REG.1 ERROR DETECT. RREF 20k CVH1 3.3μF R4 Copyright © 2011 iC-Haus 1 V2OK & iC-DC GNDA GND 2 VOLTAGE MONITORING TEST http://www.ichaus.com iC-DC preliminary 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 2/19 DESCRIPTION iC-DC is a monolithic switching converter with two back-end linear regulators. The output voltages of the two linear regulators can be individually pinconfigured within a range of 1.5 to 5.5 V. The switching converter supplies up to 300 mA which can be drawn from the two linear regulators in the ratio required. The back-end linear regulators have a very low residual ripple with comparatively small filter capacitors in the single-digit µF range. The intermediate voltages of the two on-chip linear regulators are adjusted to minimize their drop-out voltages. These are approximately 400 mV above the set linear regulator output voltages. The chip temperature, input voltage, and integrated reverse polarity protection are monitored and errors signaled by current-limited open-collector outputs. With overtemperature the switching converter is disabled to reduce the chip’s power dissipation. The high efficiency of the buck/boost converter for an input voltage range of +4 V to +36 V makes iC-DC suitable for industrial applications. Using very few external components, a DC/DC power pack can be created with a stabilized supply voltage and minimum power dissipation. iC-DC is ideal for sensor applications thanks to its minimal power loss, few components, and stabilized supply. Switching transistors, flyback diodes, and an oscillator are integrated in the device so that the only external elements needed are an inductor, the backup capacitors, and a reference resistor. By using two independent regulators voltages can be decoupled from sensitive analog circuits and driver devices, for example. The linear regulator output voltages are monitored and once having reached the steady state they are also switched to outputs POE1 and POE2. The output voltages of the two linear regulators VCC1 and VCC2 can be switched on and off by two separate inputs. The device’s standby function can be activated to minimize the current consumption. preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 3/19 CONTENTS PACKAGES PACKAGE DIMENSIONS . . . . . . . . . . . 4 5 ABSOLUTE MAXIMUM RATINGS 6 THERMAL DATA 6 ELECTRICAL CHARACTERISTICS 7 DESCRIPTION OF FUNCTIONS Charge/discharge phase . . . . . Intermittent flow / continuous flow Startup behavior . . . . . . . . . Standby . . . . . . . . . . . . . . . . . . 11 11 12 12 12 LINEAR REGULATORS VCC1 AND VCC2 Switched output voltages . . . . . . . . . . . Voltage monitor self-test . . . . . . . . . . . . Current carrying capacity . . . . . . . . . . . 13 13 13 13 . . . . . . . . . . . . . . . . . . . . . . . . REVERSE POLARITY PROTECTION 14 ERROR EVALUATION 15 Supply voltage monitor . . . . . . . . . . . . . 15 Output voltage monitor . . . . . . . . . . . . . 15 Output voltage monitor self-test . . . . . . . . 15 Temperature monitor . . . . . . . . . . . . . . 15 AUTARKY FUNCTION 15 DESCRIPTION OF THE APPLICATION 16 Selecting the coil . . . . . . . . . . . . . . . . 16 Selecting the capacitors . . . . . . . . . . . . 16 Printed circuit board layout . . . . . . . . . . 16 EXAMPLE APPLICATION 17 DESIGN REVIEW: Notes On Chip Functions 17 preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 4/19 PACKAGES PIN CONFIGURATION QFN24-4x4 (4 mm x 4 mm) 24 23 22 PIN FUNCTIONS No. Name Function 21 20 1 RREF 2 GNDA 3 CFG1 19 1 18 2 17 3 16 DC ... yyww... 4 5 6 7 8 9 10 11 15 14 13 12 Reference Resistor Analog Ground VCC1 Configuration 3.3/5.0 V or 1.5 V to 5.5 V with ext. R Divider 4 CFG2 VCC2 Configuration2.5/3.3 V or 1.5 V to 5.5 V with ext. R Divider 5 TEST Test Input 6 POE2 Power Output Enable VCC2 Voltage 7 V2OK Error Output VCC2 Voltage 8 VCC2 1.5 V to 5.5 V Lin. Regulator Output 2 9 VH2 Intermediate Voltage 2 for VCC2 Regulator 10 VH1 Intermediate Voltage 1 for VCC1 Regulator 11 VCC1 1.5 V to 5.5 V Lin. Regulator Output 1 12 V1OK Error Output VCC1 Voltage 13 POE1 Power Output Enable VCC1 Voltage 14 VH Intermediate Voltage 15 VHL Inductor Terminal VH 16 GND Power Ground 17 VBL Inductor Terminal VB 18 VBR Reverse Protected Supply Voltage 19 VB +4 V to +36 V Supply Voltage 20 ENV1 VCC1 Linear Regulator Activation 21 ENV2 VCC2 Linear Regulator Activation 22 VBROK Error Output Supply Voltage 23 TOK Error Output Overtemperature 24 NAUT Error Output Autarky TP Thermal Pad The Thermal Pad on the underside of the package should be appropriately connected to GND for better heat dissipation (ground plane). GNDA should also be directly connected to neutral point GND. Ground loops should be avoided. Only the Pin 1 mark on the front or reverse is determinative for package orientation ( subject to change). DC and code are preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 5/19 PACKAGE DIMENSIONS RECOMMENDED PCB-FOOTPRINT 3.80 2.49 15 R0. TOP 0.30 0.70 0.50 0.25 0.40 3.80 0.90 2.49 SIDE BOTTOM 2.45 4 2.45 4 0.50 dra_qfn24-1_pack_1, 10:1 All dimensions given in mm. preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 6/19 ABSOLUTE MAXIMUM RATINGS Maximum ratings do not constitute permissible operating conditions; functionality is not guaranteed. Exceeding the maximum ratings can damage the device. Item No. Symbol Parameter Conditions Unit Min. Max. G001 V() Voltage at VB -40 42 V G002 V() Voltage at VBR, VBL, ENV1, ENV2 -0.3 42 V G003 V() Voltage at VHL, VH, VBROK, NAUT, TOK, TEST -0.3 8.4 V G004 V() Voltage at VH1, VH2 -0.3 6.4 V G005 V() Voltage at VCC1, VCC2, V1OK, V2OK, CFG1, CFG2, POE1, POE2, RREF, GNDA -0.3 5.6 V G006 I(VB) Current in VB -50 800 mA G007 I(VBR) Current in VBR -50 800 mA G008 I(VBL) Current in VBL -800 50 mA G009 I(VHL) Current in VHL -50 800 mA G010 I() Current in VH, VH1, VH2, VCC1, VCC2 -500 20 mA G011 I() Current in CFG1, CFG2, ENV1, ENV2, V1OK, V2OK, VBROK, NAUT, TOK, POE1, POE2, RREF, TEST, GNDA -20 20 mA G012 Vd() ESD Susceptibility at all pins 2 kV G013 Tj Chip-Temperature -40 150 °C G014 Ts Storage Temperature Range -40 150 °C HBM, 100 pF discharged through 1.5 kΩ THERMAL DATA Operating conditions: VB = +4 V to +36 V Item No. Symbol Parameter Conditions Unit Min. T01 Ta Operating Ambient Temperature Range T02 Rthja Thermal Resistance Chip to Ambient QFN24 Typ. -40 Surface mounted, Thermal-Pad soldered to approx. 2 cm² copper area on the PCB All voltages are referenced to ground (pin GND: power ground) unless otherwise stated. All currents flowing into the device pins are positive; all currents flowing out of the device pins are negative. 30 Max. 125 °C 40 K/W preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 7/19 ELECTRICAL CHARACTERISTICS Operating conditions: VB = +4 V to +36 V, RREF = 20 kΩ ±1 %, Tj = -40°C to +125°C, reference is GND (GNDA = GND), unless otherwise stated. Item No. Symbol Parameter Conditions Unit Min. Typ. Max. Total Device 001 VB Permissible Supply Voltage 36 V 002 003 I() Supply Current in VB ENV1 = lo, ENV2 = lo, standby 20 100 200 µA I() Supply Current in VB only one Linear Regulator active, no load current, no external voltage divider VB = 24 V VB = 12 V VB = 4 V 1.5 2.5 10 3 5.5 22 8 15 50 mA mA mA both Linear Regulators active, no load current, no external voltage divider VB = 24 V VB = 12 V VB = 4 V 2 3 12 4 7 25 10 20 60 mA mA mA V() = 2...36 V 15 150 µA 2 V 004 I() Supply Current in VB 4 007 Ipd() Pull-Down Current in ENV1, ENV2 009 Vt()hi Input Threshold Voltage hi at ENV1, ENV2 010 Vt()lo Input Threshold Voltage lo at ENV1, ENV2 011 Vt()hys Input Hysteresis at ENV1, ENV2 Vt()hys = Vt()hi − Vt()lo 100 400 mV 012 Vc()lo Clamp Voltage lo at all pins with exception of VB versus GND, I() = -10 mA -1.4 -0.3 V 013 Vc()lo Clamp Voltage lo at VB versus GND, I() = -2 mA -60 -42 V 014 Vc()hi Clamp Voltage hi at VB VBR, VBL, ENV1, ENV2 versus GND, I() = 2 mA 42 60 V 015 Vc()hi Clamp Voltage hi at VBROK, NAUT, TOK, TEST versus GND, I() = 1 mA 9 18 V 016 Vc()hi Clamp Voltage hi at VH versus GND, I() = 5 mA 8.3 18 V 017 Vc()hi Clamp Voltage hi at VH1, VH2 versus GND, I() = 10 mA 6.2 18 V 018 Vc()hi Clamp Voltage hi at VCC1, VCC2, POE1, POE2, CFG1, CFG2 versus GND, I() = 10 mA 5.6 18 V 019 Vc()hi Clamp Voltage hi at GNDA, RREF versus GND, I() = 10 mA 2.5 18 V 020 Vc()hi Clamp Voltage hi at V1OK, V2OK V1OK versus VCC1, V2OK versus VCC2, I() = 2 mA 0.3 1.4 V 021 Vc()hi Clamp Voltage hi at VHL 0.3 1.4 V 0.6 V 0 mA 0.8 versus VH, I() = 10 mA V 200 Reverse Polarity Protection VB, VBR and Autarky Detection NAUT Vs(VBR)hi = VB − V(VBR), I(VBR) = -100 mA 101 Vs()hi Saturation Voltage hi at VBR 103 Izu() Maximum Permissible Current hi V(VBR) = 0...3 V, VB increasing from VBR at Startup 104 Imax() Maximum Current from VBR V(VBR) = 2 V...VB − 0.6 V -500 -120 mA 105 Imax() Maximum Current from VBR V(VBR) = 0 V -150 -10 mA 108 Ir() Leakage Current from VB at Autarky VBR > VB + 50 mV -0.5 0 mA 109 d(VB,VBR) Voltage Difference for Autarky VBR versus VB; NAUT = lo 25 12.5 0 mV 110 Ir,max() Maximum Current from VB VB < VBR < VB + 50 mV -10 -4 0 mA 111 Ir() Reverse Current from VB -36V < VB < GND -1 0 mA 112 Vs()lo Saturation Voltage lo at NAUT I(NAUT) = 5 mA, NAUT = lo 113 Isc()lo Short-Circuit Current lo in NAUT V(NAUT) = 2...8 V, NAUT = lo 114 Ilk() Leakage Current in NAUT V(NAUT) = 0...8 V, NAUT = hi 0.3 -5 -250 10 -10 0.4 V 20 mA 10 µA 3.95 V Voltage Monitoring VBR and Error Detection VBROK 201 Vt1()hi Lower Turn-on Threshold VBR VBR increasing, VBROK: lo → open 202 Vt1()lo Lower Turn-off Threshold VBR VBR decreasing, VBROK: open → lo 3.75 2.8 3.15 V preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 8/19 ELECTRICAL CHARACTERISTICS Operating conditions: VB = +4 V to +36 V, RREF = 20 kΩ ±1 %, Tj = -40°C to +125°C, reference is GND (GNDA = GND), unless otherwise stated. Item No. Symbol Parameter Conditions Unit Min. Typ. Max. 203 Vt1()hys Hysteresis VBR Vt1()hys = Vt1()hi − Vt1()lo 204 Vt2()hi Overvoltage Detection at VBR VBR increasing, VBROK: open → lo 205 Vt2()lo Reset Overvoltage Detection at VBR VBR decreasing, VBROK: lo → open 35 37.6 206 Vt2()hys Hysteresis VBR Vt2()hys = Vt2()hi − Vt2()lo 1 2.8 210 Vs()lo Saturation Voltage lo at VBROK I(VBROK) = 5 mA, VBROK = lo 0.4 V 211 Isc()lo Short-Circuit Current lo in VBROK V(VBROK) = 2..8 V, VBROK = lo 50 mA 212 Ilk() Leakage Current in VBROK V(VBROK) = 0..8 V, VBROK = hi -10 10 µA 213 V(VBR) Minimal Supply Voltage for VBROK Function I(VBROK) = 5 mA, VBROK = lo, Vs(VBROK)lo < 0.4 V 3.2 Switching Regulator VH, VH1, VH2 305 V() Voltage at VH LVBH = 22 µH ±20 %, Ri(LVBH) < 1.1 Ω, CVH = 1 µF; VB ≤ 5 V, I(VH) = -50 mA, VB > 5 V, I(VH) = -100 mA, VB ≥ 12 V, I(VH) = -200 mA, VB ≥ 24 V, I(VH) = -300 mA tolerance ±30 % 300 600 40.4 7 7.25 7.25 7.25 mV 42 V V 4 V V 7.75 7.75 7.75 7.75 8 8 8 8 1 V V V V 307 CVH Required Capacitor at VH 308 RiVH Permissible Internal Resistance of Capacitor at VH 309 V() Voltage at VH1 versus VCC1, CVH1 = 1 µF, VB ≤ 5 V, I(VH1) = -50 mA, VB > 5 V, I(VH1) = -100 mA, VB ≥ 12 V, I(VH1) = -200 mA, VB ≥ 24 V, I(VH1) = -300 mA 311 CVH1 Required Capacitor at VH1 tolerance ±30 % 312 RiCVH1 Permissible Internal Resistance of Capacitor at VH1 313 V() Voltage at VH2 versus VCC2, CVH2 = 1 µF, VB ≤ 5V, I(VH2) = -50 mA, VB > 5 V, I(VH2) = -100 mA, VB ≥ 12 V, I(VH2) = -200 mA, VB ≥ 24 V, I(VH2) = -300 mA 315 CVH2 Required Capacitor at VH2 tolerance ±30 % 316 RiCVH2 Permissible Internal Resistance of Capacitor at VH2 330 ηVH Efficiency of Switching Converter VB = 4 V, V(VH) > 7 V, VB = VBR, VH VH1 > VCC1 + 800 mV, VH2 > VCC2 + 800 mV 70 % 331 ηVH Efficiency of Switching Converter VB = 6.5 V, V(VH) > 7 V, VB = VBR, VH VH1 > VCC1 + 800 mV, VH2 > VCC2 + 800 mV 80 % 332 ηVH1 Efficiency of Switching Converter VB = 4 V, V(VH) > 8.1 V, VB = VBR, VH1 ENV1 = hi, ENV2 = lo 70 % 333 ηVH1 Efficiency of Switching Converter VH1 80 % 334 ηVH2 Efficiency of Switching Converter VB = 4 V, V(VH) > 8.1 V, VB = VBR, VH2 ENV1 = lo, ENV2 = hi 70 % 335 ηVH2 Efficiency of Switching Converter VB = 6.5 V, V(VH) > 8.1 V, VB = VBR, VH2 ENV1 = lo, ENV2 = hi 80 % 300 µF 400 1 Ω 600 mV 1 300 µF 400 1 Ω 600 mV 1 µF 1 Ω Bias, Oscillator and Reference RREF 401 V() Voltage at RREF resistor RREF = 20 kΩ ±1 %, resistor RREF versus GNDA 1.18 1.24 1.3 V 402 R() Permissible Resistor at RREF ±1 % 19.6 34 kΩ 403 Isc() Short-Circuit Current lo in RREF V(RREF) = 0 V -3 -0.5 mA preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 9/19 ELECTRICAL CHARACTERISTICS Operating conditions: VB = +4 V to +36 V, RREF = 20 kΩ ±1 %, Tj = -40°C to +125°C, reference is GND (GNDA = GND), unless otherwise stated. Item No. 404 Symbol Parameter Conditions Unit Min. fos Oscillator Frequency Linear Regulator VCC1 501 VCC1nom,hi Output Voltage resistor RREF = 20 kΩ ±1 %, resistor RREF versus GNDA 2 Max. 7 MHz CFG1 = VCC1; VB < 5 V, I(VCC1) = -60...10 mA, VB ≥ 5 V, I(VCC1) = -100...10 mA, VB ≥ 6.5 V, I(VCC1) = -150...10 mA, VB ≥ 12 V, I(VCC1) = -200..10 mA, VB ≥ 24 V, I(VCC1) = -250...10 mA 4.75 5 5.25 V CFG1 = GNDA; VB < 5 V, I(VCC1) = -100...10 mA, VB ≥ 5 V, I(VCC1) = -150...10 mA, VB ≥ 6.5 V, I(VCC1) = -200...10 mA, VB ≥ 16 V, I(VCC1) = -300...10 mA, VB ≥ 24 V, I(VCC1) = -350...10 mA, 3.135 3.3 3.465 V 502 VCC1nom,lo Output Voltage 503 Vr(CFG1) Transmission Ratio of external V(VCC1) = Voltage Divider R(VCC1/CFG1) / (1 + R(VCC1/CFG1) / R(CFG1/GNDA)) * R(CFG1/GNDA) V(RREF), R(VCC1/CFG1) + R(CFG1/GNDA) = 10 kΩ...50 kΩ ±1 %, V(VCC1) = 1.5...5.5 V 504 CVCC1 Required Capacitor at VCC1 versus GNDA 505 RiCVCC1 Permissible Internal Resistance of Capacitor at VCC1 506 VCC1,lir Line Regulation I(VCC1) = -100 mA, VB = 8...30 V 507 VCC1,lor Load Regulation VB = 24 V, I(VCC1) = 0...200 mA 508 VCC1rip Output Ripple I(VCC1) = -100mA Linear Regulator VCC2 601 VCC2nom,hi Output Voltage Typ. tolerance ±30 % 0.2 3.5 1 µF 1 Ω -20 20 mV -20 20 10 mV mVpp CFG2 = VCC2; VB < 5 V, I(VCC2) = -100...10 mA, VB ≥ 5 V, I(VCC2) = -150...10 mA, VB ≥ 6.5 V, I(VCC2) = -200...10 mA, VB ≥ 16 V, I(VCC2) = -300...10 mA, VB ≥ 24 V, I(VCC2) = -350...10 mA 3.135 3.3 3.465 V CFG2 = GNDA; VB < 5 V, I(VCC2) = -150...10 mA, VB ≥ 5 V, I(VCC2) = -200...10 mA, VB ≥ 6.5 V, I(VCC2) = -250...10 mA, VB ≥ 12 V, I(VCC2) = -300...10 mA, VB ≥ 24 V, I(VCC2) = -350...10 mA 2.375 2.5 2.625 V 602 VCC2nom,lo Output Voltage 603 Vr(VCC2) Transmission Ratio of external V(VCC2) = Voltage Divider R(VCC2/CFG2) / (1 + R(VCC2/CFG2) / R(CFG2/GNDA)) * R(CFG2/GNDA) V(RREF), R(VCC2/CFG2) + R(CFG2/GNDA) = 10 kΩ...50 kΩ ±1 %, V(VCC2) = 1.5...5.5 V 604 CVCC2 Required Capacitor at VCC2 versus GNDA 605 RiCVCC2 Permissible Internal Resistance of Capacitor at VCC2 606 VCC2,lir Line Regulation I(VCC2) = -100 mA, VB = 8...30 V 607 VCC2,lor Load Regulation VB = 24 V, I(VCC2) = 0...200 mA 608 VCC2rip Output Ripple I(VCC2) = -100mA tolerance ±30 % 0.2 3.5 1 µF 1 Ω -20 20 mV -20 20 mV 10 mVpp preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 10/19 ELECTRICAL CHARACTERISTICS Operating conditions: VB = +4 V to +36 V, RREF = 20 kΩ ±1 %, Tj = -40°C to +125°C, reference is GND (GNDA = GND), unless otherwise stated. Item No. Symbol Parameter Conditions Unit Min. Typ. Max. Voltage Monitoring V1OK, V2OK (x = 1, 2) 701 VtU()lo Lower Undervoltage Threshold VCCx for VxOK = lo versus VCCxnom 90 92 94 %VCC2 702 VtU()hi Upper Undervoltage Threshold VCCx for VxOK = hi versus VCCxnom 91 93 95 %VCC2 703 VtO()lo Lower Overvoltage Threshold VCCx for VxOK = hi versus VCCxnom 105 107 109 %VCC2 704 VtO()hi Upper Overvoltage Threshold VCCx for VxOK = lo versus VCCxnom 106 108 110 %VCC2 705 Vt()hys Hysteresis Under-/Overvoltage VCCx versus VCCxnom 0.25 1 1.5 %VCC2 706 Vs()lo Saturation Voltage lo VxOK = lo; I() = 4 mA, VCCx ≥ 3 V I() = 1 mA, VCCx < 3 V 0.4 0.4 V V Vs()hi = VCCx − V(), VxOK = hi; I() = -4 mA, VCC2 ≥ 3 V I() = -1 mA, VCC2 < 3 V 0.4 0.4 V V 6 1 80 30 mA mA -100 -30 -6 -1 mA mA 707 708 709 Vs()hi Isc()lo Isc()hi Saturation Voltage hi Short-Circuit Current lo Short-Circuit Current hi V() = VCCx, VxOK = lo; VCCx ≥ 3 V VCCx < 3 V V() = 0 V, VxOK = hi; VCCx ≥ 3 V VCCx < 3 V Supply Switches POE1, POE2 (x = 1, 2) 801 Vs()hi Saturation Voltage hi Vs()hi = VCCx − V(POEx); V(VCCx) ≥ 2.5 V, I(POEx) = -10 mA, V1OK, V2OK = hi 0.2 V 802 Vs()hi Saturation Voltage hi Vs()hi = VCCx − V(POEx); V(VCCx) < 2.5 V; I(POEx) = -5 mA, V1OK, V2OK = hi 0.2 V 803 Isc()hi Short-Circuit Current hi V(POEx) = 0 V; V(VCCx) ≥ 2.5 V, POEx = hi, V1OK, V2OK = hi -40 -12 mA 804 Isc()hi Short-Circuit Current hi V(POEx) = 0 V; V(VCCx) < 2.5 V, POEx = hi, V1OK, V2OK = hi -30 -6 mA Thermal Shutdown and Error Detection TOK 901 Toff Thermal Shutdown Threshold 150 160 175 °C 902 Ton Restart Temperature 135 150 165 °C 903 Thys Temperature Hysteresis Thys = Toff − Ton 5 10 20 °C 904 Vs()lo Saturation Voltage lo I(TOK) = 5 mA; TOK = lo 905 Isc()lo Short-Circuit Current lo V(TOK) = 2..8 V; TOK = lo 906 lk() Leakage Current V(TOK) = 0..8 V; TOK = hi 10 -10 0.4 V 20 mA 10 µA 0.7 V Test Input TEST A01 Vt()hi Threshold Voltage hi for Comparator test A02 Vt()lo Threshold Voltage lo for Comparator test A03 Vt()hys Hysteresis at TEST A05 Ipd() Pull-Down Current in TEST A07 A08 0.64 0.54 0.6 Vt() = Vt(TEST)hi − Vt(TEST)lo 10 40 V() = 5.5 V 20 tsu(TEST) Settling Time at V1OK, V2OK V1OK, V2OK changing hi → lo 10 tsu(TEST) Settling Time at V1OK, V2OK V1OK, V2OK changing of lo → hi 2 V 100 mV 200 µA 20 30 µs 4 8 µs preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 11/19 DESCRIPTION OF FUNCTIONS DC/DC converter iC-DC generates two regulated voltages of VH1 and VH2 from voltage VBR. These prestabilize the two linear regulators VCC1 and VCC2. A third voltage of VH, also regulated, is generated to drive these linear regulators. Voltage supply VB may be either above or below the output voltages. Figure 1 shoes the basic function principle of iC-DC. Switches S1 to S6 and diode D1 have been implemented on the chip. The inductor, capacitors, and load resistors are external devices. S4 VB D1 VBR S1 VBL S3 LVBH VHL S5 VH RVH CVH1 RVH1 CVH2 RVH2 VH1 S2 S6 CVH VH2 Another feature of iC-DC is that bias voltages VH1 and VH2 adjust themselves automatically to approximately 400 mV using the selected VCC1 or VCC2 voltage. This results in minimum power dissipation as only a low amount of voltage is lost through each of the linear regulators. Charge/discharge phase During the charge phase switches S1 and S2 close with the internal clock. A linearly increasing current flows through coil LVBH. The energy from supply VBR is stored in the coil’s magnetic field. Switches S1 and S2 open for discharging. Switch S3 and one of the switches S4 /S5 /S6 are closed. The current can continue to flow in the coil and is supplied to the relevant capacitor and relevant load. Figure 2 describes the resulting course of the current and voltage. The current rise and fall times depend on the inductor voltage. Figure 1: Principle of operation of the converter Dual 3.3V/5V BOOST/BUCK SMPS, 05.05.2008 11:51:33 400mA 300mA 200mA 100mA 0 I(LVBH) 4V 3V 2V 1V 0 -1V V(VBL) 8V 6V 4V 2V 0 8.887ms 8.888ms 8.889ms Time (linear) [Plot 0] V(VHL) Figure 2: Converter current/voltage characteristics (VB = 4 V) 8.89ms preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 12/19 Intermittent flow / continuous flow If the inductor is recharged in the next cycle before the coil current has run free, there is no gap in the current. This continuous flow occurs when the supply voltage is low or the load current high. If the charge and discharge processes are concluded within one clock cycle and the coil current drops to zero each time, intermittent flow prevails. This is the case when the supply voltage is sufficiently high or the load current sufficiently low. When no more current flows through the coil, after flyback in intermittent operation both ends of the inductor are switched to ground. This prevents the oscillations in no-load operation that are typical of many converters (RLC resonating circuit). This helps to achieve better EMC behavior. Startup behavior During startup and with low supply voltages the coil’s maximum cut-off current is reduced (soft start) until the nominal voltage is reached at VH. Figure 3 shows the startup behavior for VH, VCC1 (5 V), and VCC2 (3.3 V) with the voltage monitor outputs V1OK and V2OK. ductor, the sequence must allow that all three converter outputs are respectively supplied with the required current. The core of the converter consists of three independent converters. Each converter has its own regulated cut-off and restart current and its own voltage monitor. During the startup phase the VH converter ramps up until a voltage of approximately 7 V is obtained. Here, the cut-off current is initially limited to lower values so that a soft start with a low startup current ripple is achieved. When a high enough VH voltage is available, the VH1 and VH2 converters are also switched on and the voltages rise to their nominal values. Once in a steady state, the individual converters are cyclically supplied by the inductor with precisely the amount of current that is required at that moment. The maximum load current can thus be drawn from each of the voltages VH, VH1, VH2, VCC1, or VCC2. Standby The converters can be individually activated by pins ENV1 and ENV2. If neither of the two inputs are triggered, the device is in standby mode and the current consumption is reduced to a minimum. As soon as one of the two inputs becomes active, the VH voltage is also available. As three output voltages are generated with this switching converter topology using just one single inDual 3.3V/5V BOOST/BUCK SMPS, 08.05.2008 08:51:13 600mA 400mA 200mA 0 I(LVBH) 5V 4V 3V 2V 1V 0 V(V1OK) V(V2OK) 8V 6V 4V 2V 0 500us V(VH) V(VCC1) 550us Time (linear) [Plot 0] 600us V(VCC2) Figure 3: Startup principle for voltages VH, VCC1, VCC2, V1OK, and V2OK preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 13/19 LINEAR REGULATORS VCC1 AND VCC2 To achieve as low an interference voltage as possible, even with small filter capacitors CVH1 and CVH2 , an independent linear regulator is connected after each of the intermediate voltages VH1 und VH2. Output voltages VCC1 and VCC2 can each be adjusted using a voltage divider at CFG1 and CFG2 within a range of 1.5 to 5.5 V ±5 % and according to Equations 1 and 2. V VCC1 = V (RREF ) × (1 + R1 ) R2 (1) V VCC2 = V (RREF ) × (1 + R3 ) R4 (2) and NB: R1 + R2 bzw. R3 + R4 = 10 kΩ bis 50 kΩ Inputs CFG1 and CFG2 can also be directly connected to the relevant output voltage VCCx or GNDA. The resulting voltages are given in Tables 4 and 5. VCC1 output voltage Potential at CFG1 VCC1 GNDA VCC1 Voltage divider 3.3 V 5.0 V 1.5 V to 5.5 V Table 4: VCC1 settings ulators are deactivated, iC-DC is in standby mode (see DESCRIPTION OF FUNCTIONS/Standby). Switched output voltages The two pins POE1 and POE2 are triggered by monitor outputs V1OK and V2OK and provide voltages drawn from VCC1 or VCC2. This enables the supply of specific circuitry in a component group (e.g. EEPROMs) to be switched on only after VCC1 or VCC2 have reached their steady state. Voltage monitor self-test Using pin TEST the voltage monitoring comparators at V1OK and V2OK can be tested during ongoing operation. The undervoltage and overvoltage thresholds of V1OK and V2OK are checked in turn with each test. For this purpose, pin TEST is increased to above the threshold voltage by an external driver. Correct functioning is signaled by low signals at pins V1OK and V2OK. The function of the connected POE1 and POE2 outputs remains unaffected. Current carrying capacity iC-DC’s current carrying capacity depends on set output voltage VCCx and input voltage VB. Figure 4 shows the current carrying capacity dependent on the input voltage for various output voltages, measured on the iC-DC EVAL DC1D evaluation board. The internal reverse polarity protective circuit was bridged (VB = VBR) to increase the current carrying capacity. VCC2 output voltage VCC2 GNDA VCC2 Voltage divider 2.5 V 3.3 V 1.5 V to 5.5 V Table 5: VCC2 settings The regulators have been compensated internally so that they are stable in no-load operation without an external capacitor. Stability across the entire load range is guaranteed by the minimum capacitances for CVCC1 and CVCC2 given in the electrical characteristics. The outputs are current limited to protect them against destruction in the event of a short circuit. The two linear regulators can be switched on and off independently by inputs ENV1 and ENV2. If both reg- 0,500 0,450 0,400 0,350 Load Current [mA] Potential at CFG2 0,300 0,250 0,200 0,150 VH (>7.2V) 5V VCCx 3,3V VCCx 2,5V VCCx 1,5V VCCx 0,100 0,050 0,000 0,0 5,0 10,0 15,0 20,0 25,0 30,0 35,0 40,0 Input Voltage VB [V] Figure 4: Current carrying capacity for various output voltages dependent on VB (VB = VBR) preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 14/19 REVERSE POLARITY PROTECTION LVBH A protective switch inserted between supply VB and pin VBR protects the entire system against reverse polarity. This can also be used to implement an Autarky function (see AUTARKY FUNCTION). By connecting VB to VBR the reverse polarity protection circuit can be bridged to improve the current carrying capacity and the overall efficiency, especially if low supply voltages are used (Figure 5). 24V CVB 1μF 22μH VBR VBL VHL REVERSE PROTECT. INTERNAL SUPPLY VBROK BUCK VOLTAGE Figure 6: Protection against MONITOR reverse polarity active, NAUT CVBR for VB = 24 V AUTARKY BOOST 22μH 1 DETECT. VB VBR VBL VHL TOK 4V CVB 1μF REVERSE PROTECT. VBROK VOLTAGE VH CVBR ERROR DETECT. RREF RREF 20k BUCK DETECT. VCC1 CONTROL The reverse polarity protection switch is current limERROR DETECT. ited to the maximum mean current consumption of the BIAS system (Electrical Characteristics 104). A capacitor (CVBR) must be connected to pin VBR if higher coil RREF OSCILLATOR cut-off currents are to be supplied. REFERENCE RREF SWITCHING REGULATOR This20k capacitor should have a value of at least 1 µF at a supply voltage of VB = 24 V (Figure 6). With very ENV1 OUTPUT small supplyENV2 voltages the value must be greater in orENABLE VCC1 der toVCC2 cater for the higher power consumption during CONFIGURATION startup. The voltage at VBR must no longer drop below R1 VCC1: R3 5V/3.3V/R1:R2 CFG1 the lower shutdown threshold (Electrical CharacterisVCC2: CFG2 tics 202) to ensure safe converter startup. A capacitor 3.3V/2.5V/R3:R4 R2 of approx. 10 µF should thus be selected for CVBR at R4 GNDA GND a supply voltage of VB = 4 V (Figure 7). iC-DC ENV1 VCC2 R1 Figure R3 LIN.-REG.1 ENV2 VBROK VH1 VBL VBR VHL CVH1 3.3μF OSCILLATOR VCC1 REGULATOR SWITCHING REFERENCE REVERSE PROTECT. 1 CVH 3.3μF 22μH 10μF BIAS Figure 5: Protection against MONITOR reverse polarity bridges NAUT VB to VBR AUTARKY BOOST THERMAL SHUTDOWN LVBH CONTROL THERMAL SHUTDOWN VB INTERNAL SUPPLY TOK CVBR 1μF VB LVBH 4...36V CVB 1μF INTERNAL 1 SUPPLY OUTPUT ENABLE POE1 SUPPLY SWITCH 1 CONFIGURATION VOLTAGE BUCK VH2 7: Protection against MONITOR reverse polarity active, VCC1: CVH2 5V/3.3V/R1:R2 CFG1 NAUT CVBR for VB = 4V 3.3μF AUTARKY BOOST VCC2: CFG2 R2 TOK DETECT. 3.3V/2.5V/R3:R4 iC-DC VCC2 R1 TEST CONFIGURATION I(VBR) VCC1:= V (VB) ∗ CFG1 CFG2 R2 R4 THERMAL TES 2 ENABLE VCC2 R3 1 1.5...5.5V CVCC2 R4 CONTROL GNDA It is possible to use the protective switch at GND pin VBR SHUTDOWN 1μF POE2 2 to provide further ERROR circuitry withSUPPLY protection against reDETECT. 2 LIN.-REG.2 SWITCH 2 verse polarity (Figure 9, Page 17). Here, it must noted VCC1,VCC2 BIAS capacity of the reverse polarthat the current carrying ity protection (VBR)OSCILLATOR is limited on1 startup.V1OK As the device RREF powers itself from VBR, the load at VBR must not be REFERENCE V2OK RREF SWITCHING REGULATOR 2 too 20k high as otherwise converter operation cannot be & initiated. The current carrying capacity on startup can ENV1 VOLTAGE by Equation 3: OUTPUT be approximately described MONITORING ENV2 VCC1 2 1.5...5.5V CVCC1 1μF 5V/3.3V/R1:R2 VCC2: 3.3V/2.5V/R3:R4 −1mA V (3) iC-DC GNDA GND TES iC-DC preliminary 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 15/19 ERROR EVALUATION Supply voltage monitor Supply voltage VBR is monitored. If the normal voltage range is overshot or undershot, this is signaled at open-drain pin VBROK. The bias current generated by an external reference resistor is also monitored and an error signaled at VBROK should the permissible range be exceeded. If an error has occurred, pin VBROK is switched to GND. Output voltage monitor The two linear regulator output voltages VCC1 and VCC2 are also monitored. If the overvoltage threshold is overshot or the undervoltage threshold undershot (e.g. due to overload), a message is generated at the current-limited push-pull outputs V1OK and V2OK. Voltage outputs POE1 and POE2 are shut down. Output voltage monitor self-test Using pin TEST the voltage monitoring comparators at V1OK and V2OK can be tested during ongoing operation. The undervoltage and overvoltage thresholds of V1OK and V2OK are checked in turn with each test. For this purpose, pin TEST is increased to above the threshold voltage by an external driver. Correct functioning is signaled by low signals at pins V1OK and V2OK. The function of the connected POE1 and POE2 outputs remains unaffected. Temperature monitor The internal chip temperature is monitored. If the monitor indicates overtemperature, all switches on the switching converter are shut down. These are automatically re-enabled when the chip temperature has dropped below the restart temperature. A message is signaled at open-drain pin TOK for as long as the converter is shut down due to chip overtemperature. The protective switch (VB / VBR) has its own over temperature protection, which is also operative during standby mode. As error outputs VBROK and TOK are current limited, an LED can be directly connected up for visual message display. However, the additional power dissipation this causes in the IC must be taken into account. By placing resistor RLED in series with the LED, this additional chip power loss can be reduced in the event of error. CMOS or TTL-compatible logic inputs can be activated by pull-up resistors at VBROK and TOK. AUTARKY FUNCTION By inserting a capacitor at VBR, an Autarky function can be realized should the supply fail at VB. This Autarky function guarantees the linear regulator output voltages for some time. If the voltage at VBR is greater than at VB (elec. char. no. 109), this is signaled by current-limited open-drain output NAUT. To ensure that VBR > VB should the supply voltage fail, it is recom- mended that a resistor be switched between VB and GND in order to generate the required differential voltage of dVBR, VB . With this capacitor acting as a buffer, the effect of current spikes feeding back into the supply voltage VB is also reduced. iC-DC preliminary 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 16/19 DESCRIPTION OF THE APPLICATION Selecting the coil The coil should be designed for a maximum cut-off current of 1 A. A small internal resistor in the coil reduces loss and increases converter efficiency. At a low supply voltage this internal resistor can determine the maximum available output current. The EMI caused by the coil should be taken into consideration. Toroidal core coils have little noise radiation yet are expensive and difficult to install. Bar core coils are reasonably priced and easier to use yet have a higher noise emittance. For modest EMI requirements inexpensive radio interference suppression coils of several tens of µH are suitable∗ . Selecting the capacitors Selecting back-up capacitors CVH , CVH1 and CVH2 is unproblematic. As the residual ripple of intermediate voltages VH1 and VH2 does not affect output voltages VCC1 and VCC2 thanks to the back-end linear regulators, a small capacitor is sufficient without any specific demands being made of the internal resistor. A combination of electrolytic and ceramic capacitors (e.g. 3.3 µF || 100 nF) is recommended. Before using tantalum capacitors, the user must verify whether these are suitable for the residual AC amplitude (residual ripple) at pins VH1 and VH2. Printed circuit board layout The GND path from the switching converter and from each linear regulator should be strictly separated to avoid cross couplings. The neutral point of all GND paths is the GND connection at iC-DC. It is possible and not critical, however, to route GND from supply VB and the base point of capacitors CVH , CVH1 and CVH2 together to the neutral point. The capacitors should be very close to their relevant pins, however. Blocking capacitors for supply VB should be arranged as close as possible to pins VB and GND. The capacitors for outputs VCC1 and VCC2 should be placed directly at the load and not at the IC to also block interferences which are coupled via the wiring to the load. The ground planes underneath the wiring of output voltages VCC1, VCC2, POE1, and POE2 should be kept separate from the ground planes of switching converters VH, VH1, and VH2. The ground planes must be connected up at a neutral point (see Figure 8). The thermal pad should be connected to the PCB by an appropriate ground plane. The resulting power dissipation can be transferred to a different wiring layer, e.g. a ground plane, by vias directly underneath the IC. Stability of the linear regulators across the entire load area is guaranteed if the values given in the electrical characteristics are selected for CVCC1 and CVCC2. The suppression of interference voltage is improved by using small capacitor series resistors. A combination of tantalum and ceramic capacitors is also recommended in this case. If one of the two outputs remains open, this capacitor can be omitted. To avoid feedback of interference from supply voltage VB onto output voltages VCC1 and VCC2, blocking should be provided directly at pin VB. A combination of tantalum and ceramic capacitors (e.g. 1 µF || 100 nF) is also recommended in this case. ∗ Figure 8: Example layout: evaluation board DC1D e.g.: Siemens Matsushita B78108-S1224-J (22 µH/1 A, axial), TDK series NLC565050T-. . . (SMD), TOKO series 10RF459-. . . (SMD shielded) preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 17/19 EXAMPLE APPLICATION VBR VB GND 4.5..32V LVBH D1 CVB 1μF ZD1 0V CVBR 10μF 22μH VB VBR VBL VHL VH CVH 3.3μF REVERSE PROTECT. VCC1 VH1 CVH1 3.3μF INTERNAL SUPPLY RERR 2k NERR_DC VCC1 VBROK NAUT TOK BUCK VOLTAGE MONITOR POE1 1 AUTARKY DETECT. BOOST THERMAL SHUTDOWN 1 SUPPLY SWITCH 1 LIN.-REG.1 VH2 CONTROL CVH2 3.3μF VCC2 ERROR DETECT. VCC2 BIAS RREF RREF 20k OSCILLATOR SWITCHING REGULATOR 2 CVCC2 1μF POE2 2 REFERENCE VCC1 CVCC1 1μF SUPPLY SWITCH 2 LIN.-REG.2 VCC1,VCC2 VBR ENV1 OUTPUT ENABLE CFG1 CONFIGURATION VCC1: 5V/3.3V/R1:R2 VCC2: 3.3V/2.5V/R3:R4 VCC2 VCC1 R1 30.1k V1OK ENV2 CFG2 1 V2OK 2 & iC-DC R2 10k VOLTAGE MONITORING TEST GNDA GND C1 100nF SELECT RESOLUTION C2 100nF iC-LTA iC-PT Series TIP TIN SEL PA NA PB NB PZ LED POWER CONTROL SIGNAL COMPARATION AND QUADRATURE OUTPUT VCC LED PA NA PB NERR_DC MODE ERROR DETECTION iC-TL85 ENA & RLED 47 NB E1 PZ E2 UNDERVOLTAGE & OVERTEMPERATURE INDEX OUTPUT A3 E5 + V E6 W COMMUTATION GND GND1 GND2 GND3 GND4 VB2 D4 D10 A3 D11 A4 C5 100nF D5 D12 A6 A5 0 DIFF C4 100nF VB3 1 W A2 D3 VB3 A5 - V A1 D9 C3 100nF A4 0 U D8 VB2 0 E3 1 U NER VB1 D2 VB1 A2 E4 POWER-ON RESET ZD2 A1 1 & R3 NER 1 NZ NZ VCC TNER D6 iC-DL D13 A6 D7 Figure 9: Application with iC-DC, iC-PT, and iC-DL The application diagram in Figure 9 shows an example circuit featuring the DC/DC converter iC-DC. The input voltage range is set to between 4.5 V and 32 V by line driver iC-DL. The output voltages of the two linear regulators are each configured to 5 V. VCC2 supplies the optical 6-channel incremental scanner iC-LTA/iC-PT and VCC1 the 5 V section of 24 V line driver iC-DL. This creates a separation in the supply voltage between the sensing mechanism and the digital switching section of the circuitry. The status signals for overvoltage (VBROK) and overtemperature (TOK) in iC-DC are connected to iCDL’s error message input TNER. This links the iC- DC error messages to iC-DL’s own undervoltage and overtemperature monitor. iC-DL’s open-drain error message output NER thus provides the error messages for both ICs. This example circuit makes use of iC-DC’s integrated reverse polarity protection feature. The illustrated diodes ZD1, ZD2, D2 to D13 and resistor R3 form the basis for a protective circuit against overvoltage for all outputs. No specific designations are given for these components as these protective circuits are to be individually configured and dimensioned according to the application and requirement. preliminary iC-DC 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 18/19 DESIGN REVIEW: Notes On Chip Functions iC-DC Z Nr. Function, Parameter/Code Description and Application Hints 1 Vc(VB)lo Clamp Voltage lo at VB (elec. char. no. 013) can have a maximum of -40 V at low temperature. Table 6: Notes on chip functions regarding iC-DC chip release Z iC-Haus expressly reserves the right to change its products and/or specifications. An info letter gives details as to any amendments and additions made to the relevant current specifications on our internet website www.ichaus.de/infoletter; this letter is generated automatically and shall be sent to registered users by email. Copying – even as an excerpt – is only permitted with iC-Haus’ approval in writing and precise reference to source. iC-Haus does not warrant the accuracy, completeness or timeliness of the specification and does not assume liability for any errors or omissions in these materials. The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of the product. iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. As a general rule our developments, IPs, principle circuitry and range of Integrated Circuits are suitable and specifically designed for appropriate use in technical applications, such as in devices, systems and any kind of technical equipment, in so far as they do not infringe existing patent rights. In principle the range of use is limitless in a technical sense and refers to the products listed in the inventory of goods compiled for the 2008 and following export trade statistics issued annually by the Bureau of Statistics in Wiesbaden, for example, or to any product in the product catalogue published for the 2007 and following exhibitions in Hanover (Hannover-Messe). We understand suitable application of our published designs to be state-of-the-art technology which can no longer be classed as inventive under the stipulations of patent law. Our explicit application notes are to be treated only as mere examples of the many possible and extremely advantageous uses our products can be put to. iC-DC preliminary 2-CHANNEL BUCK/BOOST DC/DC CONVERTER Rev A3, Page 19/19 ORDERING INFORMATION Type Package Order Designation iC-DC QFN24 4 mm x 4 mm iC-DC QFN24-4x4 Evaluation Board iC-DC EVAL DC1D For technical support, information about prices and terms of delivery please contact: iC-Haus GmbH Am Kuemmerling 18 D-55294 Bodenheim GERMANY Tel.: +49 (61 35) 92 92-0 Fax: +49 (61 35) 92 92-192 Web: http://www.ichaus.com E-Mail: [email protected] Appointed local distributors: http://www.ichaus.com/sales_partners