ICS ICS40004A11L

PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840004-11
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
FEATURES
The ICS840004-11 is a 4 output LVCMOS/
LVTTL Synthesizer optimized to generate
HiPerClockS™ Ethernet reference clock frequencies and is a
member of the HiPerClocks TM family of high
performance clock solutions from ICS. Using a
25MHz, 18pF parallel resonant crystal, 125MHz and
62.5MHz can be generated based on one frequency select
pin (F_SEL). The ICS840004-11 uses ICS’ 3rd generation low
phase noise VCO technology and can achieve 1ps or lower
typical random rms phase jitter, easily meeting Ethernet jitter
requirements. The ICS840004-11 is packaged in a small
20-pin TSSOP package.
• Four LVCMOS/LVTTL outputs, 15Ω typical output impedance
ICS
• Crystal oscillator interface
• Input frequency range: 22.4MHz to 28MHz
• Output frequency Range: 56MHz - 140MHz
• VCO Range: 560MHz - 700MHz
• RMS phase jitter at 125MHz (1.875MHz - 20MHz):
0.70ps (typical)
• RMS phase noise at 125MHz:
• Full 3.3V supply
• 0°C to 70°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
FREQUENCY SELECT FUNCTION TABLE
F_SEL
0
Inputs
M Divider N Divider
Value
Value
25
10
1
25
FOR
ETHERNET FREQUENCIES
M/N
Ratio Value
2.5
5
5
Output Frequency
(25MHz Ref.)
62.5
125
BLOCK DIAGRAM
PIN ASSIGNMENT
OE Pullup
F_SEL Pullup
F_SEL
25MHz
XTAL_IN
OSC
Phase
Detector
VCO
XTAL_OUT
N
0 ÷10
1 ÷5
Q0
Q1
Q2
M = ÷25 (fixed)
Q3
F_SEL
nc
nc
nc
OE
nc
nc
VDDA
nc
VDD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
nc
GND
Q0
Q1
VDDO
Q2
Q3
GND
XTAL_IN
XTAL_OUT
ICS840004-11
20-Lead TSSOP
6.5mm x 4.4mm x 0.92mm
package body
G Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
840004AG-11
www.icst.com/products/hiperclocks.html
1
REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840004-11
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Number
Name
1
2, 3, 4, 6,
7, 9, 20
F_SEL
Input
Type
nc
Unused
5
OE
Input
8
VDDA
Power
10
11,
12
13, 19
14, 15
17, 18
16
VDD
XTAL_OUT,
XTAL_IN
GND
Q3, Q2,
Q1, Q0
VDDO
Power
Description
Pullup
Frequency select pin. LVCMOS/LVTTL interface levels.
No connect.
Pullup
Output enable pin. When HIGH, the outputs are active. When LOW, the
outputs are in a high impedance state. LVCMOS/LVTTL interface levels.
Analog supply pin.
Core supply pin.
Cr ystal oscillator interface. XTAL_OUT is the output.
XTAL_IN is the input.
Power supply ground.
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
15Ω typical output impedence.
Output supply pin.
Input
Power
Output
Power
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
CIN
Input Capacitance
Test Conditions
Minimum
Typical
4
Maximum
Units
pF
CPD
Power Dissipation Capacitance
TBD
pF
RPULLUP
Input Pullup Resistor
51
kΩ
ROUT
Output Impedance
15
Ω
840004AG-11
VDD, VDDA, VDDO = 3.465V
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2
REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840004-11
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD
4.6V
Inputs, VI
-0.5V to VDD + 0.5 V
Outputs, VO
-0.5V to VDDO + 0.5V
Package Thermal Impedance, θJA
73.2°C/W (0 lfpm)
Storage Temperature, TSTG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C
Symbol
VDD
Parameter
Core Supply Voltage
Test Conditions
Minimum
3.135
Typical
3.3
Maximum
3.465
Units
V
VDDA
Analog Supply Voltage
3.135
3.3
3.465
V
VDDO
Output Supply Voltage
3.135
3.3
3.465
V
IDD
Power Supply Current
90
mA
IDDA
IDDO
Analog Supply Current
Output Supply Current
8
5
mA
mA
TABLE 3B. LVCMOS/LVTTL DC CHARACTERISTICS, VDDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
VIH
Input High Voltage
Test Conditions
Minimum Typical
Maximum
Units
2
VDD + 0.3
V
-0.3
0.8
V
5
µA
VIL
Input Low Voltage
IIH
Input High Current
OE, F_SEL
VDD = VIN = 3.465V
IIL
Input Low Current
OE, F_SEL
VDD = 3.465V, VIN = 0V
-150
µA
VOH
Output High Voltage; NOTE 1
VDDO = 3.3V ± 5%
2.6
V
VOL
Output Low Voltage; NOTE 1
VDDO = 3.3V ± 5%
0. 5
V
NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement Information, 3.3V Output Load Test Circuit.
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Mode of Oscillation
Minimum
Typical
Maximum
Units
Fundamental
Frequency
25
MHz
Equivalent Series Resistance (ESR)
50
Ω
Shunt Capacitance
7
pF
Drive Level
1
mW
NOTE: Characterized using an 18pF parallel resonant cr ystal.
840004AG-11
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3
REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840004-11
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 5A. AC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C
Symbol
Parameter
fOUT
Output Frequency Range
tsk(o)
Output Skew; NOTE 1, 2
tjit(Ø)
tR / tF
RMS Phase Jitter (Random);
NOTE 3
Output Rise/Fall Time
Test Conditions
Minimum
Typical
56
125MHz @ Integration Range:
1.875MHz - 20MHz
62.5MHz @ Integration Range:
1.875MHz - 20MHz
20% to 80%
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4
Units
140
MHz
25
ps
0.70
ps
0.54
ps
470
ps
odc
Output Duty Cycle
50
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VDDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
840004AG-11
Maximum
%
REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
TYPICAL PHASE NOISE
AT
62.5MHZ @3.3V
➤
0
-10
-20
1Gb Ethernet Filter
-30
NOISE POWER dBc
Hz
ICS840004-11
-40
62.5MHz
-50
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.54ps
-60
-70
-80
-90
-100
Raw Phase Noise Data
-110
➤
-120
-130
-140
-150
➤
-160
-170
-180
Phase Noise Result by adding
1Gb Ethernet Filter to raw data
-190
100
1k
10k
100k
1M
10M
100M
OFFSET FREQUENCY (HZ)
TYPICAL PHASE NOISE
0
AT
125MHZ @2.5V
➤
-10
-20
1Gb Ethernet Filter
NOISE POWER dBc
Hz
-30
-40
125MHz
-50
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.70ps
-60
-70
-80
-90
-100
Raw Phase Noise Data
-110
➤
-120
-130
-140
-150
➤
-160
-170
Phase Noise Result by adding
1Gb Ethernet Filter to raw data
-180
-190
100
840004AG-11
1k
10k
100k
OFFSET FREQUENCY (HZ)
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5
1M
10M
100M
REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840004-11
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
PARAMETER MEASUREMENT INFORMATION
1.65V±5%
V
SCOPE
VDD,
VDDA, VDDO
DDO
Qx
2
Qx
LVCMOS
V
DDO
Qy
GND
2
tsk(o)
-1.65V±5%
3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
OUTPUT SKEW
Phase Noise Plot
V
DDO
2
Noise Power
Q0:Q3
t PW
t
Phase Noise Mask
odc =
Offset Frequency
f1
PERIOD
t PW
x 100%
t PERIOD
f2
RMS Jitter = Area Under the Masked Phase Noise Plot
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
RMS PHASE JITTER
80%
Clock
Outputs
80%
20%
20%
tR
tF
OUTPUT RISE/FALL TIME
840004AG-11
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6
REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840004-11
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS840004-11 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VDD, VDDA, and VDDO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01μF bypass
capacitor should be connected to each VDDA.
3.3V
VDD
.01μF
10Ω
VDDA
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS840004-11 has been characterized with 18pF parallel resonant crystals. The capacitor values shown in Figure 2
below were determined using a 25MHz 18pF parallel resonant crystal and were chosen to minimize the ppm error.
XTAL_IN
C1
22p
X1
18pF Parallel Cry stal
XTAL_OUT
C2
22p
ICS84332
Figure 2. CRYSTAL INPUt INTERFACE
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
INPUTS:
OUTPUTS:
CRYSTAL INPUT:
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1kΩ
resistor can be tied from XTAL_IN to ground.
LVCMOS OUTPUT:
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
840004AG-11
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7
REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840004-11
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
RELIABILITY INFORMATION
TABLE 6. θJAVS. AIR FLOW TABLE
FOR
20 LEAD TSSOP
θJA by Velocity (Linear Feet per Minute)
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
0
200
500
114.5°C/W
73.2°C/W
98.0°C/W
66.6°C/W
88.0°C/W
63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS840004-11 is: 1795
840004AG-11
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8
REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - G SUFFIX
ICS840004-11
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
FOR
20 LEAD TSSOP
TABLE 7. PACKAGE DIMENSIONS
Millimeters
SYMBOL
MIN
N
MAX
20
A
--
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
6.40
E
E1
6.60
6.40 BASIC
4.30
e
4.50
0.65 BASIC
L
0.45
0.75
α
0°
8°
aaa
--
0.10
Reference Document: JEDEC Publication 95, MO-153
840004AG-11
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9
REV. A OCTOBER 3, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840004-11
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 8. ORDERING INFORMATION
Part/Order Number
Marking
Package
Shipping Packaging
Temperature
ICS840004AG-11
ICS840004A11
20 Lead TSSOP
tube
0°C to 70°C
ICS840004AG-11T
ICS840004A11
20 Lead TSSOP
2500 tape & reel
0°C to 70°C
ICS840004AG-11LF
ICS40004A11L
20 Lead "Lead-Free" TSSOP
tube
0°C to 70°C
ICS840004AG-11LFT
ICS40004A11L
20 Lead "Lead-Free" TSSOP
2500 tape & reel
0°C to 70°C
NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant.
The aforementioned trademarks, HiPerClockS and FEMTOCLOCKS are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
840004AG-11
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10
REV. A OCTOBER 3, 2005