ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER Description Features The ICS556-04 is a low-skew, crystal input compatible clock buffer with oscillator. This device offers the lowest skew. • • • • • • See the ICS552-02 for a 1-to-8 low skew buffer. For more than eight outputs see the MK74CBxxx BuffaloTM series of clock drivers. Extremely low-skew outputs (50 ps maximum) Packaged in 8-pin SOIC Operating voltages of 2.5 to 5.0 V Low-power CMOS technology Industrial temperature range Available in Pb (lead) free package ICS makes many non-PLL and PLL-based low-skew output devices. Contact ICS for all of your clocking needs. Block Diagram Q0 5 to 27 MHz Crystal or clock X1/ICLK Q1 Crystal Oscillator/ Buffer X2 Q2 Q3 Optional crystal capacitors 1 MDS 556-04 C I n t e gra te d C i r c u i t S y s t e m s ● 525 Race Stre et, San Jo se, CA 9 5126 Revision 030905 ● te l (40 8) 2 97-12 01 ● w w w. i c st . c o m ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER Pin Assignment VDD 1 8 Q4 X 1 / I CL K 2 7 Q3 X2 3 6 Q2 GN D 4 5 Q1 8 - p i n ( 1 5 0 mi l ) S OI C Pin Descriptions Pin Number Pin Name Pin Type Pin Description 1 VDD Power Connect to +2.5 V, +3.3 V or +5.0 V. 2 X1/ICLK Input Crystal or clock input (5 V tolerant input). Connect to 5 to 27 MHz input. 3 X2 Input Connect to a fundamental mode crystal. Leave open for clock input. 4 GND Power Connect to ground. 5 Q1 Output Clock Output 1. 6 Q2 Output Clock Output 2. 7 Q3 Output Clock Output 3. 8 Q4 Output Clock Output 3. External Components A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01 µF should be connected between VDD on pin 1 and GND on pin 4, as close to the device as possible. A 33Ω series terminating resistor may be used on each clock output if the trace is longer than 1 inch. To achieve the low output skew that the ICS556-04 is capable of, careful attention must be paid to board layout. Essentially, all four outputs must have identical terminations, identical loads, and identical trace geometries. If not, the output skew will be degraded. For example, using a 30Ω series termination on one output (with 33Ω on the others) will cause at least 15 ps of skew. Crystal Information The crystal used should be a fundamental mode (do not use third overtone), parallel resonant. Crystal capacitors should be connected from pins X1 to ground and X2 to ground to optimize the initial accuracy. The value of these capacitors is given by the following equation: Crystal caps (pF) = (CL - 6) x 2 In the equation, CL is the crystal load capacitance. So, for a crystal with a 16 pF load capacitance, two 20 pF [(16-6) x 2] capacitors should be used. 2 MDS 556-04 C In te grated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 030905 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS556-04. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V Output Enable and All Outputs -0.5 V to VDD+0.5 V ICLK -0.5 V to 5.5 V Ambient Operating Temperature -40 to +85 °C Storage Temperature -65 to +150°C Junction Temperature 125°C Soldering Temperature 260°C Recommended Operation Conditions Parameter Min. Max. Units -40 +85 °C +2.375 +5.25 V Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Typ. DC Electrical Characteristics VDD=2.5 V ±5%, Ambient temperature -40 to +85 °C, unless stated otherwise Parameter Symbol Conditions Min. Operating Voltage VDD 2.375 Input High Voltage VIH 2.0 Input Low Voltage VIL Output High Voltage VOH IOH = -12 mA Output Low Voltage VOL IOL = 12 mA Operating Supply Current IDD No load, 27MHz Nominal Output Impedance Short Circuit Current ● Max. Units 2.625 V V 0.8 2 V V 0.4 V 25 mA ZO 20 Ω IOS ±28 mA 3 MDS 556-04 C In te grated Circuit Systems Typ. 525 Ra ce Street, San Jose, CA 9512 6 Revision 030905 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER DC Electrical Characteristics (continued) VDD=3.3 V ±5% , Ambient temperature -40 to +85 °C, unless stated otherwise Parameter Symbol Conditions Min. Operating Voltage VDD 3.15 Input High Voltage VIH 2.0 Input Low Voltage VIL Output High Voltage VOH IOH = -25 mA Output Low Voltage VOL IOL = 25 mA Output High Voltage (CMOS Level) VOH IOH = -12 mA Operating Supply Current IDD No load, 27 MHz Nominal Output Impedance Short Circuit Current Typ. Max. Units 3.45 V V 0.8 2.4 V V 0.4 VDD-0.4 V V 35 mA ZO 20 Ω IOS ±50 mA VDD=5 V ±5% , Ambient temperature -40 to +85 °C, unless stated otherwise Parameter Symbol Conditions Min. Operating Voltage VDD 4.75 Input High Voltage VIH 2.0 Input Low Voltage VIL Output High Voltage VOH IOH = -35 mA Output Low Voltage VOL IOL = 35 mA Output High Voltage (CMOS Level) VOH IOH = -12 mA Operating Supply Current IDD No load, 27 MHz Nominal Output Impedance Short Circuit Current Typ. Max. Units 5.25 V V 0.8 2.4 V V 0.4 VDD-0.4 V V 45 mA ZO 20 Ω IOS ±80 mA Notes: 1. Nominal switching threshold is VDD/2 4 MDS 556-04 C In te grated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 030905 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER AC Electrical Characteristics VDD = 2.5 V ±5%, Ambient Temperature -40 to +85 °C, unless stated otherwise Parameter Symbol Conditions Min. Input Frequency Typ. 5 Max. Units 27 MHz Output Rise Time tOR 0.8 to 2.0 V, CL=15 pF 1.8 2.5 ns Output Fall Time tOF 2.0 to 0.8 V, CL=15 pF 1.8 2.5 ns Note 1 Rising edges at VDD/2 0 50 ps 50 55 % Output to output skew Duty Cycle Measured at VDD/2 45 VDD = 3.3 V ±5%, Ambient Temperature -40 to +85 °C, unless stated otherwise Parameter Symbol Conditions Min. Input Frequency Typ. 5 Max. Units 27 MHz Output Rise Time tOR 0.8 to 2.0 V, CL=15 pF 0.6 1.0 ns Output Fall Time tOF 2.0 to 0.8 V, CL=15 pF 0.6 1.0 ns Note 1 Rising edges at VDD/2 0 50 ps 50 55 % Output to output skew Duty Cycle Measured at VDD/2 45 Phase Noise at 1MHz from carrier -125 Clock Jitter RMS 1KHz to 1MHz dBc/Hz 6 ps VDD = 5 V ±5%, Ambient Temperature -40 to +85 °C, unless stated otherwise Parameter Symbol Conditions Min. Input Frequency Typ. 5 Max. Units 27 MHz Output Rise Time tOR 0.8 to 2.0 V, CL=15 pF 0.3 0.7 ns Output Fall Time tOF 2.0 to 0.8 V, CL=15 pF 0.3 0.7 ns Note 1 Rising edges at VDD/2 0 50 ps 45 50 55 % Min. Typ. Max. Units Output to output skew Duty Cycle Measured at VDD/2 Notes: 1. Between any two outputs with equal loading. Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Conditions θJA Still air 150 °C/W θJA 1 m/s air flow 140 °C/W θJA 3 m/s air flow 120 °C/W 40 °C/W θJC 5 MDS 556-04 C In te grated Circuit Systems Symbol ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 030905 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m ICS556-04 LOW SKEW 1 TO 4 CLOCK BUFFER Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 8 E Inches Symbol Min Max Min Max A 1.35 1.75 .0532 .0688 A1 0.10 0.25 .0040 .0098 B 0.33 0.51 .013 .020 C 0.19 0.25 .0075 .0098 D 4.80 5.00 .1890 .1968 E 3.80 4.00 .1497 .1574 H INDEX AREA e 1 2 D 1.27 BASIC 0.050 BASIC H 5.80 6.20 .2284 .2440 h 0.25 0.50 .010 .020 L 0.40 1.27 .016 .050 α 0° 8° 0° 8° A h x 45 A1 C -Ce SEATING PLANE B L .10 (.004) C Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature ICS556M-04I ICS556M-04IT ICS556M-04ILF ICS556M-04ILFT 556M-04I 556M-04I 556M04IL 556M04IL Tubes Tape and Reel Tubes Tape and Reel 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC -40 to +85°C -40 to +85°C -40 to +85°C -40 to +85°C “LF” denotes Pb free package. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 6 MDS 556-04 C In te grated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 030905 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m