Digital Step Attenuator
507 DC-2400 MHz
31 dB, 1 dB Step
5 Bit, Parallel Control Interface, Dual Supply Voltage
Product Features
• Dual Supply Voltage: VDD=+3V, VSS=-3V
• Immune to latch up
• Excellent accuracy, 0.1 dB Typ
• Parallel control interface
• Fast switching control frequency, 1 MHz typ.
• Low Insertion Loss
• High IP3, +52 dBm Typ
• Very low DC power consumption
• Excellent return loss, 20 dB Typ
• Small size 4.0 x 4.0 mm
DAT-31-PN+
DAT-31-PN
+ RoHS compliant in accordance
with EU Directive (2002/95/EC)
The +Suffix identifies RoHS Compliance. See our web site
for RoHS Compliance methodologies and qualifications.
Typical Applications
• Base Station Infrastructure
• Portable Wireless
• CATV & DBS
• MMDS & Wireless LAN
• Wireless Local Loop
• UNII & Hiper LAN
• Power amplifier distortion canceling loops
General Description
The DAT-31-PN is a 507 RF digital step attenuator that offers an attenuation range up to 31 dB in 1.0 dB
steps. The control is a 5-bit parallel interface, operating on dual supply voltage: VDD=+3V, VSS=-3V. The
DAT-31-PN is produced using a unique CMOS process on silicon, offering the performance of GaAs, with
the advantages of conventional CMOS devices.
Simplified Schematic
RF Input
16dB
8dB
4dB
2dB
1dB
RF Out
Parallel Control
Latch Enable
Control Logic Interface
REV. C
M112685
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071025
Page 1 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
RF Electrical Specifications, DC-2400 MHz, TAMB=25°C, VDD=+3V, VSS=-3V
Parameter
Freq. Range
(GHz)
Min.
Typ.
DC-1
—
1-2.4
—
DC-1
1-2.4
Max.
Units
0.02
0.1
dB
0.05
0.15
dB
—
0.05
0.15
dB
—
0.15
0.25
dB
DC-1
—
0.07
0.2
dB
1-2.4
—
0.15
0.25
dB
DC-1
—
0.03
0.2
dB
1-2.4
—
0.15
0.25
dB
DC-1
—
0.1
0.3
dB
Accuracy @ 1 dB Attenuation Setting
Accuracy @ 2 dB Attenuation Setting
Accuracy @ 4 dB Attenuation Setting
Accuracy @ 8 dB Attenuation Setting
Accuracy @ 16 dB Attenuation Setting
Insertion Loss(note1) @ all attenuator set to 0dB
(note 2)
Input IP3
(at Min. and Max. Attenuation)
Input Power @ 0.2dB Compression (note 2)
(at Min. and Max. Attenuation)
VSWR
1-2.4
—
0.15
0.3
dB
DC-1
—
1.3
1.9
dB
1-2.4
—
1.6
2.4
dB
DC-2.4
—
+52
—
dBm
DC-2.4
—
+24
—
dBm
DC-1
—
1.2
1.5
—
1-2.4
—
1.2
1.5
—
Notes:
1. I. Loss values are de-embedded from test board Loss (test board’s Insertion Loss: 0.10dB @100MHz, 0.35dB @1000MHz,
0.60dB @2400MHz, 0.75dB @4000MHz)
2. Input IP3 and 1dB compression degrades below 1 MHz
DC Electrical Specifications
Parameter
Min.
Typ.
Max.
Units
V
VDD, Supply Voltage
2.7
3
3.3
VSS, Supply Voltage
-3.3
-3
-2.7
V
—
—
100
μA
Control Input Low
—
—
0.3xVDD
V
Control Input High
0.7xVDD
—
—
V
—
—
1
μA
IDD (ISS), Supply Current
Control Current
Switching Specifications
Parameter
Min.
Typ.
Max.
Units
Switching Speed, 50% Control to 0.5dB
of Attenuation Value
—
1.0
—
μSec
Switching Control Frequency
—
1.0
—
MHz
Absolute Maximum Ratings
Parameter
Ratings
Operating Temperature
Storage Temperature
VDD
-4V Min., 0.3V Max.
Voltage on any input
ESD, MM
Input Power
-55°C to 100°C
-0.3V Min., 4V Max.
VSS
ESD, HBM
-40°C to 85°C
-0.3V Min., VDD+0.3V Max.
500V
100V
+24dBm
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Page 2 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
N/C
PUP1
7
Power-up selection
GND
4
PUP2
8
Power-up selection
LE
5
VDD
9
Positive Supply Voltage
GND
10
Ground connection
GND
11
Ground connection
VSS
12
Negative Supply Voltage
GND
13
Ground connection
RF out
14
RF out port (Note 1)
C8
15
Control for attenuation bit, 8 dB
C4
16
Control for attenuation bit, 4 dB
C2
17
Control for attenuation bit, 2 dB
GND
18
Ground Connection
C1
19
Control for attenuation bit, 1 dB
N/C
20
Not connected (Note 4)
GND
Paddle
Paddle ground (Note 5)
C2
C4
Positive Supply Voltage
3
16
6
2
17
VDD
RFin
2x2mm
Paddle
ground
10
Latch Enable Input (Note 2)
VDD
5
1
GND
LE
C16
GND
Ground connection
18
4
9
Not connected (Note 4)
GND
8
RF in port (Note 1)
3
PUP2
2
N/C
C1
RF in
19
Control for Attenuation bit, 16dB (Note 3)
7
1
PUP1
C16
Description
N/C
Pin
Number
6
Function
20
Pin Configuration (Top View)
VDD
Pin Description
15
C8
14
RFout
13
GND
12
VSS
11
GND
Notes:
1. Both RF ports must be held at 0VDC or DC blocked with an external series capacitor.
2. Latch Enable (LE) has an internal 100K7 resistor to VDD.
3. Place a 10K7 resistor in series, as close to pin as possible to avoid freq. resonance.
4. Place a shunt 10K7resistor to GND
5. The exposed solder pad on the bottom of the package (See Pin configuration) must
be grounded for proper device operation.
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Page 3 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
Typical Performance Curves
INSERTION LOSS (Ref) @ +25°C, +85°C, -45°C
7
ATTENUATION (1dB) @ +25°C, +85°C, -45°C
1.5
1.4
-45°C
1.3
+25°C
6
+85°C
+85°C
+25°C
5
1.2
1.1
4
(dB)
(dB)
-45°C
3
1
0.9
0.8
2
0.7
1
0.6
0
0.5
0
500
1000
1500
2000
2500
3000
3500
4000
0
500
1000
1500
Frequency (MHz)
ATTENUATION (2dB) @ +25°C, +85°C, -45°C
2.5
2.4
4.3
2.2
4.2
2.1
4.1
(dB)
(dB)
3000
3500
4000
-45°C
+25°C
+85°C
4.4
2
4
1.9
3.9
1.8
3.8
1.7
3.7
1.6
3.6
1.5
3.5
0
500
1000
1500
2000
2500
3000
3500
4000
0
500
1000
1500
Frequency (MHz)
8.3
2500
3000
3500
4000
ATTENUATION (16dB) @ +25°C, +85°C, -45°C
17
-45°C
+25°C
+85°C
8.4
2000
Frequency (MHz)
ATTENUATION (8dB) @ +25°C, +85°C, -45°C
8.5
16.8
-45°C
16.6
+25°C
+85°C
8.2
16.4
8.1
16.2
(dB)
(dB)
2500
ATTENUATION (4dB) @ +25°C, +85°C, -45°C
4.5
-45°C
+25°C
+85°C
2.3
2000
Frequency (MHz)
8
16
7.9
15.8
7.8
15.6
7.7
15.4
7.6
15.2
15
7.5
0
500
1000
1500
2000
2500
3000
3500
4000
0
500
1000
1500
2000
2500
3000
3500
4000
Frequency (MHz)
Frequency (MHz)
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Page 4 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
Typical Performance Curves
ATTENUATION (31dB) @ +25°C, +85°C, -45°C
32
-45°C
31
+25°C
+85°C
(dB)
30
29
28
27
26
0
500
1000
1500
2000
2500
3000
3500
4000
Frequency (MHz)
RETURN LOSS IN S11 (REF) @ +25°C, +85°C, -45°C
50
RETURN LOSS OUT S22 (REF) @ +25°C, +85°C, -45°C
50
-45°C
+25°C
+85°C
-45°C
40
40
+25°C
+85°C
30
(dB)
(dB)
30
20
20
10
10
0
0
0
500
1000
1500
2000
2500
3000
3500
4000
0
500
1000
1500
Frequency (MHz)
RETURN LOSS IN S11 (Major Attenuation Steps)@+25°C
2500
3000
3500
4000
50
(dB)
40
30
RETURN LOSS IN S11 (Major Attenuation Steps)@+25°C
60
ATT=0dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31dB
ATT=0dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31dB
50
40
(dB)
60
2000
Frequency (MHz)
30
20
20
10
10
0
0
0
500
1000
1500
2000
2500
3000
3500
4000
0
500
1000
1500
2000
2500
3000
3500
4000
Frequency (MHz)
Frequency (MHz)
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Page 5 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
Typical Performance Curves
IP-3 INPUT (Major Attenuation Steps) @ +85°C
IP-3 INPUT (Major Attenuation Steps) @ +25°C
70
70
60
60
50
50
(dBm)
(dBm)
40
ATT=0dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31dB
30
20
10
40
ATT=0dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31dB
30
20
10
0
0
0
200
400
600
800
1000 1200 1400 1600 1800 2000 2200 2400
0
200
400
600
800
Frequency (MHz)
1000 1200 1400 1600 1800 2000 2200 2400
Frequency (MHz)
IP-3 INPUT (Major Attenuation Steps) @ -45°C
COMPRESSION @INPUT POWER=+24dBm (+25°C)
0.2
70
60
0
-0.2
40
(dB)
(dBm)
50
ATT=0dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31dB
30
20
10
ATT=0dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31dB
-0.4
-0.6
-0.8
0
0
200
400
600
800
0
1000 1200 1400 1600 1800 2000 2200 2400
200
400
600
800
COMPRESSION @INPUT POWER=+24dBm (+85°C)
0.2
-0.2
(dB)
-0.2
(dB)
0
ATT=0dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31dB
-0.6
COMPRESSION @INPUT POWER=+24dBm (-45°C)
0.2
0
-0.4
1000 1200 1400 1600 1800 2000 2200 2400
Frequency (MHz)
Frequency (MHz)
ATT=0dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=16dB
ATT=31dB
-0.4
-0.6
-0.8
-0.8
0
200
400
600
800
1000 1200 1400 1600 1800 2000 2200 2400
0
200
400
600
800
1000 1200 1400 1600 1800 2000 2200 2400
Frequency (MHz)
Frequency (MHz)
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Page 6 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
Outline Drawing (DG983-1)
PCB Land Pattern
Suggested Layout,
Tolerance to be within ±.002
Device Marking
31
Outline Dimensions (inch
mm )
WT.
GRAMS
A
B
C
D
E
F
G
H
J
K
L
M
N
P
Q
R
.157
.157
.035
.008
.081
.081
.010
—
.022
.020
.166
.166
.070
.012
.026
.070
4.00
4.00
0.90
0.20
2.06
2.06
0.25
—
0.56
0.50
4.22
4.22
1.78
0.31
0.66
1.78
.04
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Page 7 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
Suggested Layout for PCB Design (PL-188)
The suggested Layout shows only the footprint area of the DAT, and the components located near this area
(i.e.: R1, R2, R7). For the complete Layout, see photo and schematic diagram on page 11 of 12.
NOTES:
1. TRACE WIDTH IS SHOWN FOR FR4 WITH DIELECTRIC THICKNESS.
.025” ±.002”. COPPER: 1/2 OZ. EACH SIDE.
FOR OTHER MATERIALS TRACE WIDTH MAY NEED TO BE MODIFIED.
2. 0603, 0402 SIZE CHIP FOOT PRINTS SHOWN FOR REFERENCE,
VALUES OF RESISTORS WILL VARY BASED ON APPLICATION.
3. BOTTOM SIDE OF THE PCB IS CONTINUOUS GROUND PLANE.
DENOTES PCB COPPER LAYOUT WITH SMOBC
(SOLDER MASK OVER BARE COPPER)
DENOTES COPPER LAND PATTERN FREE OF SOLDERMASK
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Page 8 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
Simplified Schematic
RF Input
16dB
8dB
4dB
2dB
1dB
RF Out
Parallel Control
Control Logic Interface
Latch Enable
The DAT-31-PN parallel interface consists of 5 control bits that select the desired attenuation state, as
shown in Table 1: Truth Table
Table 1. Truth Table
Attenuation
State
C16
C8
C4
C2
C1
Reference
0
0
0
0
0
1 (dB)
0
0
0
0
1
2 (dB)
0
0
0
1
0
4 (dB)
0
0
1
0
0
8 (dB)
0
1
0
0
0
16 (dB)
1
0
0
0
0
31 (dB)
1
1
1
1
1
Note: Not all 32 possible combinations of C1 - C16 are shown in table
The parallel interface timing requirements are defined by Figure 1 (Parallel Interface Timing Diagram) and
Table 2 (Parallel Interface AC Characteristics), and switching speed.
For latched parallel programming the Latch Enable (LE) should be held LOW while changing attenuation
state control values, then pulse LE HIGH to LOW (per Figure 1) to latch new attenuation state into device.
For direct parallel programming, the Latch Enable (LE) line should be pulled HIGH. Changing attenuation
state control values will change device state to new attenuation. Direct mode is ideal for manual control of
the device (using hardwire, switches, or jumpers).
Figure 1: Parallel Interface Timing Diagram
Table 2. Parallel Interface AC Characteristics
LE
Symbol
Parallel Data
C16:C1
tPDSUP
tLEPW
Parameter
Min.
Max.
Units
tLEPW
LE minimum pulse width
10
ns
tPDSUP
Data set-up time before
clock rising edge of LE
10
ns
tPDHLD
Data hold time after clock
falling edge of LE
10
ns
tPDHLD
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Page 9 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
Pin 20 must always be low to prevent the attenuator from entering an unknown state.
Power-up Control Settings
The DAT-31-PN always assumes a specifiable attenuation setting on power-up, allowing a known attenuation state to be established before an initial parallel control word is provided.
When the attenuator powers up with LE=0, the control bits are automatically set to one of four possible values .These four values are selected by the two power-up control bits,PUP1 and PUP2 ,as shown in Table 3:
(Power-Up Truth Table, Parallel Mode).
Table 3. Power-Up Truth Table, Parallel Mode
Attenuation State
PUP1
PUP2
LE
Reference
0
0
0
8 (dB)
0
1
0
16 (dB)
1
0
0
31 (dB)
1
1
0
Defined by C1-C16
(See Table 1-Truth Table)
X (Note 1)
X (Note 1)
1
Note 1: PUP1 and PUP2 Connection may be 0, 1, GROUND, or not connect, without effect on attenuation state.
Power-Up with LE=1 provides normal parallel operation with C1-C16, and PUP1 and PUP2 are not active.
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Page 10 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
1
2
GND
VDD
13
12
11
5
6
7
8
C1
C4
C8
GND
3
10
4
C2
2
C0.5
1
C16
DC SUPPLY
J2.2
GND
TB-340 Evaluation Board Schematic Diagram
9
8
IC1
14
1
2
3
PARALLEL
CONTROL
J1.1
13
7
4
5
12
11
1
+ C1
9
8
IC2
714
6
10
2
7
3
4
5
6
C2
C4
C6
R2
C16
R9
19
18
16
15
2
14
17
DAT
N/C
IC3 6
11
10
+
GND
GND
VDD
9
C13
2
3
4
GND
C10
1
Vss
R11
+
5
GND
C11
R10
LE CONTROL
J1.2
8
PUP2
7
VDD
1
6
PUP1
R8
C12
12
VDD
LE
GND
5
LE
2
RFout
GND
Vss
2
C9
13
4
GND
R6
C8
RFout
3
1
R5
C4
C2
1
RFin
R7
C8
R4
C1
20
RFin
C7
R3
N/C
R1
GND
C3
C5
DC SUPPLY
J2.1
Bill of Materials
R1 - R8
Resistor 0603 10 KOhm +/- 1%
R10, R11
Resistor 0603 470 Ohm +/- 1%
R9
Resistor 0402 10 KOhm +/- 1%
C2 - C10 & C13 NPO Capacitor 0603 100pF +/- 5%
C1, C11 & C12
Tantalum Capacitor 100nF +/- 10%
IC1, IC2
Hex inverting Schmitt trigger MM74HC14
IC3
Dual non-inverting Schmitt trigger SN74LVC2G17
TB-340
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Page 11 of 12
DAT-31-PN+
DAT-31-PN
Digital Step Attenuator
Tape and Reel Packaging Information
Table T&R
TR
No.
No. of Devices
Designation
Letter
Reel Size
3000
T
13 inch
T-005
multiples of 10,
less than full
reel of 3K
PR
13 inch
multiples of 10,
on tape only
E
not
applicable
Tape
Width
Pitch
12 mm
8 mm
Unit
Orientation
Tape
Cavity
Direction of Feed
Ordering Information
Model No.
Description
DAT-31-PN (+)
Parallel Interface,
Dual Voltage (Negative
and Positive)
TB-340
Test Board Only
Packaging
Designation Letter
(See Table T&R)
Quantity
Min.
No. of Units
Price
$
Ea.
E
10
$3.55
Not Applicable
1
$79.95
How to Order
Example: 3000 pieces of DAT-31-PN+
3K
DAT-31-PN+
Quantity
Model No.
T&R=T
T&R designation letter (see Table T&R)
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Page 12 of 12