AZDISPLAYS P0430WQLB-T

Document No.:
Tentative Product Specification
Module name: P0430WQLB-T
Issue date: 2009/06/02
Version: 1.7
Customer
Approved by Customer
Approved by CMEL
PD Division
ENG Division
QA Dept
FOR MORE INFORMATION:
AZ DISPLAYS, INC.
75 COLUMBIA, ALISO VIEJO, CA 92656
Http://www.AZDISPLAYS.com
Note:
1.
The information contained herein may be change without prior notice. It is therefore advisable to contact CHI MEI EL
Corp. before designed your product based on this specification.
2.
This tentative product specification is for reference, some item or setting maybe changed for evaluation.
1
Document No.:
Reversion History
Version
Date
Page
Ver.1.0
Ver.1.1
2007/12/26
2008/03/19
Ver.1.2
2008/04/08
Ver.1.3
Ver.1.4
2008/07/21
2008/09/24
Ver.1.5
Ver.1.6
Ver.1.7
2008/10/02
2008/11/21
2009/06/02
All
10,11,12
15,16,17
18
10
14
19
20
9,10,11
3
18
19
9
9,10,11
19
21
Description
Tentative specification was first issued
Add IC Initial Register Setting
Modify Pin Assignment
Change External Dimension
Change Typical Luminance
Add System Diagram
Add Reliability Test
Add Package Drawing
Modify Electro-Optical Characteristic
Add Weight of Mechanical Data
Add Test and Measurement Conditions
Modify Package Drawing
Modify Life Time
Modify Electro-Optical Characteristic
Change CIE and Gamma
Add Handling, Storage, Panel ID Label Naming
Rule and Warranty
2
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1. Purpose:
This documentation defines general product specification for OLED module supplied by
CMEL. The information described in this technical specification is tentative. Please Contact
CMEL’s representative while your product is modified.
2. General Description:
Driving Mode: Active Matrix
Color Mode: Full Color (16M color)
Driver IC: HX5116, COG Assembly
Interface: 8bit serial RGB and 24bit parallel RGB interface
Application: Portable DVD, PMP, GPS, Photo Frame etc.
RoHS Compatible
3. Mechanical Data:
No.
Items
Specification
Unit
1
Diagonal Size
4.3
Inch
2
Resolution
480 x RGB x 272
3
Pixel Pitch
198 x 198
um
4
Active Area
95.0 x 53.8
mm
5
Outline Area
103.5 x 67
mm
6
Thickness
3.15
mm
7
Weight
54
g
4. Absolute Maximum Ratings:
Absolute ratings of environment:
Item
Symbol
Value
Min.
Max.
Unit
Note
Storage Temperature
TST
-40
+85
ºC
(1)
Operating Ambient Temperature
TOP
-20
+60
ºC
(2)
Note (1) The storage duration for both critical temperature (-40 & 85℃) meet reliability test criteria.
(2) The operating duration for both critical temperature (-20 & 60℃) meet reliability test criteria.
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5. Electrical Characteristic:
DC Characteristic
DC Characteristics
(Unless otherwise specified, Voltage Referenced to VSS = 0V, VCC = 1.5 to 3.6V, TA = -20 to 70C)
Parameter
Symbol
Test condition
Min.
Typ.
Max.
Unit
VCC
-
1.5
-
3.6
V
VCI
-
3.0
-
3.6
V
DDVDH Output Voltage 1
DDVDH
Set CP1X=0
4.9
5.1
5.3
V
DDVDH Output Voltage 2
DDVDH
Set CP1X=1
5.8
6.0
6.2
V
VGAM1OUT Output Voltage 1
VGAM1OUT
Set CP1X=0
4.7
4.8
4.9
V
VGAM1OUT Output Voltage 2
VGAM1OUT
Set CP1X=1
5.7
5.8
5.9
V
Gate driver High Output Voltage
VGH
-
+3
-
+8
V
Gate driver Low Output Voltage
VGL
-
-8
-
-3
V
OLED Diode Refer Voltage
ARREF
-
-8
-
+8
V
Logic High Output Voltage
VOH
Iout=-400µA
0.8 * VCC
-
VCC
V
Logic Low Output Voltage
VOL
Iout=400µA
0
-
0.2 * VCC
V
Logic High Input voltage
VIH
0.8 * VCC
-
VCC
V
Logic Low Input voltage
VIL
0
-
0.2 * VCC
V
System power supply pins of the
logic block
Booster Reference Supply Voltage
Range
-
Logic Input Current
IIL/IIH
No pull up or pull low
-1
-
1
µA
Pull high resistance
RH
Pull up pins
600
900
1200
KΩ
Pull low resistance
RL
Pull low pins
600
900
1200
KΩ
High Output Current
IOH
50
-
-
µA
Low Output Current
IOL
-
-
-50
µA
Output leakage Current
IOZ
-1
-
1
µA
Output voltage offset
VOS
Output voltage deviation
VOD
Analog standby current
ISTB
Analog operating current
IVCI
Logic Pins Input Capacitance
CIN
S1~S107,
Vo=4.9V vs. 4V
S1~S107,
Vo=0.1V vs. 1V
S1~S107,
Vo=0.1V~DDVDH-0.1V
S1~S107,
Vo=0.1V~DDVDH-0.1V
VCI=3.0V,
Stand by mode
VCI=3.0V,
S1~S160 no load
-
4
-
±10
mV
±10
mV
-
10
uA
-
20
mA
5
7.5
pF
Document No.:
AC Characteristic
AC Electrical Characteristics
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Clock and Data input waveforms
Define the HSYNC to VSYNC timing for RGB mode
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5.2.2 480RGB X 272 serial RGB interface
5.2.2 480RGB X 272 parallel RGB interface
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Serial RGB Horizontal Data Format
Parallel RGB Horizontal Data Format
Digital RGB Vertical Data Format
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6. Electro-Optical Characteristic:
Items
Symbol
Operating Luminance
L
Power Consumption
Min
Max
Unit
Remark
2
160
184
Cd/m
(1)(5)
Pon
700
950
mW
30% pixels
on (1)
Maximum Current
Icc
220
302
mA
(1)
Response Time
Tres
50
uS
(2)
CIEx (White)
Wx
0.23
0.28
0.33
-
(5)
CIEy (White)
Wy
0.25
0.30
0.35
-
(5)
CIEx (Red)
Rx
0.615
0.655
0.695
-
(5)
CIEy( Red)
Ry
0.300
0.340
0.380
-
(5)
CIEx (Green)
Gx
0.195
0.235
0.275
-
(5)
CIEy( Green)
Gy
0.610
0.650
0.690
-
(5)
CIEx (Blue)
Bx
0.100
0.140
0.180
-
(5)
CIEy( Blue)
By
0.105
0.145
0.185
-
(5)
Viewing Angle
VA
160
170
Degree
(3)
Contrast
CR
5000:1
10000:1
LTop
30000
Operation Lifetime
136
Typ.
(4)
Hrs
(1)(6)
Note:
Measuring surrounding: dark room
Surrounding temperature: 25oC
1. Test condition:
a. AR_VDD= 5.2V +/-0.03V, AR_VSS= -4.8V +/-0.03V
b. IC Initial Register Setting:
24-bit parallel RGB (DE)
Ver. 5
Index_out(0x04);
Parameter_out(0x23); //set display mode 24-bit parallel RGB (DE)
Index_out(0x05);
Parameter_out(0x82); //set display mode
Index_out(0x07);
Parameter_out(0x0F); //set driver capability
Index_out(0x34);
Parameter_out(0x18); //set display timing
Index_out(0x35);
Parameter_out(0x28); //set display timing
Index_out(0x36);
Parameter_out(0x16); //set display timing
Index_out(0x37);
Parameter_out(0x01); //set display timing
Index_out(0x02);
Parameter_out(0x02); //OTP On
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Index_out(0x0A);
Parameter_out(0x8A); //VGHVGL=+/-6V
Index_out(0x09);
Parameter_out(0x26); //VGAM1OUT=4.95V
Index_out(0x10);
Parameter_out(0x7A); //set R slop
Index_out(0x11);
Parameter_out(0x78); //set G slop
Index_out(0x12);
Parameter_out(0x75); //set B slop
Index_out(0x13);
Parameter_out(0x00); //set R_0
Index_out(0x14);
Parameter_out(0x02); //set R_10
Index_out(0x15);
Parameter_out(0x00); //set R_36
Index_out(0x16);
Parameter_out(0x01); //set R_80
Index_out(0x17);
Parameter_out(0x01); //set R_124
Index_out(0x18);
Parameter_out(0x01); //set R_168
Index_out(0x19);
Parameter_out(0x01); //set R_212
Index_out(0x1A);
Parameter_out(0x04); //set R_255
Index_out(0x1B);
Parameter_out(0x00); //set G_0
Index_out(0x1C);
Parameter_out(0x07); //set G_10
Index_out(0x1D);
Parameter_out(0x03); //set G_36
Index_out(0x1E);
Parameter_out(0x03); //set G_80
Index_out(0x1F);
Parameter_out(0x05); //set G_124
Index_out(0x20);
Parameter_out(0x05); //set G_168
Index_out(0x21);
Parameter_out(0x03); //set G_212
Index_out(0x22);
Parameter_out(0x0A); //set G_255
Index_out(0x23);
Parameter_out(0x00); //set B_0
Index_out(0x24);
Parameter_out(0x03); //set B_10
Index_out(0x25);
Parameter_out(0x01); //set B_36
Index_out(0x26);
Parameter_out(0x00); //set B_80
Index_out(0x27);
Parameter_out(0x00); //set B_124
Index_out(0x28);
Parameter_out(0x00); //set B_168
Index_out(0x29);
Parameter_out(0x00); //set B_212
Index_out(0x2A);
Parameter_out(0x01); //set B_255
Index_out(0x06);
Parameter_out(0x03); //set display on
AR_VDD= +5.2V
AR_VSS= -4.8V
8-bit serial RGB (DE)
Ver. 5
Index_out(0x04);
Parameter_out(0x21); //set display mode 8-bit serial RGB (DE)
Index_out(0x05);
Parameter_out(0x82); //set display mode
Index_out(0x07);
Parameter_out(0x0F); //set driver capability
Index_out(0x34);
Parameter_out(0x48); //set display timing
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Index_out(0x35);
Parameter_out(0x78); //set display timing
Index_out(0x36);
Parameter_out(0x42); //set display timing
Index_out(0x37);
Parameter_out(0x01); //set display timing
Index_out(0x02);
Parameter_out(0x02); //OTP On
Index_out(0x0A);
Parameter_out(0x8A); //VGHVGL=+/-6V
Index_out(0x09);
Parameter_out(0x26); //VGAM1OUT=4.95V
Index_out(0x10);
Parameter_out(0x7A); //set R slop
Index_out(0x11);
Parameter_out(0x78); //set G slop
Index_out(0x12);
Parameter_out(0x75); //set B slop
Index_out(0x13);
Parameter_out(0x00); //set R_0
Index_out(0x14);
Parameter_out(0x02); //set R_10
Index_out(0x15);
Parameter_out(0x00); //set R_36
Index_out(0x16);
Parameter_out(0x01); //set R_80
Index_out(0x17);
Parameter_out(0x01); //set R_124
Index_out(0x18);
Parameter_out(0x01); //set R_168
Index_out(0x19);
Parameter_out(0x01); //set R_212
Index_out(0x1A);
Parameter_out(0x04); //set R_255
Index_out(0x1B);
Parameter_out(0x00); //set G_0
Index_out(0x1C);
Parameter_out(0x07); //set G_10
Index_out(0x1D);
Parameter_out(0x03); //set G_36
Index_out(0x1E);
Parameter_out(0x03); //set G_80
Index_out(0x1F);
Parameter_out(0x05); //set G_124
Index_out(0x20);
Parameter_out(0x05); //set G_168
Index_out(0x21);
Parameter_out(0x03); //set G_212
Index_out(0x22);
Parameter_out(0x0A); //set G_255
Index_out(0x23);
Parameter_out(0x00); //set B_0
Index_out(0x24);
Parameter_out(0x03); //set B_10
Index_out(0x25);
Parameter_out(0x01); //set B_36
Index_out(0x26);
Parameter_out(0x00); //set B_80
Index_out(0x27);
Parameter_out(0x00); //set B_124
Index_out(0x28);
Parameter_out(0x00); //set B_168
Index_out(0x29);
Parameter_out(0x00); //set B_212
Index_out(0x2A);
Parameter_out(0x01); //set B_255
Index_out(0x06);
Parameter_out(0x03); //set display on
AR_VDD= +5.2V
AR_VSS= -4.8V
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2. Response Time test condition
Tf
Tr
100%
90%
10%
Time
3. Viewing angle test condition:
4. Contrast
Luminance with all pixels white
CR =
Luminance with all pixels black
5. Optical tester: CA210
6. Brightness of 30% power consumption. Operating Life Time is defined when the
luminance has decayed to less than 50% of the initial measured luminance before life test.
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7. System Diagram:
HOSTs
HX5116
SDA
SCL
NCS
NRESET
Serial
Interface
DCLK
VSYNC
HSYNC
DE
DB (24bit)
RGB
Interface
DB(24bit)
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8. Pin Assignment:
PIN
Symbol
I/O
Description
1 TP1
I
Touch panel P1
2 TP2
I
Touch panel P2
3 TP3
I
Touch panel P3.
4 TP4
I
Touch panel P4
5 AR_VSS
I
Negative voltage for OLED
6 AR_VSS
I
Negative voltage for OLED
7 TEST1_VS
open CMEL test pin, it must be open.
8 AR_VDD
I
Positive voltage for OLED
9 AR_VDD
I
Positive voltage for OLED
10 TEST2_VD
Remarks
open CMEL test pin, it must be open.
11 ARREF
I/O
12 VGL
I/O
13 VGH
I/O
Panel refers voltage of the regulator ARREF or external input voltage.
(-8V~+8V)
Low Voltage output of regulator VGL or external input voltage.
(-3V~-8V)
High Voltage output of regulator VGH or external input voltage.
(+3V~+8V)
14 LVO
I/O
Negative output voltage of the booster2. (-8.5V)
I/O
Connect to the step-up circuit, capacitors according to the step-up
factor. Leave this pin open if the internal step-up circuit is not used.
I/O
Positive output voltage of the booster2. (8.5V)
I/O
Connect to the step-up circuit, capacitors according to the step-up
factor. Leave this pin open if the internal step-up circuit is not used.
I/O
Connect to the step-up circuit, 4capacitors according to the step-up
factor. Leave this pin open if the internal step-up circuit is not used.
15 C22N
16 C22P
17 HVO
18 C21P
19 C21N
20 C11N
21 C11P
22 C12N
23 C12P
24 PVSS
25 DDVDH
P
I/O
Charge pump ground pin, it must connect to external
ground.
Output voltage of the booster1. (5.1V/6.0V)
26 VSSA
P
Analog ground pin. It must connect to external ground.
27 VSSA
P
Analog ground pin. It must connect to external ground.
28 VCI
P
A power supply for the Analog circuit. (3.0V~3.6V)
29 VCI
P
A power supply for the Analog circuit. (3.0V~3.6V)
30 VGAM1OUT
I/O
Output voltage of the VGAM1OUT regulator and used positive power
of source driver. (4.8V/5.8V)
Internal logic voltage input or output pin
I/O
31 VDDD
VDC_ENB=0, VDDD is output, please connect to 1uF capacitor.
VDC0
VDDD
Status
0
1.8V
Normal display
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1
2.5V
OTP program
VDC_ENB=1, VDDD is input. (Input range = 1.6V~2.75V)
32 VCC
P
A power supply for the Digital circuit. (1.5V~3.6V)
33 VSSD
P
Digital ground pin. It must connect to external ground.
34 NRESET
I
Reset pin. Setting either pin low initializes the LSI. Must be reset
after power is supplied. (Normally pull high)
35 NCS
I
Serial Interface chip enable pin. (Normally pull high)
36 SCL
I
Serial Interface clock input pin. (Normally pull high)
37 SDA
I
Serial Interface data line. (Normally pull high)
Data enable:
I
38 DE
When VSYNC+HSYNC+DE mode,
DE=H: Data enable, DE=L: Data disable (Black). (Normally pull low)
Frame synchronizing signal.
I
39 VSYNC
If VSPL=0: Active low.
If VSPL=1: Active high.
Line synchronizing signal.
I
40 HSYNC
If HSPL=0: Active low.
If HSPL=1: Active high.
Dot clock signal.
I
41 DCLK
42 D27
43 D26
44 D25
If DPL=0: Data are input on the rising edge of DOTCLK.
If DPL=1: Data are input on the falling edge of DOTCLK.
I
Digital data input. DX0 is LSB and DX7 is MSB. (Normally pull low)
1. If parallel RGB input mode is used, D0X, D1X, and D2X indicate R,
G, and B data in turn.
45 D24
2. If serial RGB or RGBD or CCIR601 or CCIR656 input mode is
46 D23
selected, only D07~D00 are used, and others short to GND.
47 D22
DX7~DX0 has 8-bit width, respectively to compose 16,777,216
color and 256 gray scale of 1 pixel.
48 D21
49 D20
50 D17
51 D16
52 D15
53 D14
54 D13
55 D12
56 D11
57 D10
58 D07
59 D06
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60 D05
61 D04
62 D03
63 D02
64 D01
65 D00
66 TEST3_W
open CMEL test pin, it must be open.
67 AR_VDD
I
Positive voltage for OLED
68 AR_VDD
I
Positive voltage for OLED
69 AR_VSS
I
Negative voltage for OLED
70 AR_VSS
I
Negative voltage for OLED
71 TEST4_P
open CMEL test pin, it must be open.
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9. External Dimension:
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10. Reliability Test:
No
Item
Specification
1 High Temp. Storage
85℃, 240hr
2 Low Temp. Storage
-40℃, 240hr
3 High Temp. Operation
60℃, 240hr
4 Low Temp. Operation
-20℃, 240hr
5 High Temp./ High Hum. Storage
85℃, 85 % RH, 120 hr
6 High Temp./ High Hum. Operation 60℃, 90 % RH, 240hr
-40℃, 30 min. --> 85℃, 30 min., 100 cycles
7 Thermal Shock storage
8 ESD
9 Packing Test
(1) Contact discharge mode: +/- 2kV, 3 times/FPC pin
(2) Air discharge mode: +/- 8 kV, 10 times/central area
Drop 1 corner, 3 sides, 6 faces, 1 time for each; Height:
follow ISTA standard.
Follow ISTA standard, 1.14Grms
Test axis: X, Y, Z
Test and measurement conditions
All measurements shall not be started until the specimens attain to temperature stability.
The degradation of Polarizer is ignored for item 1, 5 & 6.
The test pattern at operating condition is 30%P.C. alternating pictures.
Evaluation Criteria
No damage to glass or encapsulation
No drastic change to display
Defects / Mura follow product specification
Luminance: Within +/-50% of initial value
Current consumption: within +/-50% of initial value
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11. Handling:
Do not scratch the surface of the polarizer film as it is easily damaged.
When cleaning the display surface, use soft cloth with solvent (as recommended below) and
wipe lightly
Ethyl alcohol
Isopropyl alcohol
Do not wipe the display surface with dry or hard materials that damage the polarizer surface.
Since this OLED panel is made of glass, dropping the module or banging it against hard
objects may cause cracks or fragmentation.
Do not disassemble the OLED module as it may cause permanent damage.
Hold OLED very carefully when placing OLED module into the system housing. Do not
excessive stress or pressure to OLED module.
12. Storage:
Storing in a polyethylene bag with the opening sealed.
Placing in a dark place where neither exposure to direct sunlight nor any fluorescent light is
permitted and keep at room temperature & room humidity.
Storing with no contact with polarizer surface.
(It is recommended to store them in the inner container which we delivered.)
13. Panel ID Label Naming Rule
Single format example:
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14. Package:
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15. Warranty
Warranty term is 12 months of reliability characteristics of quality level after the outgoing
date in Chi Mei EL Corporation.
Chi Mei EL Corporation could compensate for defectives, which happen within warranty
term under condition that products should be stored or be used as specified under normal
condition within the contents of specification.
Otherwise, it is unable to compensate for defectives when below items happen:
(1) Defectives happen by customer’s mistake such as careless handling or design change,
etc.
(2) Defectives caused by natural uncontrolled disaster.
(3) The direct and/or indirect damage caused by unapproved or disagreed use behavior,
condition, environment, which is over or not belong to the product specification or
other related technique document published by CMEL.
After 12 months of warranty term, all replacement for defectives will be charged.
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