CIRRUS PA04

PA04PA04
• PA04A
• PA04A
PA04,
P r o d u c t IPA04A
Innnnoovvaa t i o n FFr roomm
Power Operational Amplifier
FEATURES
• HIGH INTERNAL DISSIPATION — 200 Watts
• HIGH VOLTAGE, HIGH CURRENT — 200V, 20A
• HIGH SLEW RATE — 50V/µs
• 4 WIRE CURRENT LIMIT SENSING
• LOW DISTORTION
• EXTERNAL SLEEP MODE CONTROL
• OPTIONAL BOOST VOLTAGE INPUTS
• EVALUATION KIT — SEE EK09
APPLICATIONS
12-pin DIP
PACKAGE STYLE CR
TYPICAL APPLICATION
• SONAR TRANSDUCER DRIVER
• LINEAR AND ROTARY MOTOR DRIVES
• YOKE/MAGNETIC FIELD EXCITATION
• PROGRAMMABLE POWER SUPPLIES TO ±95V
• AUDIO UP TO 400W
The high power bandwidth and high voltage output of the
PA04 allows driving sonar transducers via a resonant circuit
including the transducer and a matching transformer. The load
circuit appears resistive to the PA04. Control logic turns off the
amplifier in sleep mode.
Rf
DESCRIPTION
The PA04 is a high voltage MOSFET power operational
amplifier that extends the performance limits of power amplifiers in slew rate and power bandwidth, while maintaining high
current and power dissipation ratings.
The PA04 is a highly flexible amplifier. The sleep mode
feature allows ultra-low quiescent current for standby operation or load protection by disabling the entire amplifier. Boost
voltage inputs allow the small signal portion of the amplifier to
operate at a higher voltage than the high current output stage.
The amplifier is then biased to achieve close linear swings to
the supply rails at high currents for extra efficient operation.
External compensation tailors performance to user needs.
A four wire sense technique allows precision current limiting
without the need to consider internal or external milliohm
parasitic resistance in the output line.
The JEDEC MO-127 12-pin Power Dip™ package (see
Package Outlines) is hermetically sealed and isolated from
the internal circuits. The use of compressible thermal washers
will void product warranty.
EQUIVALENT SCHEMATIC
12
9
+VBOOST
D1
D2
D3
Q5
Q6
D4
Q12
I LIM
Q13
11
Ri
1
2
12
PA04
7
R CL
11
10
TUNED
TRANSFORMER
Sonar Transducer Driver
EXTERNAL CONNECTIONS
-INPUT
C
Q10
D5
ULTRASONIC
DRIVE
+INPUT
COMP
C RC
+Vs 8
SLEEP
CONTROL
LOGIC
COMP
-VBOOST
*
-SUPPLY
SLEEP
1
12
2
11
3
4
TOPVIEW
10
CURRENT LIMIT
CURRENT LIMIT
+VBOOST
9
5
8
6
7
*+SUPPLY
OUTPUT
D6
–IN
1
+IN
2
Q14 Q15
10
I LIM
Q17
D7
COMP D8
Q19
3
Q21
Q22
Q18
D9
7
OUT
Q7
Q26
4
–V BOOST
COMP
5
PA04U
http://www.cirrus.com
Q20
–Vs 6
PHASE COMPENSATION
Gain
CC
RC
1
470pF
120Ω
>3
220pF
120Ω
≥10
100pF
120Ω
CC RATED FOR FULL SUPPLY VOLTAGE
*See “BOOST OPERATION” paragraph.
Copyright © Cirrus Logic, Inc. 2009
(All Rights Reserved)
MAY 20091
APEX − PA04UREVL
PA04 • PA04A
ABSOLUTE MAXIMUM RATINGS
SPECIFICATIONS
PARAMETER
P r o d u c t I n n o v a t i o nF r o m
SUPPLY VOLTAGE, +VS to –VS
BOOST VOLTAGE
OUTPUT CURRENT, within SOA
POWER DISSIPATION, internal
INPUT VOLTAGE, differential
INPUT VOLTAGE, common mode
TEMPERATURE, pin solder - 10s
TEMPERATURE, junction2
TEMPERATURE, storage
OPERATING TEMPERATURE RANGE, case
TEST CONDITIONS 1
INPUT
OFFSET VOLTAGE, initial
OFFSET VOLTAGE, vs. temperature
OFFSET VOLTAGE, vs. supply
OFFSET VOLTAGE, vs. power
BIAS CURRENT, initial
BIAS CURRENT, vs. supply
OFFSET CURRENT, initial
INPUT IMPEDANCE, DC
INPUT CAPACITANCE
COMMON MODE VOLTAGE RANGE
COMMON MODE REJECTION, DC
INPUT NOISE
GAIN
OPEN LOOP, @ 15Hz
GAIN BANDWIDTH PRODUCT
POWER BANDWIDTH
PHASE MARGIN
OUTPUT
VOLTAGE SWING
VOLTAGE SWING
CURRENT, peak
SETTLING TIME to .1%
SLEW RATE
CAPACITIVE LOAD
RESISTANCE
Full temperature range
Full temperature range
Full temperature range
Full temp. range, VCM = ±20V
100kHz BW, RS = 1KΩ
Full temperature range, CC = 100pF
IO = 10A
RL = 4.5Ω, VO = 180V p-p
CC = 100pF, RC = 120Ω
Full temperature range
IO = 15A
VBOOST = Vs + 5V, IO = 20A
AV = 1, 10V step, RL = 4Ω
AV = 10, CC = 100pF, RC = 120Ω
Full temperature range, AV = +1
POWER SUPPLY
VOLTAGE
Full temperature range
CURRENT, quiescent, boost supply
CURRENT, quiescent, total
CURRENT, quiescent, total, sleep mode Full temperature range
THERMAL
RESISTANCE, AC, junction to case3
RESISTANCE, DC, junction to case
RESISTANCE4, junction to air
TEMPERATURE RANGE, case
MIN
Full temperature range, F>60Hz
Full temperature range, F<60Hz
Full temperature range
Meets full range specification
±VB-8
86
94
PA04
TYP
5
30
15
30
10
.01
10
1011
13
98
10
102
2
90
60
±VS-8.8 ±VS-7.5
±VS-6.8 ±VS-5.5
20
2.5
40
50
10
2
±15
±75
30
70
3
.3
.5
12
–25
200V
SUPPLY VOLTAGE +20V
20A
200W
±20V
±VS
300°C
150°C
–65 to +150°C
–55 to +125°C
PA04A
MAX
MIN TYP
MAX
UNITS
10
2
5
50
10
30
*
10
50
5
20
*
50
5
20
*
*
*
*
*
*
mV
µV/°C
µV/V
µV/W
pA
pA/V
pA
Ω
pF
V
dB
µVrms
*
*
*
*
*
dB
MHz
kHz
*
*
*
*
*
*
*
*
*
V
V
A
µs
V/µs
nF
Ω
±100
*
40
90
5
*
*
*
*
*
*
*
*
.4
*
*
.6
*
*
*
85
*
*
°
V
mA
mA
mA
°C/W
°C/W
°C/W
°C
NOTES: * The specification of PA04A is identical to the specification for PA04 in applicable column to the left.
1. Unless otherwise noted: TC = 25°C, CC = 470pF, RC = 120 ohms. DC input specifications are ± value given. Power supply voltage is typical rating. ±VBOOST = ±VS.
2. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to
achieve high MTTF. For guidance, refer to the heatsink data sheet.
3. Rating applies if the output current alternates between both output transistors at a rate faster than 60 Hz.
4. The PA04 must be used with a heatsink or the quiescent power may drive the unit to junction temperatures higher than 150°C.
CAUTION
2
The PA04 is constructed from MOSFET transistors. ESD handling procedures must be observed.
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.
PA04U
PA04 • PA04A
50
T = TA
150
80
40
20
0
10
F
0p
F
0p
=
CC
F
0p
22
RC = 120Ω
RL = 4Ω
0
1
10
100
1K 10K 100K 1M
FREQUENCY F (Hz)
–45
–90
CC = 470pF
CC = 220pF
CC = 100pF
–135
–180
100 1K 10K 100K 1M 10M
FREQUENCY,Ff (Hz)
1
COMMON MODE REJECTION
10
100 1K 10K 100K 1M 10M
FREQUENCY, F (Hz)
PULSE RESPONSE
7.5
60
40
20
=3
30K
QUIESCENT CURRENT
1.1
1.0
.9
.8
30
200
50
100
150
TOTAL SUPPLY VOLTAGE, VS (V)
VB
0
= VS
+ 5V
5
10
15
OUTPUT CURRENT, IO (A)
20
CURRENT LIMIT
130
120
110
100
90
80
70
60
25 50
–50 –25 0
75 100 125
CASE TEMPERATURE, TC (°C)
POWER RESPONSE
200
180
150
120
100
80
60
pF
00
=1
3K 10K
300 1K
FREQUENCY, F (Hz)
30
2
T
OOS
pF
PA04U
100
25
4
20
.001
30
10
15
20
TIME, t (µs)
= VS
CC
=
PO
.002
1.2
5
ST
V BOO
6
pF
0W
20
0
8
=2
.005
–7.5
10
70
PO = 1W
–5
OUTPUT VOLTAGE SWING
12
CC
.01
–2.5
20
=4
.02
0
4Ω LOAD
CC
AV = 10
RL = 4Ω
CC = 100pF, RC = 120Ω
VS = 62V
00
W
HARMONIC DISTORTION
O
.05
1M
P
.1
100
1K
10K 100K
FREQUENCY, F (Hz)
2.5
NORMALIZED QUIESCENT CURRENT, IQ (X)
80
CC = 470pF
5
OUTPUT VOLTAGE, VO (VP-P)
OUTPUT VOLTAGE, VO (V)
A V = +1
0
10
10M
RC = 120Ω
RL = 4Ω
40
RC = 120Ω
0
300
400
500
100
200
EXT. COMPENSATION CAPACITOR CC (pF)
SMALL SIGNAL PHASE
0
10
47
40
100
60
SMALL SIGNAL GAIN
120
.2
DISTORTION, THD (%)
25
50
75 100 125
TEMPERATURE, TC (°C)
80
SLEW RATE
60
NORMALIZED CURRENT LIMIT, (%)
0
OPEN LOOP PHASE, Ф (°)
0
POWER SUPPLY REJECTION
SLEW RATE, SR (V/s)
100
100
VOLTAGE DROP FROM SUPPLY, VS–VO (V)
T = TC
POWER SUPPLY REJECTION, PSR (dB)
150
=
CC
COMMON MODE REJECTION, CMR (dB)
POWER DERATING
200
=
CC
OPEN LOOP GAIN RESPONSE, A (dB)
INTERNAL POWER DISSIPATION, P(W)
P r o d u c t I n n o v a t i o nF r o m
40
RC =120Ω
RL = 4.0Ω
20
10K
20K
.6M
50K .2M
FREQUENCY, F (Hz)
1M
3
PA04 • PA04A
P r o d u c t I n n o v a t i o nF r o m
GENERAL
SLEEP MODE OPERATION
Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking,
mounting, current limit, SOA interpretation, and specification
interpretation. Visit www.cirrus.com for design tools that help
automate tasks such as calculations for stability, internal power
dissipation, current limit; heat sink selection; Apex Precision
Power’s complete Application Notes library; Technical Seminar
Workbook; and Evaluation Kits.
In the sleep mode, pin 12 (sleep) is tied to pin 9 (+VBOOST).
This disables the amplifier’s internal reference and the amplifier shuts down except for a trickle current of 3 mA which
flows into pin 12. Pin 12 should be left open if the sleep mode
is not required.
Several possible circuits can be built to take advantage of
this mode. In Figure 2A a small signal relay is driven by a logic
gate. This removes the requirement to deal with the common
mode voltage that exists on the shutoff circuitry since the sleep
mode is referenced to the +VBOOST voltage.
In Figure 2B, circuitry is used to level translate the sleep
mode input signal. The differential input activates sleep mode
with a differential logic level signal and allows common mode
voltages to ±VBOOST.
CURRENT LIMIT
The two current limit sense lines are to be connected directly
across the current limit sense resistor. For the current limit to
work correctly pin 11 must be connected to the amplifier output
side and pin 10 connected to the load side of the current limit
resistor, RCL, as shown in Figure 1. This connection will bypass
any parasitic resistances, Rp, formed by sockets and solder
joints as well as internal amplifier losses. The current limiting
resistor may not be placed anywhere in the output circuit except
where shown in Figure 1.
The value of the current limit resistor can be calculated as
follows:
.76
RCL =
ILIMIT
Rf
Figure 1.
Current Limit.
Ri
10
1
PA04
2
CL
9
12
FIGURE 2A. SLEEP MODE CIRCUIT.
9
+VBOOST
SLEEP
+VBOOST
560Ω
+
470Ω
Q1
12
SLEEP
LOGIC
11
CL
INPUT
K1
LOGIC
7
RP
RCL
1KΩ
INPUT
470Ω
RL
-
Q2
–VBOOST
SAFE OPERATING AREA (SOA)
FIGURE 2B. SLEEP MODE CIRCUIT.
The MOSFET output stage of this power operational amplifier has two distinct limitations:
1. The current handling capability of the MOSFET geometry
and the wire bonds.
2. The junction temperature of the output MOSFETs.
NOTE: The output stage is protected against transient flyback. However, for protection against sustained, high
energy flyback, external fast-recovery diodes should
be used.
BOOST OPERATION
SOA
20
t=
OUTPUT CURRENT (A)
10
C
D
C
T
C
2.0
=
C
=
T
=
C
T
1m
s
s
25
°C
85
12
°C
5°
C
1.0
.5
.2
4
D
5.0
10
m
D
C
t=
2
100 200
5
10
20
50
SUPPLY TO OUTPUT DIFFERENTIAL (V)
With the VBOOST feature the small signal stages of the
amplifier are operated at higher supply voltages than the
amplifier’s high current output stage. +VBOOST (pin 9) and
–VBOOST (pin 5) are connected to the small signal circuitry of
the amplifier. +VS (pin 8) and –VS (pin 6) are connected to the
high current output stage. An additional 5V on the VBOOST pins
is sufficient to allow the small signal stages to drive the output
transistors into saturation and improve the output voltage
swing for extra efficient operation when required. When close
swings to the supply rails is not required the +VBOOST and +VS
pins must be strapped together as well as the –VBOOST and –VS
pins. The boost voltage pins must not be at a voltage lower
than the VS pins.
COMPENSATION
The external compensation components CC and RC are connected to pins 3 and 4. Unity gain stability can be achieved
at any compensation capacitance greater than 330 pF with at
least 60 degrees of phase margin. At higher gains more phase
shift can be tolerated in most designs and the compensation
capacitance can accordingly be reduced, resulting in higher
bandwidth and slew rate. Use the typical operating curves as
a guide to select CC and RC for the application.
PA04U
P r o d u c t I n n o v a t i o nF r o m
PA04 • PA04A
Contacting Cirrus Logic Support
For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America.
For inquiries via email, please contact [email protected]
International customers can also request support by contacting their local Cirrus Logic Sales Representative.
To find the one nearest to you, go to www.cirrus.com
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PA04U
5