TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 D D Micropower Operation . . . 1 µA/Channel Rail-to-Rail Input/Output Gain Bandwidth Product . . . 5.5 kHz Supply Voltage Range . . . 2.5 V to 12 V Specified Temperature Range – TA = 0°C to 70°C . . . Commercial Grade – TA = –40°C to 125°C . . . Industrial Grade Ultrasmall Packaging – 5-Pin SOT-23 (TLV2241) – 8-Pin MSOP (TLV2242) Universal OpAmp EVM Operational Amplifier + – SUPPLY CURRENT vs SUPPLY VOLTAGE 1.4 I CC – Supply Current – µ A/Ch D D D D D description The TLV224x family of single-supply operational amplifiers offers very low supply current of only 1 µA per channel. AV = 1 VIN = VCC / 2 TA =25 °C 1.2 1.0 0.8 0.6 0.4 0.2 The low supply current is coupled with extremely low input bias currents enabling them to be used with mega-Ω resistors making them ideal for portable, long active life, applications. DC accuracy is ensured with a low typical offset voltage as low as 600 µV, CMRR of 100 dB, and minimum open loop gain of 100 V/mV at 2.7 V. 0 0 2 4 6 8 10 12 VCC – Supply Voltage – V The maximum recommended supply voltage is as high as 12 V and ensured operation down to 2.5 V, with electrical characteristics specified at 2.7 V, 5 V and 12 V. The 2.5-V operation makes it compatible with Li-Ion battery-powered systems and many micropower microcontrollers available today including TI’s MSP430. FAMILY PACKAGE TABLE DEVICE PACKAGE TYPES NO OF Ch NO. PDIP SOIC SOT-23 TSSOP MSOP TLV2241 1 8 8 5 — — TLV2242 2 8 8 — — 8 TLV2244 4 14 14 — 14 — UNIVERSAL EVM Refer to the EVM Selection Guide (Lit# SLOU060) SELECTION OF SINGLE SUPPLY OPERATIONAL AMPLIFIER PRODUCTS† DEVICE VDD (V) VIO (mV) BW (MHz) SLEW RATE (V/µs) IDD (PER CHANNEL) (µA) RAIL-TO-RAIL TLV240x‡ 2.5–16 0.390 0.005 0.002 0.880 I/O TLV224x 2.5–12 0.600 0.005 0.002 1 I/O TLV2211 2.7–10 0.450 0.065 0.025 13 O TLV245x 2.7–6 0.020 0.22 0.110 23 I/O TLV225x 2.7–8 0.200 0.2 0.12 35 † All specifications are typical values measured at 5 V. ‡ This device also offers 18-V reverse battery protection and 5-V over-the-rail operation on the inputs. O Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 TLV2241 AVAILABLE OPTIONS VIOmax AT 25°C TA 0°C to 70°C – 40°C to 125°C 3000 µV PACKAGED DEVICES SOT-23‡ SYMBOLS (DBV) SMALL OUTLINE† (D) TLV2241CD — TLV2241ID PLASTIC DIP (P) — TLV2241IDBV — VBEI TLV2241IP † This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2241CDR). ‡ This package is available in a 250 piece mini-reel. To order this package, add a T suffix to the part number (e.g., TLV2241DBVT). This package is also available in a 3000 piece reel, add a R suffix to the part number (e.g., TLV2241DBVR). TLV2242 AVAILABLE OPTIONS VIOmax AT 25°C TA 0°C to 70°C 3000 µV PACKAGED DEVICES MSOP† SYMBOLS (DGK) SMALL OUTLINE† (D) TLV2242CD — PLASTIC DIP (P) — — – 40°C to 125°C TLV2242ID TLV2242IDGK xxTIALE TLV2242IP † This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2242CDR). TLV2244 AVAILABLE OPTIONS PACKAGED DEVICES VIOmax AT 25°C TA 0°C to 70°C – 40°C to 125°C SMALL OUTLINE† (D) PLASTIC DIP (N) TLV2244CD 3000 µV TLV2244ID TSSOP (PW) — — TLV2244IN TLV2244IPW † This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2244CDR). TLV224x PACKAGE PINOUTS TLV2241 D OR P PACKAGE (TOP VIEW) TLV2241 DBV PACKAGE (TOP VIEW) OUT GND IN+ 1 5 VCC 2 3 4 IN – NC IN – IN + GND 1 8 2 7 3 6 4 5 TLV2242 D, DGK, OR P PACKAGE (TOP VIEW) NC VCC OUT NC NC – No internal connection TLV2244 D, N, OR PW PACKAGE (TOP VIEW) 1OUT 1IN – 1IN+ VCC 2IN+ 2IN – 2OUT 2 1 14 2 13 3 12 4 11 5 10 6 9 7 8 POST OFFICE BOX 655303 4OUT 4IN – 4IN+ GND 3IN+ 3IN – 3OUT • DALLAS, TEXAS 75265 1OUT 1IN – 1IN + GND 1 8 2 7 3 6 4 5 VCC 2OUT 2IN – 2IN+ TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VCC Input current, II (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values, except differential voltages, are with respect to GND DISSIPATION RATING TABLE PACKAGE ΘJC (°C/W) ΘJA (°C/W) TA ≤ 25°C POWER RATING D (8) 38.3 176 710 mW 142 mW D (14) 26.9 122.6 1022 mW 204.4 mW TA = 125°C POWER RATING DBV (5) 55 324.1 385 mW 77.1 mW DGK (8) 54.2 259.9 481 mW 96.2 mW N (14) 32 78 1600 mW 320.5 mW P (8) 41 104 1200 mW 240.4 mW PW (14) 29.3 173.6 720 mW 144 mW recommended operating conditions Single supply Supply voltage voltage, VCC Split supply Common-mode input voltage range, VICR C-suffix free air temperature, temperature TA Operating free-air I-suffix POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN MAX 2.5 12 ±1.25 ±6 0 0 VCC 70 – 40 125 UNIT V V °C 3 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 12 V (unless otherwise noted)‡ dc performance PARAMETER VIO Input offset voltage αVIO Offset voltage drift TEST CONDITIONS VIC = 0 to VCC, RS = 50 Ω MAX 600 3000 4500 25°C VCC = 5 V 7V VCC = 2 2.7 V, VO( V, RL = 500 kΩ O(pp)) = 1 V AVD TYP Full range VCC = 12 V Large-signal g g differential voltage g amplification MIN 25°C VO = VCC/2 V, V VIC = VCC/2 V V, RS = 50 Ω VCC = 2 2.7 7V CMRR Common-mode Common mode rejection ratio TA† VCC = 5 V V, VO( V, RL = 500 kΩ O(pp)) = 3 V VCC = 12 V V, VO( V, RL = 500 kΩ O(pp)) = 6 V 55 Full range 50 25°C 60 Full range 53 25°C 60 Full range 55 25°C 100 Full range 30 25°C 250 Full range 100 25°C 700 Full range 120 µV µV/°C 3 25°C UNIT 100 100 dB 100 400 1000 V/mV 1500 † Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is – 40°C to 125°C. input characteristics PARAMETER IIO TEST CONDITIONS Input offset current TLV224xC VO = VCC/2 V,, VIC = VCC/2 V, RS = 50 Ω IIB Input bias current TLV224xI TYP MAX 25 250 300 pA 400 100 500 550 Full range 25°C UNIT pA 1000 300 MΩ Ci(c) Common-mode input capacitance f = 100 kHz 25°C 3 † Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is – 40°C to 125°C. ‡ Specifications at 5 V are ensured by design and device testing at 2.7 V and 12 V. pF 4 Differential input resistance MIN Full range 25°C TLV224xC TLV224xI ri(d) TA† 25°C POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 12 V (unless otherwise noted)‡ (continued) output characteristics PARAMETER TEST CONDITIONS VCC = 2 2.7 7V VIC = VCC/2,, IOH = –2 µA VCC = 5 V VCC = 12 V VOH High level output voltage High-level VCC = 2 2.7 7V VIC = VCC/2,, IOH = –50 µA VCC = 5 V VCC = 12 V /2 IOL = 2 µA VIC = VCC/2, VOL Low level output voltage Low-level VIC = VCC/2, /2 IOL = 50 µA TA† 25°C MIN TYP 2.65 2.68 Full range 2.63 25°C 4.95 Full range 4.93 25°C 11.95 Full range 11.93 25°C 2.62 Full range 2.6 25°C 4.92 Full range 4.9 25°C 11.92 Full range 11.9 25°C MAX 4.98 11.98 V 2.65 4.95 11.95 90 Full range 150 180 25°C UNIT 180 Full range 230 mV 260 IO Output current VO = 0.5 V from rail 25°C ±200 † Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is – 40°C to 125°C. µA power supply PARAMETER TEST CONDITIONS VCC = 2.7 2 7 V or 5 V ICC Supply current (per channel) VO = VCC/2 VCC = 12 V PSRR Power supply rejection ratio (∆VCC/∆VIO) TA† 25°C TLV224xC VCC = 5 to 12 V, No load VIC = VCC/2 V, TLV224xI TYP MAX 980 1200 Full range 1500 25°C 1000 Full range 25°C VCC = 2.7 to 5 V, VIC = VCC/2 V, No load, MIN Full range 1250 UNIT nA 1550 70 100 65 60 25°C 70 Full range 70 dB dB 100 dB † Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is – 40°C to 125°C. ‡ Specifications at 5 V are ensured by design and device testing at 2.7 V and 12 V. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 12 V (unless otherwise noted)‡ (continued) dynamic performance PARAMETER TEST CONDITIONS UGBW Unity gain bandwidth RL = 500 kΩ, SR Slew rate at unity gain VO(pp) = 0.8 V, RL = 500 kΩ, φM Phase margin RL = 500 kΩ kΩ, CL = 100 pF Gain margin ts VCC = 2.7 or 5 V, V(STEP)PP = 1 V, AV = –1, VCC = 12 V, V(STEP)PP = 1 V V, AV = –1, Settling time CL = 100 pF, RL = 100 kΩ CL = 100 pF F, RL = 100 kΩ CL = 100 pF TA 25°C CL = 100 pF 25°C MIN TYP MAX UNIT 5.5 kHz 2 V/ms 60 25°C 15 0.1% dB 1.84 25°C ms 0.1% 6.1 0.01% 32 noise/distortion performance PARAMETER Vn TEST CONDITIONS Equivalent input noise voltage f = 100 Hz In Equivalent input noise current f = 100 Hz ‡ Specifications at 5 V are ensured by design and device testing at 2.7 V and 12 V. 6 TA f = 10 Hz POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN TYP 800 25°C 500 8 MAX UNIT nV/√Hz fA/√Hz TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage vs Common-mode input voltage 1, 2, 3 vs Free-air temperature 4, 6, 8 vs Common-mode input voltage 5, 7, 9 vs Free-air temperature 4, 6, 8 vs Common-mode input voltage 5, 7, 9 IIB Input bias current IIO Input offset current CMRR Common-mode rejection ratio vs Frequency VOH VOL High-level output voltage vs High-level output current 11, 13, 15 Low-level output voltage vs Low-level output current 12, 14, 16 VO(PP) Zo Output voltage peak-to-peak vs Frequency 17 Output impedance vs Frequency 18 ICC PSRR Supply current vs Supply voltage 19 Power supply rejection ratio vs Frequency 20 AVD Differential voltage gain vs Frequency 21 Phase vs Frequency 21 Gain-bandwidth product vs Supply voltage 22 SR Slew rate vs Free-air temperature 23 φm Phase margin vs Capacitive load 24 Gain margin vs Capacitive load 25 Voltage noise over a 10 Second Period 10 26 Large-signal voltage follower 27, 28, 29 Small-signal voltage follower 30 Large-signal inverting pulse response 31, 32, 33 Small-signal inverting pulse response Crosstalk 34 vs Frequency POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 35 7 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 TYPICAL CHARACTERISTICS INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 100 800 600 400 200 0 –200 0.0 0 –100 –200 –300 VCC = 5 V TA = 25 °C –400 0.4 0.8 1.2 1.6 2.0 2.4 0 2.7 IIO 0 IIB –100 –200 –40 –25 –10 5 I IB / I IO – Input Bias / Offset Current – pA 2 20 35 50 65 80 95 110 125 350 300 IIO 0 –50 IIB –100 –150 0.0 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2 –0.2 VICR – Common Mode Input Voltage – V Figure 7 8 2 6 8 10 12 INPUT BIAS / OFFSET CURRENT vs FREE-AIR TEMPERATURE 600 200 150 100 50 IIO 0 –50 IIB –100 –150 –0.2 0.0 0.2 0.6 1.0 1.4 1.8 2.2 2.6 2.9 VCC = 5 V VIC = 2.5 V 500 400 300 200 100 IIO 0 IIB –100 –200 –40 –25 –10 5 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C Figure 6 Figure 5 INPUT BIAS / OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE INPUT BIAS / OFFSET CURRENT vs FREE-AIR TEMPERATURE 600 4 VICR – Common-Mode Input Voltage –V VICR – Common Mode Input Voltage – V I IB / I IO – Input Bias / Offset Current – pA I IB / I IO – Input Bias / Offset Current – pA 100 –300 0 700 VCC = 5 V TA = 25 °C –200 Figure 3 VCC = 2.7 V TA = 25 °C Figure 4 200 –100 5 250 INPUT BIAS / OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE 50 4 400 TA – Free-Air Temperature – °C 150 3 250 VCC = 12 V VIC = 7.5 V 500 400 300 200 100 IIO 0 –100 –200 –40 –25 –10 5 IIB 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 I IB / I IO – Input Bias / Offset Current – pA I IB / I IO – Input Bias / Offset Current – pA 100 0 INPUT BIAS / OFFSET CURRENT vs COMMON MODE INPUT VOLTAGE 600 200 100 Figure 2 INPUT BIAS / OFFSET CURRENT vs FREE-AIR TEMPERATURE 300 200 –400 1 Figure 1 400 VCC =12 V TA = 25 °C 300 VICR – Common-Mode Input Voltage – V VICR – Common-Mode Input Voltage – V VCC = 2.7 V VIC = 1.35 V V IO – Input Offset Voltage – µV 1000 400 I IB / I IO – Input Bias / Offset Current – pA VCC = 2.7 V TA = 25°C 1200 V IO – Input Offset Voltage – µV V IO – Input Offset Voltage – µV 1400 500 INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE VCC =12 V TA = 25 °C 200 150 100 50 IIO 0 –50 IIB –100 –150 0 2 4 6 8 10 VICR – Common-Mode Input Voltage –V Figure 9 12 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 1.50 100 RF=100 kΩ RI=1 kΩ 80 60 40 20 VCC = 2.7 V 2.4 TA = –40°C 2.1 TA = –0°C TA = 25 °C TA = 70 °C TA = 125 °C 1.8 1.5 1.2 0 10 100 1k f – Frequency – Hz 50 100 150 3.5 150 1.25 TA = 0 °C TA = –40°C 1.00 0.75 TA = 25 °C TA = 70 °C TA = 125 °C 0.50 0.25 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 0 Figure 13 0.25 0 100 150 IOL – Low-Level Output Current – µA Figure 16 50 100 150 TA = –40°C VCC = 12 V 0 200 50 200 10k VCC = 12 V 10 8 VCC = 5 V RL = 100 kΩ CL = 100 pF TA = 25°C 4 2 VCC = 2.7 V AV=10 1k AV=1 100 0 VCC=2.7, 5, 12 V TA=25°C –2 10 200 OUTPUT IMPEDANCE vs FREQUENCY 12 6 150 Figure 15 16 14 100 IOH – High-Level Output Current – µA Z o – Output Impedance – Ω TA = –0°C TA = 25 °C TA = 70 °C TA = 125 °C 50 13.5 OUTPUT VOLTAGE PEAK-TO-PEAK vs FREQUENCY V O(PP) – Output voltage Peak–to–Peak – V TA = –40°C 0 TA = –0°C TA = 25 °C TA = 70 °C TA = 125 °C 14.0 Figure 14 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.50 14.5 IOL – Low-Level Output Current – µA 1.25 200 13 200 VCC = 12 V 150 15.0 IOH – High-Level Output Current – µA 1.50 100 Figure 12 0 0.75 50 IOL – Low-Level Output Current – µA VCC = 5 V 3.0 1.00 0.25 0 V OH – High-Level Output Voltage – V TA = –0°C TA = 25 °C TA = 70 °C TA = 125 °C 100 TA = 70 °C TA = 125 °C 0.50 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VOL – Low-Level Output Voltage – V TA = –40°C 4.5 50 0.75 200 1.50 0 1.00 Figure 11 5.0 4.0 TA =25 °C TA = 0 °C TA = –40°C 1.25 IOH – High-Level Output Current – µA HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT VCC = 5 V VCC = 2.7 V 0 0 10k Figure 10 V OH – High-Level Output Voltage – V VOL – Low-Level Output Voltage – V VCC=2.7, 5, 12 V 1 VOL – Low-Level Output Voltage – V LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 2.7 120 V OH – High-Level Output Voltage – V CMRR – Common-Mode Rejection Ratio – dB COMMON-MODE REJECTION RATIO vs FREQUENCY 100 f – Frequency – Hz 1k Figure 17 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10 100 1k f – Frequency – Hz 10k Figure 18 9 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs SUPPLY VOLTAGE POWER SUPPLY REJECTION RATIO vs FREQUENCY PSRR – Power Supply Rejection Ratio – dB I CC – Supply Current – µ A/Ch 1.4 1.2 1.0 0.8 0.6 TA = 125°C TA = 70 °C TA =25 °C TA = 0 °C TA = –40°C 0.4 0.2 AV = 1 VIN = VCC / 2 0 0 2 4 6 8 10 12 VCC = 2.7, 5, & 12 V TA = 25°C 110 100 90 80 70 60 50 40 VCC – Supply Voltage – V 100 1k f – Frequency – Hz Figure 19 Figure 20 DIFFERENTIAL VOLTAGE GAIN AND PHASE vs FREQUENCY GAIN BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 10 90 30 45 20 10 0 0 VCC=2.7, 5, 12 V RL=500 kΩ CL=100 pF TA=25°C –10 100 1k f – Frequency – Hz 4 3 2 1 3 4 5 6 7 8 9 10 11 12 VCC – Supply Voltage –V Figure 21 Figure 22 SLEW RATE vs FREE-AIR TEMPERATURE PHASE MARGIN vs CAPACITIVE LOAD 80 3.0 70 SR+ VCC = 5, 12 V 60 VCC = 2.7 V 2.0 1.5 SR– 1.0 VCC = 2.7, 5, 12 V Phase Margin – ° SR – Slew Rate – V/ ms 5 2 3.5 2.5 TA = 25°C RL = 100 kΩ CL = 100 pF f = 1kHz 6 0 –45 10k –20 10 GBWP –Gain Bandwidth Product – kHz 50 40 10k 7 135 Phase – ° AVD – Differential Voltage Gain – dB 60 50 40 30 20 0.5 10 0 –40 –25 –10 5 10 120 VCC = 2.7, 5, & 12 V RL= 500 kΩ TA = 25°C 0 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C 100 1k CL – Capacitive Load – pF Figure 23 Figure 24 POST OFFICE BOX 655303 10 • DALLAS, TEXAS 75265 10k TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 TYPICAL CHARACTERISTICS GAIN MARGIN vs CAPACITIVE LOAD VOLTAGE NOISE OVER A 10 SECOND PERIOD 25 4 VCC = 12 V 15 10 VCC = 2.7, 5 V 5 2 1 0 –1 –2 –3 0 –4 100 1k CL – Capacitive Load – pF 1 2 3 4 8 9 LARGE SIGNAL FOLLOWER PULSE RESPONSE VIN VO 2 1 0 –1 0 1 2 3 4 5 6 V VCC = 2.7 V AV = 1 RL = 100 kΩ CL = 100 pF TA = 25°C IN 0 –1 48 VIN 26 15 04 4 –13 3 2 VO 2 1 1 0 0 –1 –1 0 1 2 3 4 5 Figure 28 LARGE SIGNAL FOLLOWER PULSE RESPONSE SMALL SIGNAL FOLLOWER PULSE RESPONSE 0 15 15 –5 10 10 VO 5 0 0 –5 0 2 4 6 8 10 12 14 16 IN VIN 300 180 VIN 150 160 0 140 –150 120 100 80 V 25 10 V – Output Voltage – V O VCC = 12 V AV = 1 RL = 100 kΩ CL = 100 pF TA = 25°C – Input Voltage – mV Figure 27 5 6 t – Time – ms 30 15 –2 VCC = 5 V AV = 1 RL = 100 kΩ CL = 100 pF TA = 25°C 37 t – Time – ms 5 20 10 VO – Output Voltage – V 1 – Input Voltage – V 2 –4 – Input Voltage – V 7 LARGE SIGNAL FOLLOWER PULSE RESPONSE –3 IN 6 Figure 26 –2 V 5 t – Time – s V – Output Voltage – V O V 0 10k Figure 25 IN – Input Voltage – V 10 60 VO VCC = 2.7, 5, & 12 V AV = 1 RL = 100 kΩ CL = 100 pF TA = 25°C 120 100 80 60 40 40 20 20 0 0 VO – Output Voltage – mV Gain Margin – dB 20 VCC = 5 V f = 0.1 Hz to 10 Hz TA = 25°C 3 Input Referred Voltage Noise – µV RL= 500 kΩ TA = 25°C –20 0 t – Time – ms Figure 29 100 200 300 t – Time – µs 400 500 Figure 30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 TYPICAL CHARACTERISTICS LARGE SIGNAL INVERTING PULSE RESPONSE – Input Voltage – V VIN 1.0 1 VCC = 2.7 V AV = –1 RL = 100 kΩ CL = 100 pF TA = 25°C 0.0 –1 –0.5 0.0 –0.5 –1.0 –1.0 VO –1.5 –1.5 –2 0 1 2 3 4 5 6 1.0 1 0.5 0 –0.5 –1.5 VO –3.0 –3.5 –1 7 –2 –8 –8 VO –10 –10 –12 15 20 25 30 – Input Voltage – mV IN 0 100 VCC = 2.7, 5, & 12 V AV = –1 RL = 100 kΩ CL = 100 pF TA = 25°C –100 50 0 –50 7 –100 –150 –200 35 0 200 400 600 t – Time – ms Figure 34 0 –40 –60 VCC = 2.7, 5, & 12 V All Channels RL = 100 kΩ CL = 100 pF VIN = 1 VPP VCC = 12V –80 –100 VCC = 2.7, 5 V –120 –140 10 0 –100 Figure 33 –20 50 –50 t – Time – ms Crosstalk – dB 6 VO –12 10 5 VIN 100 150 CROSSTALK vs FREQUENCY 100 1k 10k f – Frequency –Hz Figure 35 12 4 200 200 V 0 V – Output Voltage – V O – Input Voltage – V IN V 2 –6 5 3 SMALL SIGNAL INVERTING PULSE RESPONSE –6 0 2 Figure 32 –4 –5 1 Figure 31 VCC = 12 V AV = –1 RL = 100 kΩ CL = 100 pF TA = 25°C –4 0 t – Time – ms VIN –2 –2.5 –3.5 10 9 0 –1.5 –3.0 12 12 –32 –1.0 –2.0 –2.5 LARGE SIGNAL INVERTING PULSE RESPONSE 04 0.0 –0.5 –2.0 t – Time – ms 68 36 0.5 VCC = 5 V AV = –1 RL = 100 kΩ CL = 100 pF TA = 25°C 0.0 –1 –1.0 –2.0 –1 VIN 1.5 2 IN 0.5 V 0.5 0 2.0 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 –150 800 1000 1200 V – Output Voltage – mV O 1.5 2 2.5 4 V – Output Voltage – V O 2.0 3 VO – Output Voltage – V V IN – Input Voltage – V LARGE SIGNAL INVERTING PULSE RESPONSE TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 APPLICATION INFORMATION offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: ǒ ǒ ǓǓ ǒ ǒ ǓǓ RF RG IIB– V + – VI + VIO 1 ) R R " IIB) RS F G 1 ) R R F G " IIB– RF VO + RS OO IIB+ Figure 36. Output Offset Voltage Model general configurations When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 37). RG RF f V – VI O V I VO + R1 –3dB 1 + 2pR1C1 ǒ Ǔǒ + 1 ) RRF G 1 Ǔ ) sR1C1 1 C1 Figure 37. Single-Pole Low-Pass Filter If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to do this can result in phase shift of the amplifier. C1 + _ VI R1 R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) R2 f C2 RG RF –3dB RG = + 2p1RC ( RF 1 2– Q ) Figure 38. 2-Pole Low-Pass Sallen-Key Filter POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 APPLICATION INFORMATION circuit layout considerations To achieve the levels of high performance of the TLV224x, follow proper printed-circuit board design techniques. A general set of guidelines is given in the following. D D D D D 14 Ground planes—It is highly recommended that a ground plane be used on the board to provide all components with a low inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance. Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors. Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board is the best implementation. Short trace runs/compact part placements—Optimum high performance is achieved when stray series inductance has been minimized. To realize this, the circuit layout should be made as compact as possible, thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at the input of the amplifier. Surface-mount passive components—Using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be kept as short as possible. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 APPLICATION INFORMATION general power dissipation considerations ǒ Ǔ For a given θJA, the maximum power dissipation is shown in Figure 39 and is calculated by the following formula: P T –T MAX A q JA PD = Maximum power dissipation of THS224x IC (watts) TMAX = Absolute maximum junction temperature (150°C) TA = Free-ambient air temperature (°C) θJA = θJC + θCA θJC = Thermal coefficient from junction to case θCA = Thermal coefficient from case to ambient air (°C/W) MAXIMUM POWER DISSIPATION vs FREE-AIR TEMPERATURE 2 1.75 Maximum Power Dissipation – W Where: + D PDIP Package Low-K Test PCB θJA = 104°C/W 1.5 1.25 SOIC Package Low-K Test PCB θJA = 176°C/W TJ = 150°C MSOP Package Low-K Test PCB θJA = 260°C/W 1 0.75 0.5 0.25 SOT-23 Package Low-K Test PCB θJA = 324°C/W 0 –55 –40 –25 –10 5 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB. Figure 39. Maximum Power Dissipation vs Free-Air Temperature POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TLV2241, TLV2242, TLV2244 FAMILY OF 1-µA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS SLOS329C – JULY 2000 REVISED - NOVEMBER 2000 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts Release 8, the model generation software used with Microsim PSpice . The Boyle macromodel (see Note 2) and subcircuit in Figure 40 are generated using the TLV224x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): D D D D D D D D D D D D Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification Unity-gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit NOTE 2: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 3 99 VCC+ + egnd ree ro2 cee fb rp rc1 rc2 – c1 7 11 12 + 1 c2 vlim IN+ r2 + 9 6 – vc 2 8 + q1 q2 IN– – vb ga – ro1 gcm ioff 53 dp 13 14 re1 VOUT re2 91 10 iee VCC– 4 dc – dlp 90 + + vlp + 54 – – vln + de .subckt 224X_5V–X 1 2 3 4 5 * c1 11 12 9.8944E–12 c2 6 7 30.000E–12 cee 10 99 8.8738E–12 dc 5 53 dy de 54 5 dy dlp 90 91 dx dln 92 90 dx dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 61.404E6 –1E3 1E3 61E6 –61E6 ga 6 0 11 12 1.0216E–6 gcm 0 6 10 99 10.216E–12 iee 10 4 dc 54.540E–9 ioff 0 6 dc 5e–12 hlim 90 0 vlim 1K q1 11 2 13 qx1 q2 12 1 14 qx2 r2 6 9 100.00E3 rc1 rc2 re1 re2 ree ro1 ro2 rp vb vc ve vlim vlp vln .model .model .model .model .ends 3 3 13 14 10 8 7 3 9 3 54 7 91 0 dx dy qx1 qx2 Figure 40. Boyle Macromodels and Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. 16 5 92 hlim – ve dln POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 978.81E3 12 978.81E3 10 30.364E3 10 30.364E3 99 3.6670E9 5 10 99 10 4 1.4183E6 0 dc 0 53 dc .88315 4 dc .88315 8 dc 0 0 dc 540 92 dc 540 D(Is=800.00E–18) D(Is=800.00E–18 Rs=1m Cjo=10p) NPN(Is=800.00E–18 Bf=27.270E21) NPN(Is=800.0000E–18 Bf=27.270E21) PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp TLV2241ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2241IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2241IDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2241IDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2241IDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2241IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2241IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2241IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2241IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLV2241IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLV2242CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242IDGK ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242IDGKG4 ACTIVE VSSOP DGK 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 (3) Samples (Requires Login) PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp TLV2242IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242IDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2242IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLV2242IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLV2244CD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2244CDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2244ID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2244IDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2244IDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2244IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2244IN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLV2244INE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLV2244IPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2244IPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2244IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2244IPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. Addendum-Page 2 (3) Samples (Requires Login) PACKAGE OPTION ADDENDUM www.ti.com 16-Aug-2012 NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 21-Sep-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TLV2241IDBVR SOT-23 DBV 5 3000 180.0 TLV2241IDBVT SOT-23 DBV 5 250 TLV2241IDR SOIC D 8 2500 TLV2241IDR SOIC D 8 TLV2242CDR SOIC D TLV2242IDGKR VSSOP TLV2242IDR SOIC TLV2244IDR TLV2244IPWR B0 (mm) K0 (mm) P1 (mm) 9.0 3.15 3.2 1.4 4.0 180.0 9.0 3.15 3.2 1.4 330.0 12.4 6.4 5.2 2.1 2500 330.0 12.4 6.4 5.2 8 2500 330.0 12.4 6.4 DGK 8 2500 330.0 12.4 D 8 2500 330.0 12.4 SOIC D 14 2500 330.0 TSSOP PW 14 2000 330.0 W Pin1 (mm) Quadrant 8.0 Q3 4.0 8.0 Q3 8.0 12.0 Q1 2.1 8.0 12.0 Q1 5.2 2.1 8.0 12.0 Q1 5.3 3.4 1.4 8.0 12.0 Q1 6.4 5.2 2.1 8.0 12.0 Q1 16.4 6.5 9.0 2.1 8.0 16.0 Q1 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 21-Sep-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV2241IDBVR SOT-23 DBV 5 3000 182.0 182.0 20.0 TLV2241IDBVT SOT-23 DBV 5 250 182.0 182.0 20.0 TLV2241IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2241IDR SOIC D 8 2500 367.0 367.0 35.0 TLV2242CDR SOIC D 8 2500 340.5 338.1 20.6 TLV2242IDGKR VSSOP DGK 8 2500 358.0 335.0 35.0 TLV2242IDR SOIC D 8 2500 340.5 338.1 20.6 TLV2244IDR SOIC D 14 2500 367.0 367.0 38.0 TLV2244IPWR TSSOP PW 14 2000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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