PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip FEATURES: DESCRIPTION: . Patented technology . Operating frequency up to 800MHz with 2pf load . Operating frequency up to 600MHz with 5pf load . Operating frequency up to 350MHz with 15pf load . Operating frequency up to 120MHz with 50pf load . Very low output pin to pin skew < 80ps . Very low pulse skew < 250ps . VCC = 1.65V to 3.6V . Propagation delay < 2.0 ns max with 15pf load . Low input capacitance: 3pf typical . 1:10 fanout . Available in 20pin 150mil wide QSOP package . Available in 20pin 300mil wide SOIC package . Available in 20pin 209mil wide SSOP package Potato Semiconductor’s PO49FCT3807B is designed for world top performance using submicron CMOS technology to achieve 800MHz output frequency with less than 80ps output skew. Pin Configuration 11/14/06 PO49FCT3807B is a 1 . 6 5 V t o 3.6V CMOS 1 input to 10 Output Buffered Driver. Typical applications are clock and signal distribution. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment. Logic Block Diagram Pin Description Pin Name INA O1 to O10 Description Input Outputs 1 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 11/14/06 800MHz TTL/CMOS Potato Chip Maximum Ratings Description Max Unit Storage Temperature -65 to 150 °C Operation Temperature -40 to 85 °C Operation Voltage -0.5 to +4.6 V Input Voltage -0.5 to +5.5 V Output Voltage -0.5 to Vcc+0.5 V Note: stresses greater than listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability specification is not implied. DC Electrical Characteristics Symbol Description VOH Output High voltage VOL Test Conditions Min Typ Max Unit Vcc=3V Vin=VIH or VIL, IOH= -12mA 2.4 3 - V Output Low voltage Vcc=3V Vin=VIH or VIL, IOH=12mA - 0.4 0.5 V VIH Input High voltage Guaranteed Logic HIGH Level (Input Pin) 2 - 5.5 V VIL Input Low voltage Guaranteed Logic LOW Level (Input Pin) -0.5 - 0.8 V IIH Input High current Vcc = 3.6V and Vin = 5.5V - - 50 uA IIL Input Low current Vcc = 3.6V and Vin = 0V - - -50 uA VIK Clamp diode voltage Vcc = Min. And IIN = -18mA - -0.7 -1.2 V Notes: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25 °C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. VoH = Vcc – 0.6V at rated current 2 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 11/14/06 800MHz TTL/CMOS Potato Chip Power Supply Characteristics Symbol IccQ Description Quiescent Power Supply Current Test Conditions (1) Min Typ Max Unit Vcc=Max, Vin=Vcc or GND - 0.1 30 uA Notes: 1. 2. 3. 4. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at Vcc = 3.3V, 25°C ambient. This parameter is guaranteed but not tested. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. Capacitance Parameters (1) Description Test Conditions Typ Max Unit Cin Input Capacitance Vin = 0V 3 4 pF Cout Output Capacitance Vout = 0V - 6 pF Notes: 1 This parameter is determined by device characterization but not production tested. Switching Characteristics Symbol Description Test Conditions (1) M ax Unit tPLH Propagation Delay A to Bn CL = 15pF 2.0 ns tPHL Propagation Delay A to Bn CL = 15pF 2.0 ns tr/tf Rise/Fall Time 0.8V – 2.0V ns ps ps tsk(p) Pulse Skew (Same Package) CL = 15pF, 125MHz tsk(o) Output Pin to Pin Skew (Same Package) CL = 15pF, 125MHz 0.8 250 80 Output Skew (Different Package) CL = 15pF, 125MHz 400 ps tsk(pp) fmax Input Frequency CL = 5 0 p F 120 MHz fmax Input Frequency CL =15pF 350 MHz fmax Input Frequency CL = 5pF 600 MHz fmax Input Frequency CL = 2pF 800 MHz Notes: 1. See test circuits and waveforms. 2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested. 3. Airflow of 1m/s is recommended for frequencies above 133MHz 3 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip 11/14/06 Test Waveforms Test Circuit 50Ω 4 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip 11/14/06 Packaging Mechanical Drawing: 20 pin QSOP Packaging Mechanical Drawing: 20 pin SOIC 5 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 800MHz TTL/CMOS Potato Chip 11/14/06 Packaging Mechanical Drawing: 20 pin SSOP 20 0.55 .022 0.95 .037 .197 .220 1 5.00 5.60 .272 .295 6.90 7.50 .004 .009 .291 .322 7.40 8.20 0.09 0.25 .078 2.00 Max SEATING PLANE .0256 BSC 0.65 .0098 Max. 0.25 .002 Min 0.050 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS 6 Copyright © 2005-2006, Potato Semiconductor Corporation PO49FCT3807B 3.3V Dual 1:10 CMOS Clock Buffered Driver 11/14/06 800MHz TTL/CMOS Potato Chip Ordering Information Ordering Code Package Top-Marking TA PO49FCT3807BCU 20pin SOIC Tube Pb-free & Green PO49FCT3807BC -40°C to 85°C PO49FCT3807BCR 20pin SOIC Tape and reel Pb-free & Green PO49FCT3807BC -40°C to 85°C PO49FCT3807BQU 20-pin QSOP Tube Pb-free & Green PO49FCT3807BQ -40°C to 85°C PO49FCT3807BQR 20-pin QSOP Tape and reel Pb-free & Green PO49FCT3807BQ -40°C to 85°C PO49FCT3807BSU 20-pin SSOP Tube Pb-free & Green PO49FCT3807BS -40°C to 85°C PO49FCT3807BSR 20-pin SSOP Tape and reel Pb-free & Green PO49FCT3807BS -40°C to 85°C 7 Copyright © 2005-2006, Potato Semiconductor Corporation