KODENSHI KK74180N

TECHNICAL DATA
KK74180
9-Bit ODD/EVEN Parity
Generators/Checkers
ORDERING INFORMATION
KK74180N Plastic
KK74180D SOIC
TA = -10° to 70° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 14 =VCC
PIN 7 = GND
FUNCTION TABLE
Inputs
Σ of H’s at EVEN
A Thru H
Output
ODD
Σ
EVEN
Σ
ODD
EVEN
H
L
H
L
ODD
H
L
L
H
EVEN
L
H
L
H
ODD
L
H
H
L
X
H
H
L
L
X
L
L
H
H
X =don’t care
1
KK74180
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
Supply Voltage
7.0
V
VIN
Input Voltage
5.5
V
IOL
Low Level Output Current
16
mA
Tstg
Storage Temperature Range
-65 to +150
°C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
5.25
V
VCC
Supply Voltage
4.75
VIH
High Level Input Voltage
2.0
VIL
Low Level Input Voltage
0.8
V
IOH
High Level Output Current
-800
µA
IOL
Low Level Output Current
16
mA
TA
Ambient Temperature Range
+70
°C
-10
V
DC ELECTRICAL CHARACTERISTICS over full operating conditions
Symbol
Parameter
Test Conditions
Guaranteed Limit
Min
VIK
Input Clamp Voltage
VCC = min, IIN = -10 mA
VOH
High Level Output Voltage
VCC = min, IOH=max
VOL
Low Level Output Voltage
VCC = min, IOL=max
II
Input Current at Maximum
Input Voltage
VCC = max, VIN= 5.5 V
IIH
IIL
High Level
Any data input
Input
Current
Even or odd
input
Low Level
Any data input
Input
Current
Even or odd
input
Unit
Max
-1.5
2.4
V
V
0.4
V
1
mA
40
VCC = max, VIN = 2.4 V
80
µA
-1.6
VCC = max, VIN = 0.4 V
IOS*
Short-Circuit Output Current
VCC = max
ICC
Supply Current
VCC = max, See Note
-18
-3.2
mA
-55
mA
56
mA
*Not more than one output should be shorted at a time.
Note: ICC is measured with even and odd inputs at 4.5 V, all other inputs and outputs open.
2
KK74180
AC ELECTRICAL CHARACTERISTICS (T = 25°C, VCC = 5.0 V, CL = 15 pF,
RL = 390 Ω, Input tr = tf = 10 ns)
Symbol
Parameter
tPLH
Propagation Delay Time, Low to High Level
Output (from Data toΣ EVEN)
tPHL
tPLH
Test Conditions
Propagation Delay Time, High to Low Level
Output (from Data toΣ EVEN)
Min
Max
60
ns
68
ODD input grounded
Propagation Delay Time, Low to High Level
Output (from Data toΣ ODD)
48
tPHL
Propagation Delay Time, High to Low Level
Output (from Data toΣ ODD)
38
tPLH
Propagation Delay Time, Low to High Level
Output (from Data toΣ EVEN)
48
tPHL
tPLH
Propagation Delay Time, High to Low Level
Output (from Data toΣ EVEN)
Unit
ns
ns
38
EVEN input grounded
Propagation Delay Time, Low to High Level
Output (from Data toΣ ODD)
60
tPHL
Propagation Delay Time, High to Low Level
Output (from Data toΣ ODD)
68
tPLH
Propagation Delay Time, Low to High Level
Output (from EVEN or ODD to
Σ EVEN or Σ ODD)
20
tPHL
Propagation Delay Time, High to Low Level
Output (from EVEN or ODD to
Σ EVEN or Σ ODD)
10
Figure 1. Switching Waveforms
ns
ns
Figure 2. Switching Waveforms
NOTES A. CL includes probe and jig capacitance.
B. All diodes are 1N916 or 1N3064.
Figure 3. Test Circuit
3
KK74180
N SUFFIX PLASTIC DIP
(MS - 001AA)
A
Dimension, mm
8
14
B
7
1
Symbol
MIN
MAX
A
18.67
19.69
B
6.1
7.11
5.33
C
F
L
C
-T- SEATING
PLANE
N
G
M
K
J
H
D
0.25 (0.010) M T
NOTES:
1. Dimensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
D
0.36
0.56
F
1.14
1.78
G
2.54
H
7.62
J
0°
10°
K
2.92
3.81
L
7.62
8.26
M
0.2
0.36
N
0.38
D SUFFIX SOIC
(MS - 012AB)
Dimension, mm
A
14
8
H
B
1
G
P
7
R x 45
C
-TK
D
SEATING
PLANE
J
0.25 (0.010) M T C M
NOTES:
1. Dimensions A and B do not include mold flash or protrusion.
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
for A; for B ‑ 0.25 mm (0.010) per side.
F
M
Symbol
MIN
MAX
A
8.55
8.75
B
3.8
4
C
1.35
1.75
D
0.33
0.51
F
0.4
1.27
G
1.27
H
5.27
J
0°
8°
K
0.1
0.25
M
0.19
0.25
P
5.8
6.2
R
0.25
0.5
4