TECHNICAL DATA KK74LV139 Dual 2-to-4 line decoder/demultiplexer; inverting The KK74LV139 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HCT139. The74LV139 is dual 2-to-4 line decoder/demultiplexer . This device has two independent decoders, each accepting two binary weighted inputs (A0a,A0b and A1a,A1b) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE) When nE is HIGH, every output is forced HIGH. The enable can be used as the data input for a 1-to-4 demultiplexer application. • • • • • Optimized for Low Voltage applications:1.2 to 3.6 V Demultiplexing capability Two independent 2-to-4 decoders Multifunction capability Active LOW mutually exclusive outputs N SUFFIX PLASTIC 16 1 D SUFFIX SOIC 16 1 ORDERING INFORMATION KK74LV139N Plastic KK74LV139D SOIC TA = -40° to 125° C for all packages • Output capability: standard PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs PIN 16 =VCC PIN 8 = GND Outputs E A1 A0 H L L L L X L L H H X L H L H Y0 Y1 Y2 Y3 H L H H H H H L H H H H H L H H H H H L H = high level (steady state) L = low level (steady state) X = don’t care 1 KK74LV139 * MAXIMUM RATINGS Symbol Parameter Value Conditions Unit VCC DC supply voltage -0.5 to +7.0 IIK DC input diode current ±20 VI< - 0.5 or VI> Vcc+0.5V mA IOK DC output diode current ±50 mA IO DC output source or sink current ±25 VO< - 0.5 or VO> Vcc+0.5V -0.5В<Vo<Vcc+0.5B ICC DC VCC or GND current for types with standard outputs ±50 mA Tstg Storage Temperature -65 to +150 °C PD Power Dissipation per package Plastic DIP+ SOIC Package+ TL Lead temperature, 1.5 mm from Case for 4 seconds (Plastic DIP ), 0.3 mm (SOIC Package) V mA mW 750 500 °C 260 * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C SOIC Package: : - 8 mW/°C from 70° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC DC supply voltage 1.2 5.5 V VI DC input voltage, 0 VCC V VO DC output voltage 0 VCC V TA Operating ambient temperature range in free air -40 +125 °C tr, tf Input rise and fall times except for Schmitt-trigger inputs 0 0 0 500 200 100 50 ns/B Vcc= 1.0 ÷ 2.0В Vcc= 2.0 ÷ 2.7В Vcc= 2.7 ÷ 3.6В Vcc= 3.6 ÷ 5.5В This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK74LV139 DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions Guaranteed Limit VCC, В 25°C min VIH High-level input voltage 1.2 2.0 2.7 to 3.6 4.5 to 5.5 0.9 1.4 2.0 0.7 Vcc VIL Low -level input voltage 1.2 2.0 2.7 to 3.6 4.5 to 5.5 VOH High-level output voltage VOL Low-level output voltage max от -40°C to 85°C min max Unit от -40°C to 125°C min max 0.9 0.9 1.4 1.4 2.0 2.0 0.7 Vcc 0.7 Vcc 0.3 0.3 0.3 0.6 0.6 0.6 0.8 0.8 0.8 0.3 Vcc 0.3 Vcc 0.3 Vcc 1.8 1.8 2.5 2.5 2.8 2.8 3.4 3.4 4.3 4.3 5.3 5.3 2.40 2.20 3.60 3.50 В -I0=100µA VIH or VIL 1.2 2.0 2.7 3.0 3.6 4.5 5.5 1.85 2.55 2.85 3.45 4.35 5.35 VIH or VIL -IO=6.0 mA -IO=12.0 mA 3.0 4.5 2.48 3.70 VIH or VIL I0=100µA 1.2 2.0 3.0 - 0.15 0.15 0.15 - 0.2 0.2 0.2 - 0.2 0.2 0.2 B VIH or VIL IO=6.0 mA IO=12.0 mA 3.0 4.5 - 0.33 0.40 - 0.40 0.55 - 0.50 0.65 B В В B II Input leakage current VCC or GND 5.5 - ±0.1 - ±1.0 - ±1.0 мкА ICC Quiescent supply current VCC or GND IO=0 5.5 - 8.0 - 80 - 160 мкА 3 KK74LV139 AC ELECTRICAL CHARACTERISTICS (CL=50 pF, tLH = tHL = 2.5 nc, VIL=0B, VIH=VCC) Symbol Parameter VCC Guaranteed Limit V 25°C min max tPLH, tPHL Propagation delay, input A to output Y (Figures 1) - tPLH, tPHL - 140 27 20 16 13 120 22 16 13 10 7.0 CI 1.2 2.0 2.7 3.0 4.5 1.2 Propagation delay , E 2.0 to output Y 2.7 (Figures 2) 3.0 4.5 5.0 Input capacitance Т=+25 оС от -40°C to 85°C max min - - от -40°C to 125°C min max 140 31 23 18 15 120 27 20 16 13 - - 140 39 29 23 19 120 34 25 20 16 ns ns pF Power dissipation capacitance (per enabled output) CPD Unit Typical @25°C,VCC=5.5 V 84∗ Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC pF ∗ - Power dissipation capacitance per multiplexer tf tr INPUT A OUTPUT Y tPHL 90% 50% 10% Vcc GND Figure 1. Switching Waveforms Vcc 90% 50% 10% tPLH 90% 50% 10% tf tr INPUT E OUTPUT Y GND tPLH tPHL 90% 50% 10% Figure 2. Switching Waveforms 4 KK74LV139 TEST POINT DEVICE UNDER TEST OUTPUT * C L * Includes all prode and jig capacitance Figure 3. Test Circuit EXPANDED LOGIC DIAGRAM (1/2 of Device) 5 KK74LV139 N SUFFIX PLASTIC DIP (MS - 001BB) A Dimension, mm 9 16 B 1 8 Symbol MIN MAX A 18.67 19.69 B 6.1 7.11 5.33 C F L C -T- SEATING PLANE N G K D M H J 0.25 (0.010) M T NOTES: 1. Dimensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D 0.36 0.56 F 1.14 1.78 G 2.54 H 7.62 J 0° 10° K 2.92 3.81 L 7.62 8.26 M 0.2 0.36 N 0.38 D SUFFIX SOIC (MS - 012AC) Dimension, mm A 16 9 H B 1 G P 8 R x 45 C -TK D SEATING PLANE J 0.25 (0.010) M T C M NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side. F M Symbol MIN MAX A 9.8 10 B 3.8 4 C 1.35 1.75 D 0.33 0.51 F 0.4 1.27 G 1.27 H 5.72 J 0° 8° K 0.1 0.25 M 0.19 0.25 P 5.8 6.2 R 0.25 0.5 6