Si1000-C Ultra-Low Power 64 kB, 10-bit ADC MCU with Integrated 240–960 MHz Transceiver Transceiver Features Supply Voltage: 1.8 to 3.6 V - Typical sleep mode current < 0.1 µA; retains state and RAM contents over full supply range; fast wakeup of < 2 µs - Two built-in brown-out detectors cover sleep and active modes 10-Bit Analog to Digital Converter - Up to 300 ksps - Up to 18 external inputs - External pin or internal VREF (no external capacitor required) - Built-in temperature sensor (±3 °C); no calibration required - External conversion start input option - Autonomous burst mode with 16-bit automatic averaging accumulator Dual Comparators - Programmable hysteresis and response time - Configurable as interrupt or reset source - Low current (< 0.5 µA) High-Speed 8051 µC Core - Pipe-lined instruction architecture; executes 70% of instructions in 1 or 2 system clocks Development Kit: Si1000DK XTAL4 Programmable packet handler TX and RX 64 byte FIFOs Frequency hopping capability On-chip crystal tuning Clock Sources - Precision internal oscillators: 24.5 MHz with ±2% accuracy sup- Low power 20 MHz internal oscillator - External oscillator: crystal, RC, C, CMOS clock - smaRTClock oscillator: 32.768 kHz crystal or self-oscillate 6-bit IREF 256 Byte SRAM 4096 Byte XRAM Precision 24.5 MHz Oscillator XCVR IREF0 PA Internal External VREF VREF TX A M U X 10-bit 300ksps ADC CRC Engine VDD VREF Temp Sensor CP0, CP0A CP1, CP1A SFR Bus AGC RXp RXn LNA Mixer GND + - PGA ADC + - Comparators Digital Peripherals Transceiver Control Interface Digital Modem Delta Sigma Modulator Digital Logic UART External Oscillator Circuit Timers 0, 1, 2, 3 smaRTClock Oscillator PCA/ WDT System Clock Configuration Wireless MCU Antenna diversity and transmit/receive switch control 64k Byte ISP Flash Program Memory Low Power 20 MHz Oscillator XTAL3 Auto-frequency calibration (AFC) (240-960 MHz) SYSCLK XTAL2 Data rate = 0.123 to 256 kbps Analog Peripherals VREG XTAL1 - CIP-51 8051 Controller Core C2D GND - 18.5 mA receive - 85 mA @ +20 dBm transmit Ordering Part Number - Si1000-C-GM, 42-pin QFN 5 x 7 mm2 - 25 MIPS peak throughput with 25 MHz clock VDD RF power consumption ports UART operation; spread-spectrum mode for reduced EMI system debug (no emulator required) Debug / Programming Hardware Max output power = +20 dBm programmable counter array (PCA) On-Chip Debug - On-chip debug circuitry facilitates full speed, non-intrusive in- C2CK/RST FSK, GFSK, and OOK modulation concurrently - 4352 bytes internal data RAM (256 + 4K) Wake Sensitivity = –121 dBm - Low power 32-bit smaRTClock - Four general purpose 16-bit counter/timers; six channel sectors; full read/write/erase functionality over the entire supply range Reset Frequency range = 240–960 MHz Digital Peripherals - 22 port I/O - Hardware enhanced UART, SPI and I2C serial ports available Memory - 64 kB bytes Flash; in-system programmable in 1024-byte Power On Reset/PMU - XIN XOUT OSC Priority Crossbar Decoder SMBus SPI 0 Copyright © 2010 by Silicon Laboratories Port I/O Config 22 ANALOG & DIGITAL I/O 1.15.10