THV3543_Rev.1.00_E THV3543 2 channel Buck/Boost 2 channel Charge Pump Controller Description Features THV3543 is a controller IC for multi-channel power supply system which includes 2 channel DC/DC converter with built-in power MOSFETs and 2 channel charge pump circuits. THV3543 has internal soft start, under voltage protection, over voltage protection and over current protection. CH-1 is a Boost DC/DC converter which can provide two optional modes of output voltage: the adjustable mode with external resistor or the fixed 15.6V mode requires no external resistors. CH-2 is a Buck DC/DC converter. Its output voltage is fixed at 3.3V. Positive charge pump (VGH) and negative charge pump (VGL) can provide two optional modes of output voltage: the adjustable mode with external resistor or the fixed mode (VGH at 35.6V, VGL at -6V) requires no external resistors. THV3543 has LDO and operational amplifier which can be used for Half AVDD or Vcom. Thus THV3543 can produce various necessary voltages for LCD panels and ideal for constructing TFT-LCD Bias power supply system. ･QFN40 package ･Input Voltage Range : 4.2～15V ･Boost Converter with built-in Power MOSFET ･Buck Converter with built-in Power MOSFET 500kHz Switching Frequency Under Voltage Protection Over Voltage Protection Over Current Protection ･Positive/Negative Charge Pumps ･LDO ･Operational Amplifier INV_AMP LSW_OUT1 LL2 LL2 V_LDO NON_AMP LX1 VCC INV_LDO PVCC LX1 NC BST2 LX1 NC SGND VO1_IN SYSUVLO PANEL_EN Pin Assignment Applications V_AMP ･LCD TV Bias Power Supply ･LCD Monitor Bias Power Supply Connect the Exposed Pad to GND for enhanced thermal performance. THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 1/19 THV3543_Rev.1.00_E Output Channel Descriptions Output Channel CH-1 CH-2 VGH VGL AMP LDO LSW_OUT1 LSW_OUT2 Description PWM Boost DC/DC converter PWM Buck DC/DC converter Positive voltage charge pump Negative voltage charge pump Operational amplifier LDO Output for the external load switch 1 Output for the external load switch 2 THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 2/19 THV3543_Rev.1.00_E Block Diagram THV3543 TFT Multi Channel controller Vin=12V VCC VREG5 5V REG UVLO SYSUVLO LX1 TSD VO1_IN VO1 VO1 AVDD VO2=3.3V VCC3.3V LX1 SEL Max Duty Mode Select LX1 INV1 VREG5 + SS + Comp - op SS_OK1 VREF + - STOP OSC SS_OK2 FB1 PGND TEST OVP1 + UVP1 + LSW_OUT1 LSW PG_VGL PVCC VO2_IN VO2 VREG5 + - - + Comp - gm + SS BST2 SS_OK2 VREF STOP OSC UVLO Max Duty PC2 + + LL2 LL2 OVP2 UVP2 Vin=12V VO2=3.3V UVP2 P_GOOD VO2_OK LSW_OUT2 PG_LOGIC V_ VGH VGH VGH_FB AVDD Mode Select + OUT_VGH VGH SEL OSC VREF + SS_OK_LSW PG_ VGH STOP PG_VGH P_GOOD VGH_OK V_ VGL VGL VGL_FB VO1 VGL Mode Select OUT_VGL + STOP SEL OSC + Vin PG_ VGL V_AMP PANEL_EN SS_OK1 - NON_AMP + STOP Op OUT_AMP UVLO INV_AMP Timer Latch UVP1, UVP2 OVP2 VCC VREF Vref Error Detection PG_VGL, PG_VGH V_LDO VREF V_VGH + OSC OUT_LDO SGND cur_ limit INV_LDO THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 3/19 THV3543_Rev.1.00_E Pin Descriptions Pin # Symbol 1 PC2 2 FB1 3 VREG5 4 VO2_IN Function Description Output for CH-2 error Output pin for CH-2 error amplifier. Connect a capacitor between amplifier PC2 and GND for phase compensation. Output for CH-1 error Output pin for CH-1 error amplifier. Connect a resistor and a amplifier capacitor between FB1 pin and INV1 pin for phase compensation. Output for 5V regulator Output pin for 5V regulator of the control circuit. Connect an external capacitor (10µF). Input for CH-2 feedback Feedback voltage input pin for CH-2. voltage CH-2 is controlled so that VO2_IN pin becomes 3.3V. Inverting input for CH-1 error amplifier. In fixed output voltage 5 INV1 Inverting input for CH-1 error amplifier mode, connect a resistor and a capacitor for phase compensation. In adjustable output voltage mode, connect resistors between the output and INV1 pin, and between INV1 pin and GND, so that this pin become 1.2V. After positive charge pump started properly, this pin switches 6 VGH_OK VGH power good output from Low level to High level. Connect an external pull-up resistor. 7 PG_LOGIC 8 VO2_OK Input for load switch Input pin for controlling LSW_OUT2. control Output for CH-2 power good After CH-2 started properly, this pin switches from Low level to High level. Connect an external pull-up resistor. 1.2V reference voltage for feedback of negative voltage charge 9 VREF Reference voltage pump. Connect an external capacitor (0.01µF) for the stability. 10 TEST Test pin Used for the production test before shipment. Connect to GND. SYSUVLO pin shuts down the operation of IC, when the power supply voltage drops below regulated value. Resistors are 11 SYSUVLO Input for System internally connected between VCC pin and SYSUVLO pin, and UVLO between SYSUVLO pin and GND. It is possible to set the detection voltage at any value by connecting external resister divider to SYSUVLO pin. 12 13 14 15 PANEL_EN NC INV_LDO Input for Panel power supply enable When Low level voltage is applied to PANEL_EN pin, negative voltage charge pump, Load Switch 1 and positive voltage charge pump stop their operations. If not in use, connect to VREG5 pin. NC No connection. Leave open. LDO amplifier inverting LDO inverting input. The voltage on this pin is 1.2V in the input normal operation. 16 SGND Ground for signal Ground pin for the control circuit block. 17 V_LDO Power supply for LDO Power supply pin for LDO amplifier. THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 4/19 THV3543_Rev.1.00_E Pin # Symbol Function 18 NON_AMP 19 INV_AMP 20 V_AMP 21 OUT_AMP 22 OUT_LDO Output for LDO Output pin for LDO. 23 OUT_VGL Output for VGL driver Output pin for the negative voltage charge pump driver. Non-inverting input Description for operational amplifier Inverting input for operational amplifier Power supply for operational amplifier Output for operational amplifier Non-inverting input pin for operational amplifier. Inverting input pin for operational amplifier. Power supply pin for operational amplifier. Output pin for operational amplifier. 24 V_VGL Power supply for VGL Power supply pin for negative voltage charge pump driver circuit. 25 V_VGH Power supply for VGH Power supply pin for positive voltage charge pump driver circuit. 26 OUT_VGH Output for VGH driver Output pin for the positive voltage charge pump driver. 27 PGND Power Ground Power Ground pin. Feedback voltage input for negative voltage charge pump. In fixed output voltage mode, connect this pin to the output of 28 VGL_FB Input for VGL feedback negative voltage charge pump. In adjustable output voltage mode, connect resistors between the output and VGL_FB pin, and between VGL_FB pin and VREF pin, so that this pin become 0V. Feedback voltage input for positive voltage charge pump. In fixed output voltage mode, connect to the output of positive voltage 29 VGH_FB Input for VGH feedback charge pump. In adjustable output voltage mode, connect resistors between the output and VGH_FB pin, and between VGH_FB pin and GND, so that this pin become 1.2V. 30 LSW_OUT2 31 LSW_OUT1 32 33 LL2 34 BST2 35 PVCC 36 VCC Output 2 for load switch control Gate control pin for Load Switch 2. Output 1 Gate control pin for Load Switch 1, with built-in Soft Start for load switch control function. Output for CH-2 Switching output pin for CH-2. Power supply Power supply pin for CH-2 High side driver. Connect a capacitor for CH-2 High side driver between BST2 pin and LL2 pin. Power supply for CH-2 Power supply pin for CH-2. Power supply for control circuit Power supply pin for the control circuit block. 37 38 LX1 Output for CH-1 Switching output pin for CH-1. 39 40 VO1_IN Feedback voltage input for CH-1 Feedback voltage input pin for CH-1 in fixed output voltage mode. Connect to output for CH-1. In adjustable output voltage mode, connect to ground. THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 5/19 THV3543_Rev.1.00_E Absolute Maximum Ratings Parameter VCC, PVCC INV1, FB1, VO2_IN, PG_LOGIC, TEST, SYSUVLO, PANEL_EN, INV_LDO, VGL_FB VREG5, PC2, VGH_OK, VO2_OK, VREF, BST2-LL2 NON_AMP, INV_AMP, VO1_IN VGH_FB VGL_FB OUT_AMP, OUT_LDO, OUT_VGL, OUT_VGH, LSW_OUT2, LSW_OUT1 LL2 BST2 LX1 V_LDO, V_AMP, V_VGL, V_VGH Power Dissipation Junction Temperature Operating Temperature Range Storage Temperature Range Symbol Vcc Rating 18 Units V VL_in 6.5 V VL_out VH_in1 VH_in2 VH_in3 6.5 20 40 -8 V V V V VH_out1 20 V VH_out2 VH_out3 VH_out4 VH_cc Pd Tj Ta Tstg 18 24.5 25 20 4295 (Ta<25°C) 150 -40 ~ +85 -55 ~ +150 V V V V mW °C °C °C Power Dissipation Power Dissipation Pd (mW) 5000 4500 4000 3500 3000 2500 2000 1500 1000 500 0 -40 -20 0 20 40 60 80 100 120 140 160 Ambient Temperature Ta (℃) THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 6/19 THV3543_Rev.1.00_E Recommended Operating Conditions Parameter VCC, PVCC VGH_OK, PG_LOGIC, VO2_OK, PANEL_EN V_LDO V_AMP, V_VGL, V_VGH NON_AMP, LSW_OUT2, LSW_OUT1 External capacitor for VREF External capacitor for VREG5 SYSUVLO, Min 4.2 Typ - Max 15 Units V -0.1 - 5.5 V 3.0 4.2 -0.1 - 0.01 10 17 17 17 - V V V µF µF THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 7/19 THV3543_Rev.1.00_E Electrical Characteristics（at Vcc=12V, Ta=25℃, unless otherwise noted.） Parameter Whole of Circuit Symbol Conditions Average Current Consumption Icc VCC pin Reference Voltage Vref Cvref=0.01µF Vref(load) Iref=-100µA ~ -1mA Load Regulation (Reference Voltage) Line Regulation (Reference Voltage) Vref(line) Iref=-100µA VCC=4.2 ~ 15V Min Typ Max Units − 5.0 − mA 1.188 1.200 1.212 V − 2 5 mV − 2 8 mV Output Voltage (5V Regulator) Vreg5(range) Io=-1mA − 5.0 − V Load Regulation (5V Regulator) Vreg5(load) Io=-0.1mA ~ -5mA − − 100 mV Line Regulation (5V Regulator) Vreg5(line) − − 50 mV Oscillation Frequency Fosc 430 500 570 kHz Io=-1mA VCC=5.5 ~ 15V UVLO Release Voltage Vuvlo VCC pin 5.0 5.46 6.00 V UVLO Hysteresis Voltage Vuvlo(hys) VCC pin 1.4 1.96 2.5 V System UVLO Release Voltage Vsysuvlo SYSUVLO pin 1.44 1.56 1.68 V Vsysuvlo(hys) SYSUVLO pin 0.41 0.56 0.71 V 15.2 15.6 16.0 V System UVLO Hysteresis Voltage CH-1 Boost Converter Block Feedback Voltage (in fixed mode) Feedback Voltage (in adjustable mode) VO1_IN Voltage Level (in fixed mode) VO1_IN Voltage Level (in adjustable mode) Output On-Resistance Vo1(fix) Vref – Vo1(adj) 10m Vref Vref + 10m V Vo1_in(fix)_th 4.6 − − V Vo1_in(adj)_th − − 2.7 V Ron(ch-1) − 100 170 mΩ Output Off Leakage Current Ileak(ch-1) − − 10 µA Maximum Duty Cycle Dmax(ch-1) LX1 pin pulse − 5 − % Vuvp(ch-1） VO1 output voltage − 85 − % − 12.2 − ms − 125 − % 4.0 − − A 3.23 3.30 3.37 V − 170 290 mΩ Short Circuit Detection Threshold Voltage Delay Time for Short Circuit Detection Latch Over Voltage Detection Threshold Voltage Over Current Detection Threshold Voltage tuvp(ch-1) Vovp(ch-1） VO1 output voltage VCC=12V, Ics1 VO1=15.6V, VO1 output current CH-2 Buck Converter Block Feedback Voltage Vo2 Output On-Resistance Ron(ch-2) THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 8/19 THV3543_Rev.1.00_E Parameter Symbol Conditions Min Typ Max Units − − 10 µA Output Off Leakage Current Ileak(ch-2) Maximum Duty Cycle Dmax(ch-2) LL2 pin pulse − 88 − % Vuvp(ch-2） VO2 output voltage − 85 − % − 12.2 − ms − 125 − % − 2.44 − ms 3.5 − − A − 85 − % Short Circuit Detection Threshold Voltage Delay Time for Short Circuit Detection Latch Over Voltage Detection Threshold Voltage Delay Time for Over Voltage Detection Latch Over Current Detection Threshold Voltage Power Good Threshold Voltage Output On-Resistance of Power Good Output Leakage Current of Power Good tuvp(ch-2) Vovp(ch-2） VO2 output voltage Tovp(ch-2) Ics(ch-2) VCC=12V, VO2 output current Vpg(ch-2) Ipg(ch-2) VO2_OK pin − 0.8 1.6 kΩ Ipgleak(ch-2) VO2_OK=5V − − 2 µA 34.5 35.6 36.7 V VGH Positive Charge Pump Block Feedback Voltage (in fixed mode) Feedback Voltage (in variable mode) VGH(fix) High Side Output On-Resistance Ronh(VGH) Low Side Output On-Resistance Ronl(VGH) Duty Cycle Duty(VGH) Short Circuit Detection Threshold Voltage Power Good Threshold Voltage Output On-Resistance of Power Good Output Leakage Current of Power Good Vref – VGH(adj) 20m V_VGH=15V Ioh=-50mA V_VGH=15V Ioh=50mA Vref Vref + 20m V − 3.5 − Ω − 3.5 − Ω − 50 − % Vuvp(VGH） VGH output voltage − 85 − % Vpg(VGH) VGH output voltage − 85 − % Ipg(VGH) VGH_OK pin − 0.8 1.6 kΩ Ipgleak(VGH) VGH_OK=5V − − 2 µA VGL(fix) -6.19 -6.00 -5.81 V VGL(adj) -20 0 20 mV − 11 − Ω − 5 − Ω VGL Negative Charge Pump Block Feedback Voltage (in fixed mode) Feedback Voltage (in variable mode) High Side Output On-Resistance Ronh(VGL) Low Side Output On-Resistance Ronl(VGL) V_VGL=15V Ioh=-50mA V_VGL=15V Ioh=50mA THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 9/19 THV3543_Rev.1.00_E Parameter Duty Cycle Short Circuit Detection Threshold Voltage Symbol Conditions Min Typ Max Units − 80 − % VGL output voltage − 82 − % PANEL_EN Voltege 0.88 1.0 1.12 V Duty(VGL) Vuvp(VGL） VGL Start-Up Control Input PANEL_EN Threshold Voltage (th) LDO Block Feedback Voltage Vldo Load Regulation Vldo(load) Vref – 20m Vref Vref + 20m V V_LDO=15.6V, OUT_LDO=15.2V − − 45 mV 250 − − mA − − 0.15 V -13 10 34 mV -50 − 50 mV − − 50 mV 3 − 100 180 − mA − -180 -100 mA − − 200 nA − 10 − ms − 1.2 − kΩ − − 1 µA 0.6 − 1.1 V − 1.2 − kΩ − − 1 µA Ildo=-0.1m ~ -20mA Max Output Current Ildo(max) Dropout voltage Vdrop(ldo) V_LDO=15.6V, OUT_LDO=15.2V V_LDO=15.6V, OUT_LDO=15.2V Ildo=-10mA Operational Amplifier Block Input Offset Voltage Vamp(off) Load Regulation Vamp(load) Line Regulation Vamp(line) Common Mode Input Voltage Range Iamp=0 ~ +/-5mA V_AMP=9V ~ 17V OUT_AMP=6V Vamp(range) V_AMP – 0.1 V V_AMP=12V, Output Source Maximum Current Ivcomh(max) OUT_AMP=6V Output drop : 0.5V V_AMP=12V, Output Sink Maximum Current Ivcoml(max) OUT_AMP=6V Output rise : 0.5V Input Bias Current Iib(vcom) Switching Control Block 1 Soft Start Time tss(lsw_out1) Output Resistance Ro(1sw_out1) Output Off Leakage Current Ileak Io=1mA Switching Control Block 2 Input Threshold Voltage V(pg_logic) Output Resistance Ro(1sw_out2) Output Off Leakage Current Ileak Io=1mA THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 10/19 THV3543_Rev.1.00_E Functional Description System UVLO THV3543 has built-in UVLO (Under Voltage Lockout) circuit to prevent low-voltage input malfunction. The internal specified threshold voltage is 3.5V, the release voltage is 5.46V. When input power supply voltage (Vin) reaches the UVLO release voltage (5.46V), the device starts the soft start operation and output voltage (Vo) gradually rises up to the regular voltage. When the input power supply voltage (Vin) drops below 3.5V, UVLO stops switching operation immediately and starts discharging soft start. Accordingly, the output voltage (Vo) drops (See Figure 1). 5.46V Vin 3.50V switching Operating Stop Stop Operating Vo Figure 1. UVLO Operation Example The UVLO threshold voltage also can be set optionally by applying divided Vin by an external resistance to SYSUVLO pin (See Figure 2). Please use external resistance of enough lower value than the internal resistance. The System UVLO threshold voltage is given by the following formulas. System UVLO Release Voltage = 1.56 × R1 + R2 R2 System UVLO Detection Voltage(Lower Limit Voltage of Operation) = 1.0 × R1 + R2 R2 Vin VCC 500k R1 SYSUVLO R2 UVLO COMP 200k Figure 2. System UVLO Setting Circuit THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 11/19 THV3543_Rev.1.00_E Voltage Reference Circuit Voltage reference circuit generates temperature-compensated voltage (1.2V) which is used as the internal reference voltage. Also an external load current (up to 1mA, maximum) can be obtained from VREF pin. Please connect a capacitor (0.01µF) between VREF pin and SGND for stability. VREG5 VREG5 is Built-in 5V local regulator. Please connect an external capacitor (10µF) between VREG5 pin and SGND. Oscillator Circuit Oscillation frequency is internally fixed at 500kHz. Thermal Shut Down (TSD) Thermal Shut Down circuit is built in to prevent damages caused by excessive heat. When the junction temperature reaches 175 °C, TSD circuit stops switching operation and the regulator VREG5 operation. The release temperature is 160°C. DC/DC Converter CH-1, CH-2 CH-1 and CH-2 are PWM controllers. CH-1 is for Boost, CH-2 is fixed at 3.3V for Buck. Power MOSFET and Over Current Detection Circuit are built in. Maximum Duty Cycle ratio of CH-1 LX1 pin is 8.3%, CH-2 LL2 pin is 88%. Charge Pump Circuit VGH, VGL VGH is positive charge pump, and VGL is negative. VGH and VGL also can operate in PFM mode. The duty cycle ratio of VGH is fixed at 50%, VGL is fixed at 80%. VO2_OK, VGH_OK VO2_OK and VGH_OK are open drain output of the pull-down transistor. When the power supply is turned on, the transistor is turned on pulling VO2_OK pin and VGH_OK pin to ground level. When each voltage on CH-2 and VGH reaches 85% of normal output voltage, VO2_OK and VGH_OK are turned off respectively. Load Switch Control LSW_OUT1 pin controls the external P-CH MOSFET load switch after normal start-up of VGL. Soft start function is built in. LSW_OUT2 pin is open drain output. When PG_LOGIC pin is turned High level, pull-down transistor is turned off. LSW_OUT2 pin can be used as the external N-CH MOSFET load switch controller or level shifter. Operational Amplifier Operational amplifier is used for Vcom or Half AVDD. Use an external bipolar transistor when large output current is required. LDO LDO have built-in recovery type current limiting protection. The load current capacity is within 250mA. The output voltage is set by external resistance (See “Output Voltage Setting (LDO)”). THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 12/19 THV3543_Rev.1.00_E Soft Start Circuit Soft start function raises the output voltage gradually to prevent overshoot and inrush current at start-up. CH-1, CH-2 and Load Switch 1 circuit have internal soft start function. The output voltage of these internal soft start circuits rise according to each internal start-up sequences. Accordingly, the output of DC/DC converter and the output after load switch rise. Soft start operation is completed when these outputs have reached each regular voltage. Soft start time of CH-1, CH-2 and Load Switch 1 are set to 10msec (See Figure 3). Start-up Sequence Figure 3 shows the waveform of start-up sequence. The device starts switching after normal start-up of CH-1 and CH-2. VGL starts after normal start-up of CH-1 output (VO1) and also when PANEL_EN pin is turned High level. VGH starts with 5msec delay after start-up of Load Switch 1. Open drain pins, VO2_OK and VGH_OK, start after normal start-up of CH-2 and VGH respectively. VGH 10msec 10msec 10msec 5msec VO1 AVDD LDO (V_LDO=V_VGH) VO2 3.3V VGH_OK VO2_OK VGL (PANEL_EN=High) Figure 3. Start-up Sequence Waveforms PANEL_EN During the start-up operation of IC, VGL starts after normal start-up of CH-1 output (VO1) and also when PANEL_EN pin is turned High level. If Low level voltage is applied to PANEL_EN pin, VGL/Load Switch 1/VGH stop operating. High level voltage is applied to VGL_ON pin again, operations after VGL are restarted. If not in use, please connect to VREG5 pin. THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 13/19 THV3543_Rev.1.00_E Under Voltage Protection (UVP) UVP is protective function which shuts down the power supply, when under voltage condition of DC/DC, VGH and VGL caused by short circuit continues for more than a definite period of time. The internal comparator monitors the output voltage. If the output voltage drops below a definite value, timer latch circuit starts operating (See Figure 4). When abnormal output continues for more than 12.2msec, the device stops switching operation and goes into latch state. If UVLO operates before the device goes into the latch state, the timer will be reset. As to VGH and VGL, UVP detection does not operate for 3msec immediately after start-up sequence. Please set the start-up time of charge pumps within 15msec to prevent start-up failure. AMP or COMP Output Voltage Detection + VREF UVP COMP + Timer Latch Vth Figure 4. Under Voltage Detection Circuit Over Voltage Protection (OVP) OVP is protective function which shuts down the power supply when output voltage on CH-1 and CH-2 exceed a defined voltage. CH-1 stops switching operation, when the voltage on INV1 pin exceeds 1.5V. CH-2 stops switching operation, when the voltage on VO2_IN pin exceeds 4.13V (See Figure 5) . As to CH-2, if abnormal output is detected, timer latch circuit operates. When abnormal output continues for 2.44msec, the device stops switching operation and goes into latch state. Output Voltage Dtection SS AMP PWM COMP OUT + VREF OVP COMP + Vth Figure 5. Over Voltage Detection Circuit Over Current Protection (OCP) CH-1 and CH-2 have built-in over current protection circuit. When load current exceeds a definite current, OCP stops switching operation of the device. OCP operates at more than 4.0A on CH-1, 3.5A on CH-2. If over current is detected continuously, low duty switching pulse is generated and that causes output voltage drop. When output voltage drops below a definite voltage for more than 12.2msec, UVP operates and the device goes into latch state. THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 14/19 THV3543_Rev.1.00_E Switching Channel Output Voltage Mode Output voltage mode of switching channel can be chosen the adjustable mode or the fixed mode, according to the setting of VO1_IN pin. When CH-1 output is connected directly to VO1_IN pin, the output voltage is turned into the fixed mode. CH-1 is fixed at 15.6V, VGH at 35.6V and VGL at -6V. When VO1_IN pin is connected to ground, the output voltage is turned into the adjustable mode. Output voltage of CH-1, VGH and VGL can be set by an external resistance. CH-2 is fixed at 3.3V in both modes. Output Voltage Setting (Adjustable Mode) In CH-1, the voltage on INV1 pin will be equal to the voltage on VREF by the action of feedback (See Figure 6). The voltage on INV1 pin is divided Vout1 by R1 and R2. Therefore, Vout1 × R2 = VREF R1 + R2 Thus, Vout1 C1 R1 R1 Vout1 = VREF × 1 + = 1 .2 × 1 + R2 R2 FB1 R1 R3 C2 Error AMP1 PWM Comp. - R2 INV1 VREF =1.2V + Figure 6. CH-1 Output Voltage Setting In VGH, the voltage on VGH_FB pin is controlled to be equal to the voltage on VREF (See Figure 7). The voltage on INV_VGH pin is divided voltage on VGH by R4 and R5. Therefore, VGH R4 R4 VGH = VREF × 1 + = 1 .2 × 1 + R5 R5 R4 VGH_FB R5 COMP VREF =1.2V + Output Circuit Figure 7. VGH Output Voltage Setting THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 15/19 THV3543_Rev.1.00_E In VGL, the voltage on VGL_FB pin is controlled to be equal to zero (See Figure 8). The current through VGL_FB pin can be ignored. Thus, VGL = − (VREF ) × R6 R6 = − 1 .2 × R7 R7 VGL R6 VGL_FB COMP + - Output Circuit R6 R7 R7 VREF =1.2V VGL VREF =1.2V 0V Figure 8. VGL Output Voltage Setting Output Voltage Setting (Fixed Mode) When the output of CH-1 is connected directly to VO1-IN pin, the output voltage is in the fixed mode. Connect the output of VGH and VGL directly to VGH_FB pin and VGL_FB pin respectively. CH-1, VGH and VHL are fixed at 15.6V, 35.6V and -6V respectively. In CH-1, connect a capacitor for phase compensation between VO1_IN pin and INV1 pin, and also a resistance and a capacitor between INV1 pin and FB1 pin (See Figure 9). Vout1 VO1_IN Error AMP1 - INV1 VREF =1.2V + PWM Comp. FB1 Figure 9. CH-1 Circuit in Fixed Output Voltage Mode THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 16/19 THV3543_Rev.1.00_E Output Voltage Setting (LDO) In LDO, the voltage on INV_LDO pin will be equal to the voltage on VREF by the action of feedback (See Figure 10). The voltage on INV_LDO pin is divided OUT_LDO by R8 and R9. Thus, R8 OUT_LDO = 1.2 × 1 + R9 Figure 10. LDO Circuit THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 17/19 THV3543_Rev.1.00_E Package Dimensions QFN40 pin Connect the Exposed Pad to GND for enhanced thermal performance. THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 18/19 THV3543_Rev.1.00_E Notices and Requests 1. The product specifications described in this material are subject to change without prior notice. 2. The circuit diagrams described in this material are examples of the application which may not always apply to the customer’s design. We are not responsible for possible errors and omissions in this material. Please note if errors or omissions should be found in this material, we may not be able to correct them immediately. 3. This material contains our copy right, know-how or other proprietary. Copying or disclosing to third parties the contents of this material without our prior permission is prohibited. 4. Note that if infringement of any third party's industrial ownership should occur by using this product, we will be exempted from the responsibility unless it directly relates to the production process or functions of the product. 5. This product is presumed to be used for general electric equipment, not for the applications which require very high reliability (including medical equipment directly concerning people's life, aerospace equipment, or nuclear control equipment). Also, when using this product for the equipment concerned with the control and safety of the transportation means, the traffic signal equipment, or various Types of safety equipment, please do it after applying appropriate measures to the product. 6. Despite our utmost efforts to improve the quality and reliability of the product, faults will occur with a certain small probability, which is inevitable to a semi-conductor product. Therefore, you are encouraged to have sufficiently redundant or error preventive design applied to the use of the product so as not to have our product cause any social or public damage. 7. Please note that this product is not designed to be radiation-proof. 8. Customers are asked, if required, to judge by themselves if this product falls under the category of strategic goods under the Foreign Exchange and Foreign Trade Control Law. 9. The product or peripheral parts may be damaged by a surge in voltage over the absolute maximum ratings or malfunction, if pins of the product are shorted by such as foreign substance. The damageｓ may cause a smoking and ignition. Therefore, you are encouraged to implement safety measures by adding protection devices, such as fuses. THine Electronics, Inc. E-mail: [email protected] THine Electronics, Inc. Copyright© 2011 THine Electronics, Inc. 19/19