ETC ADP3309ART-2.5

a
FEATURES
ⴞ1.2% Accuracy Over Line and Load Regulations @ 25ⴗC
Ultralow Dropout Voltage: 120 mV Typical @ 100 mA
Requires Only CO = 0.47 ␮F for Stability
anyCAP = Stable with All Types of Capacitors
(Including MLCC)
Current and Thermal Limiting
Low Noise
Low Shutdown Current: 1 ␮A
2.8 V to 12 V Supply Range
–20ⴗC to +85ⴗC Ambient Temperature Range
Several Fixed Voltage Options
Ultrasmall SOT-23-5 Package
Excellent Line and Load Regulations
anyCAP® 100 mA
Low Dropout Linear Regulator
ADP3309
FUNCTIONAL BLOCK DIAGRAM
ADP3309
Q1
IN
OUT
THERMAL
PROTECTION
ERR/NC
R1
CC
Q2
gm
DRIVER
R2
SD
BANDGAP
REF
GND
APPLICATIONS
Cellular Telephones
Notebook, Palmtop Computers
Battery Powered Systems
PCMCIA Regulator
Bar Code Scanners
Camcorders, Cameras
GENERAL DESCRIPTION
The ADP3309 is a member of the ADP330x family of precision
low dropout anyCAP voltage regulators. It is pin-for-pin and
functionally compatible with National’s LP2981, but offers
performance advantages. The ADP3309 stands out from conventional LDOs with a novel architecture and an enhanced
process. Its patented design requires only a 0.47 µF output
capacitor for stability. This device is stable with any type of
capacitor regardless of its ESR (Equivalent Series Resistance)
value, including ceramic types for space restricted applications.
The ADP3309 achieves ± 1.2% accuracy at room temperature
and ± 2.2% overall accuracy over temperature, line and load
regulations. The dropout voltage of the ADP3309 is only
120 mV (typical) at 100 mA. This device also includes a current
limit and a shutdown feature. In shutdown mode, the ground
current is reduced to ~1 µA.
The ADP3309 operates with a wide input voltage range from
2.8 V to 12 V and delivers a load current in excess of 100 mA.
The ADP3309 anyCAP LDO offers a wide range of output
voltages. For a 50 mA version, refer to the ADP3308 data sheet.
ERR/NC
ADP3309-3.3
VIN
IN
VOUT = 3.3V
OUT
+
–
C1 +
0.47␮F –
C2
0.47␮F
ON
OFF
SD
GND
Figure 1. Typical Application Circuit
anyCAP is a registered trademark of Analog Devices, Inc.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
(@TA = –20ⴗC to +85ⴗC, VIN = 7 V, CIN = 0.47 ␮F, COUT = 0.47 ␮F, unless
ADP3309-xx–SPECIFICATIONS otherwise noted.) The following specifications apply to all voltage options.
1
Parameter
Symbol
Conditions
Min
OUTPUT VOLTAGE ACCURACY
VOUT
VIN = VOUTNOM + 0.3 V to 12 V
IL = 0.1 mA to 100 mA
TA = 25°C
VIN = VOUTNOM + 0.3 V to 12 V
IL = 0.1 mA to 100 mA
Typ
Max
Unit
–1.2
+1.2
%
–2.2
+2.2
%
∆V O
∆V IN
∆V O
∆ IL
VIN = VOUTNOM + 0.3 V to 12 V
TA = 25°C
0.02
mV/V
IL = 0.1 mA to 100 mA
TA = 25°C
0.06
mV/mA
GROUND CURRENT
IGND
IL = 100 mA
IL = 0.1 mA
0.8
0.19
2.0
0.3
mA
mA
GROUND CURRENT IN DROPOUT
IGND
VIN = 2.4 V
IL = 0.1 mA
0.9
1.7
mA
VOUT = 98% of VOUTNOM
IL = 100 mA
IL = 10 mA
IL = 1 mA
0.12
0.025
0.004
0.25
0.07
0.015
V
V
V
0.3
V
V
1
9
µA
µA
0.005
1
µA
0.01
3
µA
LINE REGULATION
LOAD REGULATION
DROPOUT VOLTAGE
SHUTDOWN THRESHOLD
SHUTDOWN PIN INPUT CURRENT
VDROP
VTHSD
ISDIN
GROUND CURRENT IN SHUTDOWN IQ
MODE
ON
OFF
2.0
0 < VSD ≤ 5 V
5 < VSD ≤ 12 V @ VIN = 12 V
VSD = 0 V, VIN = 12 V
TA = 25°C
VSD = 0 V, VIN = 12 V
TA = 85°C
OUTPUT CURRENT IN SHUTDOWN
MODE
IOSD
TA = 25°C @ VIN = 12 V
TA = 85°C @ VIN = 12 V
2
4
µA
µA
ERROR PIN OUTPUT LEAKAGE
IEL
VEO = 5 V
13
µA
ERROR PIN OUTPUT
“LOW” VOLTAGE
VEOL
ISINK = 400 µA
0.12
0.3
V
PEAK LOAD CURRENT
ILDPK
VIN = VOUTNOM + 1 V, TA = 25°C
150
mA
OUTPUT NOISE @ 5 V OUTPUT
VNOISE
f = 10 Hz–100 kHz
100
µV rms
NOTES
1
Ambient temperature of 85°C corresponds to a junction temperature of 125°C under typical full load test conditions.
Specifications subject to change without notice.
–2–
REV. A
ADP3309
PIN FUNCTION DESCRIPTIONS
ABSOLUTE MAXIMUM RATINGS*
Input Supply Voltage . . . . . . . . . . . . . . . . . . . –0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient Temperature Range . . . –55°C to +125°C
Operating Junction Temperature Range . . . –55°C to +125°C
θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190°C/W
θJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
Pin Name
Function
1
2
3
IN
GND
SD
4
ERR/NC
5
OUT
Regulator Input.
Ground Pin.
Active Low Shutdown Pin. Connect to
ground to disable the regulator output.
When shutdown is not used, this pin
should be connected to the input pin.
Open Collector. Output that goes low
to indicate the output is about to go
out of regulation. This pin can be left open.
(NC = No Connect).
Output of the Regulator, fixed 2.5, 2.7, 2.85,
2.9, 3.0, 3.3 or 3.6 volts output voltage.
Bypass to ground with a 0.47 µF or larger
capacitor.
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
ORDERING GUIDE
Model
Voltage
Output
Package
Option*
Marking
Code
ADP3309ART-2.5
ADP3309ART-2.7
ADP3309ART-2.85
ADP3309ART-2.9
ADP3309ART-3
ADP3309ART-3.3
ADP3309ART-3.6
2.5 V
2.7 V
2.85 V
2.9 V
3.0 V
3.3 V
3.6 V
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
LDE
DNC
DVC
DWC
DPC
DRC
DSC
PIN CONFIGURATION
IN
OUT
ADP3309
GND
TOP VIEW
(Not to Scale)
SD
ERR/NC
NC = NO CONNECT
*SOT = Surface Mount.
Contact the factory for the availability of other output voltage options.
Other Member of anyCAP Family 1
Model
Output Current
Package Option2
ADP3308
50 mA
SOT-23-5 Lead
NOTES
1
See individual data sheet for detailed ordering information.
2
SOT = Surface Mount.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3309 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. A
–3–
WARNING!
ESD SENSITIVE DEVICE
ADP3309–Typical Performance Characteristics
3.302
I L = 0mA
OUTPUT VOLTAGE – Volts
IL = 10mA
3.300
3.299
IL = 50mA
3.298
3.297
VOUT = 3.3V
I L = 0mA
VOUT = 3.3V
VIN = 7V
3.301
3.301
OUTPUT VOLTAGE – Volts
1150
VOUT = 3.3V
GROUND CURRENT – ␮A
3.302
3.300
3.299
3.298
3.297
3.296
900
650
400
160
3.296
IL = 100mA
3.295
3.3
0
3.295
4
5
0
6 7 8 9 10 11 12 13 14
INPUT VOLTAGE – Volts
TPC 1. Line Regulation: Output
Voltage vs. Supply Voltage
10
20
30 40 50 60 70 80
OUTPUT LOAD – mA
0
90 100
TPC 2. Output Voltage vs. Load
Current
TPC 3. Quiescent Current vs.
Supply Voltage
0.2
900
1.2 2.4 3.6 4.8 6.0 7.2 8.4 9.6 10.8 12.0
INPUT VOLTAGE – Volts
1250
600
450
IL = 0 TO 100mA
300
0.0
–0.2
IL = 100mA
–0.3
0
25
50
75
OUTPUT LOAD – mA
100
TPC 4. Quiescent Current vs. Load
Current
–0.4
–45 –25
96
72
48
24
0
25
50
75
OUTPUT LOAD – mA
100
TPC 7. Dropout Voltage vs. Output
Current
500
250
IL = 0mA
–5
15
35
55 75
95
TEMPERATURE – ⴗC
115 135
TPC 6. Quiescent Current vs.
Temperature
8.0
VIN
VOUT = 3.3V
RL = 33⍀
4
3
2
1
0
750
0
–25
15 35 55 75 95 115 135
TEMPERATURE – ⴗC
5
INPUT/OUTPUT VOLTAGE – Volts
INPUT-OUTPUT VOLTAGE – mV
–5
TPC 5. Output Voltage Variation %
vs. Temperature
120
0
IL = 50mA
INPUT/OUTPUT VOLTAGE – Volts
150
IL = 0mA
–0.1
IL = 100mA
1000
GROUND CURRENT – ␮A
750
OUTPUT VOLTAGE – %
GROUND CURRENT – ␮A
VIN = 7V
0.1
0
1
2
3
4
3
2
INPUT VOLTAGE – Volts
1
TPC 8. Power-Up/Power-Down
–4–
0
7.0
6.0
5.0
4.0
VOUT
3.0
VSD = VIN
CL = 0.47␮F
RL = 33⍀
VOUT = 3.3V
2.0
1.0
0
0
20 40 60
80 100 120 140 160 180 200
TIME – ␮s
TPC 9. Power-Up Overshoot
REV. A
ADP3309
3.320
3.320
3.320
VOUT = 3.3V
3.310
3.300
3.300
3.290
3.290
RL = 33⍀
CL = 0.47␮F
3.280
VIN
3.280
IOUT
VIN
7.0
7.0
40 80 120 160 200 240 280 320 360 400
TIME – ␮s
TPC 10. Line Transient Response
100
mA
7.5
0
3.300
3.290
RL = 3.3k⍀
CL = 0.47␮F
3.280
7.5
10
20 40
0
60
0
80 100 120 140 160 180 200
TIME – ␮s
TPC 11. Line Transient Response
200
300
TIME – ␮s
500
400
4
VOUT = 3.3V
CL = 4.7␮F
3.310
3.300
3
200
3.3V
IOUT
2
100
Volts
3.290
0
3.280
4
IOUT
mA
Volts
100
VOUT
200
300
TIME – ␮s
400
500
0 0.5
TPC 13. Load Transient
1 1.5
2 2.5 3 3.5
TIME – sec
0
VOUT = 3.3V
RL = 33⍀
CL = 0.47␮F
2
1
0
3
VSD
0
5
–20
–30
b
–40
–50
d
a
–60
c
–70 b d
–80
–90
0
10
20
30
TIME – ␮s
TPC 16. Turn Off
REV. A
40
0
50
–100
a c
10
100
1k
10k
100k
FREQUENCY – Hz
1M
TPC 17. Power Supply Ripple
Rejection
–5–
20
40
60
TIME – ␮s
80
100
TPC 15. Turn On
VOUT = 3.3V
a. 0.47␮F, RL = 33k⍀
b. 0.47␮F, RL = 33⍀
c. 10␮F, RL = 33k⍀
d. 10␮F, RL = 33⍀
–10
RIPPLE REJECTION – dB
3
VSD
3V
TPC 14. Short Circuit Current
4
3.3V
4 4.5
10M
VOLTAGE NOISE SPECTRAL DENSITY – ␮V Hz
100
VOUT = 3.3V
RL = 33⍀
0
0
0
CL = 4.7␮F
1
0
3
VOUT = 3.3V
2
10
VOUT
CL = 0.47␮F
300
mA
Volts
100
TPC 12. Load Transient
3.320
Volts
VOUT = 3.3V
CL = 0.47␮F
3.310
Volts
3.310
Volts
Volts
VOUT = 3.3V
10
1
VOUT = 3.3V, CL = 0.47␮F
IL = 1mA
0.1
0.01
100
1k
10k
FREQUENCY – Hz
100k
TPC 18. Output Noise Density
ADP3309
THEORY OF OPERATION
rejection and very high regulator gain which leads to excellent
line and load regulation. An impressive ± 2.2% accuracy is guaranteed over line, load and temperature.
The ADP3309 anyCAP LDO uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider consisting of R1 and R2, which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
INPUT
Additional features of the circuit include current limit and thermal shutdown. Compared to the standard solutions that give
warning after the output has lost regulation, the ADP3309
provides improved system performance by enabling the ERR
pin to give warning before the device loses regulation.
OUTPUT
Q1
COMPENSATION
ATTENUATION
CAPACITOR
(VBANDGAP/VOUT)
NONINVERTING
WIDEBAND
DRIVER
gm
R3
PTAT
VOS
R4
R1
D1
PTAT
CURRENT
As the chip’s temperature rises above 165°C, the circuit activates a soft thermal shutdown, indicated by a signal low on the
ERR pin, to reduce the current to a safe level.
(a)
RLOAD
R2
CLOAD
ADP3309
APPLICATION INFORMATION
Capacitor Selection: anyCAP
Output Capacitors: As with any micropower device, output
transient response is a function of the output capacitance. The
ADP3309 is stable with a wide range of capacitor values, types
and ESR (anyCAP). A capacitor as low as 0.47 µF is all that is
needed for stability. However, larger capacitors can be used if
high output current surges are anticipated. The ADP3309 is
stable with extremely low ESR capacitors (ESR ≈ 0), such as
multilayer ceramic capacitors (MLCC) or OSCON.
GND
Figure 2. Functional Block Diagram
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that at equilibrium it
produces a large, temperature proportional input “offset voltage” that is repeatable and very well controlled. The temperature proportional offset voltage is combined with the
complementary diode voltage to form a “virtual bandgap” voltage, implicit in the network, although it never appears explicitly
in the circuit. Ultimately, this patented design makes it possible
to control the loop with only one amplifier. This technique also
improves the noise characteristics of the amplifier by providing
more flexibility on the trade-off of noise sources that leads to a
low noise design.
Input Bypass Capacitor: An input bypass capacitor is not
required. However, for applications where the input source is
high impedance or far from the input pin, a bypass capacitor
is recommended. Connecting a 0.47 µF capacitor from the
input pin (Pin 1) to ground reduces the circuit’s sensitivity to
PC board layout. If a bigger output capacitor is used, the input
capacitor must be 1 µF minimum.
Thermal Overload Protection
The ADP3309 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,
which limits the die temperature to a maximum of 165°C.
Under extreme conditions (i.e., high ambient temperature and
power dissipation) where die temperature starts to rise above
165°C, the output current is reduced until the die temperature
has dropped to a safe level. The output current is restored when
the die temperature is reduced.
The R1, R2 divider is chosen in the same ratio as the bandgap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by the diode D1, and a second divider consisting of R3 and R4, the values can be chosen to produce a temperature stable output.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole splitting arrangement to
achieve reduced sensitivity to the value, type and ESR of the
load capacitance.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited
so that junction temperatures will not exceed 125°C.
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to
stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value, required to keep conventional
LDOs stable, changes depending on load and temperature.
These ESR limitations make designing with LDOs more
difficult because of their unclear specifications and extreme
variations over temperature.
Calculating Junction Temperature
Device power dissipation is calculated as follows:
PD = (VIN – VOUT) ILOAD + (VIN) IGND
Where ILOAD and IGND are load current and ground current, VIN
and VOUT are input and output voltages respectively.
Assuming ILOAD = 100 mA, IGND = 2 mA, VIN = 5.0 V and
VOUT = 3.3 V, device power dissipation is:
This is no longer true with the ADP3309 anyCAP LDO. It can
be used with virtually any capacitor, with no constraint on the
minimum ESR. This innovative design allows the circuit to be
stable with just a small 0.47 µF capacitor on the output. Additional advantages of the design scheme include superior line noise
PD = (5.0 – 3.3) 100 mA + 5.0 × 2 mA = 180 mW
∆T = TJ – TA = PD × θJA = 0.18 × 190 = 34.2°C
With a maximum junction temperature of 125°C, this yields a
maximum ambient temperature of ~90°C.
–6–
REV. A
ADP3309
Printed Circuit Board Layout Consideration
VIN = 4V TO 12V
Surface mount components rely on the conductive traces or
pads to transfer heat away from the device. Appropriate PC
board layout techniques should be used to remove heat from the
immediate vicinity of the package.
IN
OUTPUT SELECT
4V
0V
ADP3309-2.7
SD
The following general guidelines will be helpful when designing
a board layout:
C1
1.0␮F
1. PC board traces with larger cross section areas will remove
more heat. For optimum results, use PC boards with thicker
copper and or wider traces.
+
+
ADP3309-3.3
GND
The ADP3309 can source up to 100 mA without any heatsink
or pass transistor. If higher current is needed, an appropriate
pass transistor can be used, as in Figure 4, to increase the output current to 1 A.
Applying a TTL high signal to the shutdown pin or tying it to
the input pin will turn the output ON. Pulling the shutdown pin
down to a TTL low signal or tying it to ground will turn the
output OFF. In shutdown mode, quiescent current is reduced
to less than 1 µA.
MJE253*
VIN = 4V TO 8V
IN
The ADP3309 will maintain its output voltage over a wide
range of load, input voltage and temperature conditions. If the
output is about to lose regulation, for example, by reducing the
supply voltage below the combined regulated output and dropout voltages, the ERR pin will be activated. The ERR output is
an open collector that will be driven low.
SD
GND
The circuit in Figure 5 provides high precision with low dropout
for any regulated output voltage. It significantly reduces the
ripple from a switching regulator while providing a constant
dropout voltage, which limits the power dissipation of the LDO
to 30 mW. The ADP3000 used in this circuit is a switching
regulator in the step-up configuration.
D1
1N5817
ADP3309-3.3
C2
100␮F
10V
SW1
ADP3000-ADJ
R2
30.1k⍀
1%
SD
Figure 5. Constant Dropout Post Regulator
–7–
+
Q2
2N3906
R3
124k⍀
1%
SW2
[email protected]
OUT
GND
Q1
2N3906
FB
GND
ERR
Figure 4. Higher Output Current Linear Regulator
IN
VIN
C2
10␮F
Constant Dropout Post Regulator
The circuit in Figure 3 shows that two ADP3309s can be used
to form a mixed supply voltage system. The output switches
between two different levels selected by an external digital input.
Output voltages can be any combination of voltages from the
Ordering Guide of the data sheet.
I LIM
+
*AAVID531002 HEATSINK IS USED
APPLICATION CIRCUITS
Crossover Switch
R1
120⍀
OUT
ADP3309-3.3
Once set, the ERRor flag’s hysteresis will keep the output low
until a small margin of operating range is restored either by
raising the supply voltage or reducing the load.
C1
100␮F
10V
VOUT = [email protected]
R1
50⍀
C1
47␮F
Error Flag Dropout Detector
L1
6.8␮H
C2
0.47␮F
Higher Output Current
Shutdown Mode
REV. A
OUT
IN
Figure 3. Crossover Switch
3. Do not use solder mask or silk screen on the heat dissipating
traces because it will increase the junction to ambient
thermal resistance of the package.
VIN = 2.5V TO 3.5V
GND
SD
2. Increase the surface area exposed to open air so heat can be
removed by convection or forced air flow.
VOUT = 2.7V/3.3V
OUT
R4
274k⍀
C3
2.2␮F
ADP3309
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
5-Lead Surface Mount Package
(SOT-23)
0.0669 (1.70)
0.0590 (1.50)
5
1
4
2
3
C00141–.5–12/00 (rev. A)
0.1181 (3.00)
0.1102 (2.80)
0.1181 (3.00)
0.1024 (2.60)
PIN 1
0.0374 (0.95) BSC
0.0748 (1.90)
BSC
0.0512 (1.30)
0.0354 (0.90)
0.0197 (0.50)
0.0138 (0.35)
SEATING
PLANE
10°
0°
0.0217 (0.55)
0.0138 (0.35)
PRINTED IN U.S.A.
0.0059 (0.15)
0.0019 (0.05)
0.0079 (0.20)
0.0031 (0.08)
0.0571 (1.45)
0.0374 (0.95)
–8–
REV. A