ETC ILI9320

深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
ILI9320
a-Si TFT LCD Single Chip Driver with
240RGBx320 Resolution and 262K color
Application Notes
Version: Preliminary V0.92
Date: April., 21rd 2007
深圳市圣邦达电子有限公司
.深圳 龙华
Tel.86-755-83723989; Fax.86-755-61351350
www.sbdsemi.cn
J2
Page 2 of 34
1
1
1
1
1
VC I 1
VDD
VC L
FMARK
GN D
CON 40
1
J3
VCI
VCI 1
TP10
VD D
TP11
VCL
TEST
VCOMH
1
TEST
TP4
VREG1O UT
1
TEST
VCOM
VCO ML
1
TP3
TP5
VCOML
TP12
FMARK
TEST
TP9
VCO MH
TEST
TP2
VGL
TEST
VC I
DDV D H
VCL
97
98
99
100
1uF/ 10V
C6
101
102
103
104
VCI 1
1uF/ 6. 3V
C7
105
106
107
108
109
110
VC I
111
112
113
1uF/ 6. 3V
114
115
116
117
1uF/ 6. 3V
118
119
VGL
1uF/ 25V
120
C8
121
HSC 226
122
123
1uF / 2 5 V
C9
VGH
124
125
126
1uF/ 6. 3V
C10
127
128
1uF / 10V
C11
129
130
1uF / 10V
C12
131
132
1uF / 10V
C13
133
VGL
134
VCO M 135
C5
C14
TEST
TP8
1
TP1
VGH
1uF/ 6. 3V
the
VCO M
TEST
is use d
TEST
VCC
1
for the OSC and ext ernal
resisto r can be rem oved.
TEST
TP7
VGL
TEST
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
28
29
30
31
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
TESTO7
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
SDO
SDI
RD
WR/ SC L
RS
CS
TESTO9
FMARK
TSC
OSC1DUM1
OSC1DUM2
OSC 1
OSC1DUM3
OSC 2
I OGND
I OGND
I OGND
I OVC C
VCC
VCC
VCC
VCC
VDD
VDD
VDD
TESTO13
VREFD
TESTO15
VREFC
VDD TEST
AGN D
AGN D
GN D
GN D
GN D
GN D
GN D
VGS
V31T
VCO M
VCOM
VCOMH
VCOMH
VCOML
VCOML
TESTO23
VREG1O UT
VCOMR
VCL
VLOUT1
VLOUT1
DD V DH
DD V DH
DD V DH
VCI OUT
VCI OUT
VCI 1
VCI 1
VCI 1
VCI LVL
VCI
VCI
C12C12C12+
C12+
C11C11C11+
C11+
VGL
VGL
VGL
AGNDD UM2
VGH
VGH
C13C13+
C21C21+
C22C22+
C23C23+
VGL
VCO M
DOTCLK
ENABLE
VSYNC
HSYN C
TEST5
TEST3
I M0/ I D
I M1
I M2
I M3
TESTO4
RESET
VPP2
VPP2
VPP3
VPP3
VPP3
TESTO2
TESTO3
TEST1
TEST2
TEST4
ILI9320 for CPT QVGA 2.2"/2.4"/2.8"
TEST
1
setti ng,
VGH
resist or
TEST
On th e defau lt
1
interna l
VSYN C
CH
SYNC
DOTC LK
EN ABLE
SD O
SD I
LED+
LEDI M0/I D
I M1
I M2
I M3
i80 -9bit in terf ace
i80-16b it int erfac e
i8 0-8bi t i nterf ace
SPI in terfa ce
33
34
35
36
37
38
39
40
41
42
DB7
43
DB6
44
DB5
45
DB4
46
DB3
47
DB2
48
DB1
49
DB0
50
SD O
51
SD I
52
nR D
53
nWR/ SC L
54
RS
55
nCS
56
57
FMARK
58
59
60
120K/1%1 (OPEN)
61
R1
62
63
64
65
66
67
I OVC C
68
69
70
VC C
71
72
1uF/ 6. 3V
C1VD D
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
V CO M 90
91
VCOM H
1uF/ 6. 3V
C2
92
93
VCOML
1uF/ 6. 3V
C3
94
95
VREG1O UT96
1uF/ 6. 3V
C4
Interfa ce Se lectio n
i80 -18bi t inte rface
VC C
GND
nC
nC S
S RS
nWR/ S CL
nR D
nRESET
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
M0
0
1
0
1
ID
GND
M1
1
1
1
1
0
VC C
I OVCC
VC I
nRESET
VSYN C
HSYN C
DOT CLK
EN ABLE
DB17
ALL the VGL p ins
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
LEDLED+
M2
0
0
0
0
1
2
1
M3
1
1
0
0
0
2
1
ALL the VCO M pi ns
must be sh orted
togethe r.
I M0/ I D
I M1
I M2
I M3
must be sh orted
togethe r.
14
15
16
17
18
19
20
21
22
23
24
25
26
27
12
13
VCO M VGL
VCC DU M1
VPP1
VPP1
VPP1
VPP2
VPP2
J1
10
11
1
VGL 2
3
4
5
6
7
8
9
VCO M
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网站www.sbdsemi.cn EMAIL:[email protected]
联系人:杨 生 13543266942 13642365547
1. Application FPC Circuit
1.1. CPT 2.4” & 2.8” Panel
GLASS
Panel
R2
open
C15
D1
ALL the VCOM pins
mus t be shorted
tog ether.
ALL the VG L pins
must be sho rted
togeth er.
TP6
VREG1O UT
TP1 3
GND
深圳市圣邦达电子有限公司 电话:086-0755-83723989 传真:086-0755-61351350
公司网站www.sbdsemi.cn
EMAIL:[email protected]
联系人:杨 生 13543266942 13642365547
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V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网站www.sbdsemi.cn EMAIL:[email protected]
联系人:杨 生 13543266942 13642365547
1.1.1. CPT 2.4” Initial Code
void ILI9320_CPT24_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
// This delay time is necessary
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
// Set the Vcore voltage and this setting is must.
// Start internal OSC.
// set SS and SM bit
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
// set 1 line inversion
LCD_CtrlWrite_ILI9320(0x0003, 0x1030);
// set GRAM write direction and BGR=1.
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
// Resize register
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
// set the back porch and front porch
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
// FMARK function
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
// Frame marker Position
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
// set non-display area refresh cycle ISC[3:0]
// RGB interface setting
// RGB interface polarity
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0007);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// R11h=0x0031 at VCI=3.3V DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x013C);
// R12h=0x0138 at VCI=3.3V VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1C00);
// R13h=0x1800 at VCI=3.3V VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x000E);
// R29h=0x0008 at VCI=3.3V VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
// GRAM horizontal Address
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM Vertical Address
// SAP, BT[3:0], AP, DSTB, SLP, STB
// Delay 50ms
// Delay 50ms
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0000);
LCD_CtrlWrite_ILI9320(0x0031, 0x0505);
LCD_CtrlWrite_ILI9320(0x0032, 0x0004);
LCD_CtrlWrite_ILI9320(0x0035, 0x0006);
LCD_CtrlWrite_ILI9320(0x0036, 0x0707);
LCD_CtrlWrite_ILI9320(0x0037, 0x0105);
LCD_CtrlWrite_ILI9320(0x0038, 0x0002);
LCD_CtrlWrite_ILI9320(0x0039, 0x0707);
LCD_CtrlWrite_ILI9320(0x003C, 0x0704);
LCD_CtrlWrite_ILI9320(0x003D, 0x0807);
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
Page 3 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000);
// Horizontal GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF);
LCD_CtrlWrite_ILI9320(0x0052, 0x0000);
// Horizontal GRAM End Address
LCD_CtrlWrite_ILI9320(0x0053, 0x013F);
// Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700);
LCD_CtrlWrite_ILI9320(0x0061, 0x0001);
// Gate Scan Line
LCD_CtrlWrite_ILI9320(0x006A, 0x0000);
// set scrolling line
// Vertical GRAM Start Address
// NDL,VLE, REV
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VREG1OUT voltage
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// R11h=0x0031 at VCI=3.3V DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x013C);
// R12h=0x0138 at VCI=3.3V VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1C00);
// R13h=0x1800 at VCI=3.3V VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x000E);
// R29h=0x0008 at VCI=3.3V VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
// VDV[4:0] for VCOM amplitude
// SAP, BT[3:0], AP, DSTB, SLP, STB
// Delay 50ms
// Delay 50ms
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000);
// display OFF
//************* Power OFF sequence **************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], APE, AP, DSTB, SLP
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x0002);
// VDV[4:0] for VCOM amplitude
// Dis-charge capacitor power voltage
// SAP, BT[3:0], APE, AP, DSTB, SLP
}
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
Page 4 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn EMAIL : [email protected]
13543266942 13642365547
1.1.2. CPT 2.8” Initial Code
void ILI9320_CPT28_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
// Set the internal vcore voltage
// Start internal OSC.
// set SS and SM bit
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
// set 1 line inversion
LCD_CtrlWrite_ILI9320(0x0003, 0x1030);
// set GRAM write direction and BGR=1.
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
// Resize register
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
// set the back porch and front porch
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
// FMARK function
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
// Frame marker Position
// set non-display area refresh cycle ISC[3:0]
// RGB interface setting
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
// RGB interface polarity
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0007);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
delayms(200);
// SAP, BT[3:0], AP, DSTB, SLP, STB
// DC1[2:0], DC0[2:0], VC[2:0]
// VREG1OUT voltage
// VDV[4:0] for VCOM amplitude
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
delayms(50);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x013A);
// VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1600);
LCD_CtrlWrite_ILI9320(0x0029, 0x000C);
// Delay 50ms
// Delay 50ms
// VDV[4:0] for VCOM amplitude
// VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
// GRAM horizontal Address
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM Vertical Address
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0504);
LCD_CtrlWrite_ILI9320(0x0031, 0x0703);
LCD_CtrlWrite_ILI9320(0x0032, 0x0702);
LCD_CtrlWrite_ILI9320(0x0035, 0x0101);
LCD_CtrlWrite_ILI9320(0x0036, 0x0A1F);
LCD_CtrlWrite_ILI9320(0x0037, 0x0504);
LCD_CtrlWrite_ILI9320(0x0038, 0x0003);
LCD_CtrlWrite_ILI9320(0x0039, 0x0706);
LCD_CtrlWrite_ILI9320(0x003C, 0x0707);
LCD_CtrlWrite_ILI9320(0x003D, 0x091F);
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
Page 5 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000);
// Horizontal GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF);
LCD_CtrlWrite_ILI9320(0x0052, 0x0000);
// Horizontal GRAM End Address
LCD_CtrlWrite_ILI9320(0x0053, 0x013F);
// Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700);
LCD_CtrlWrite_ILI9320(0x0061, 0x0001);
// Gate Scan Line
LCD_CtrlWrite_ILI9320(0x006A, 0x0000);
// set scrolling line
// Vertical GRAM Start Address
// NDL,VLE, REV
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VREG1OUT voltage
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x013A);
// Delay 50ms
// VDV[4:0] for VCOM amplitude
// SAP, BT[3:0], AP, DSTB, SLP, STB
// VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1600);
//VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x000C);
//VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
// Delay 50ms
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000);
// display OFF
//************* Power OFF sequence **************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], APE, AP, DSTB, SLP
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x0002);
// VDV[4:0] for VCOM amplitude
// Dis-charge capacitor power voltage
// SAP, BT[3:0], APE, AP, DSTB, SLP
}
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Page 6 of 34
V0.9
J2
Page 7 of 34
1
1
1
1
1
1
VCI
VCI 1
VDD
VCL
FMARK
GND
J3
1
CON40
VCC
VCI 1
TP10
VDD
TP11
VCL
1
1
TEST
TEST
TEST
TEST
VCOMH
VREG1OUT
VCOML
1
1
TEST
TEST
TP4
TP5
VCOML
TP12
FMARK
TEST
TP9
VCOMH
VCOM
1
1
D1
33
34
29
30
31
35
36
37
38
39
40
41
42
43
44
45
DB7
46
DB6
47
DB5
48
DB4
49
DB3
50
DB2
51
DB1
52
DB0
53
SDO
54
SDI
55
nRD
56
nWR/ SCL
57
RS
58
nCS
59
60
FMARK
61
62
63
120K/1%1 (OPEN)
64
R1
65
66
67
68
69
70
I OVCC
71
72
73
VCC
74
75
1uF/ 6. 3V
C1VDD
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
VCO M 93
94
VCOMH
1uF/6. 3V
C2
95
96
VCOML
1uF/6. 3V
C3
97
98
VREG1OUT99
1uF/6. 3V
C4
100
VCL
101
1uF/6. 3V
C5
102
103
DDVDH
1uF/ 10V
C6
104
105
106
107
VCI1
1uF/6. 3V
C7
108
109
110
111
112
113
VCI
114
115
116
1uF/6.3V
117
118
119
120
1uF/6.3V
121
122
VGL
1uF/ 25V
123
C8
124
HSC226
125
126
1uF/ 25V
C9
VGH
127
128
129
1uF/ 6. 3V
C10
130
131
1uF/10V
C11
132
133
1uF/10V
C12
134
135
1uF/10V
C13
136
VCOM 137
VGL
138
VGL
139
VCOM 140
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
nRESET
VSYNC
HSYNC
I M0/I D
I M1
I M2
I M3
C14
TEST
VCI
VCOM
TEST
TP8
TP3
TEST
VCC
TP2
VGL
TEST
TP7
VGL
VGH
TP1
VGH
TEST
TEST
ID
VSYNC
HSYNC
DOTCLK
ENABLE
SDO
SDI
LED+
LEDI M0/ ID
I M1
I M2
I M3
0
GND
1
Interfac e S electi on
i80 -18bi t in terfa ce
i80 -9bit in terfa ce
i80 -16bi t in terfa ce
i80-8bi t i nterfa ce
SPI in terfa ce
29
30
31
32
33
34
35
36
37
38
39
40
M0
0
1
0
1
nWR/ SCL
nRD
nRESET
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
M1
1
1
1
1
nCS
RS
M2
0
0
0
0
GND
M3
1
1
0
0
0
VCC
IOVCC
VCI
LEDLED+
ALL t he VGL pi ns
must be shorte d
together .
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
2
2 1
1
ALL t he VCOM pins
must be shorte d
together .
16
17
18
19
20
21
22
23
24
25
26
27
28
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
TESTO7
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
SD0
SDI
RD*
WR* /SCL
RS
CS*
TESTO9
FMARK
TSC
OSC1DUM1
OSC1DUM2
OSC1
OSC1DUM3
OSC2
I OGND
I OGND
I OGND
I OVCC
VCC
VCC
VCC
VCC
VDD
VDD
VDD
TESTO13
VERFD
TESTO15
VREFC
VDDTEST
AGND
AGND
GND
GND
GND
GND
GND
VGS
V31T
VCOM
VCOM
VCOMH
VCOMH
VCOML
VCOML
TESTO23
VREG1OUT
VCOMR
VCL
VLOUT1
VLOUT1
DDVDH
DDVDH
DDVDH
VCIOUT
VCIOUT
VCI1
VCI1
VCI1
VCILVL
VCI
VCI
C12C12C12+
C12+
C11C11C11+
C11+
VGL
VGL
VGL
AGNDDUM2
VGH
VGH
C13C13+
C21C21+
C22C22+
C23C23+
VCOM
VGL
VGL
VCOM
VCOM
VGL
VGL
VCOM
VCOM
VCCDUM1
VPP1
VPP1
VPP1
VPP2
VPP2
VPP2
VPP2
VPP3
VPP3
VPP3
TESTO2
TESTO3
TEST1
TEST2
TEST4
TEST5
TEST3
I M0/ ID
I M1
I M2
I M3
TESTO4
RESET*
VSYNC
J1
10
11
12
13
14
15
VCOM 1
VGL 2
VGL 3
VCOM 4
VCOM 5
6
7
8
9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
1.2. CPT3.2” Panel
GLASS
ILI9320 for CPT QVGA 3.2" Panel
R2
open
C15
On the defa ult se ttin g, t he
interna l res istor is used
ALL the VCOM pins
must be shorted
together.
for t he OSC an d exter nal
resisto r can be remov ed.
ALL th e L pins
must be orted
together .
TP6
VREG1OUT
TP1 3
GND
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
1.2.1. CPT 3.2” Initial Code
void ILI9320_CPT32_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
LCD_CtrlWrite_ILI9320(0x0003, 0x1030);
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
// Set the internal vcore voltage
// Start internal OSC.
// set SS and SM bit
// set 1 line inversion
// set GRAM write direction and BGR=1.
// Resize register
// set the back porch and front porch
// set non-display area refresh cycle ISC[3:0]
// FMARK function
// RGB interface setting
// Frame marker Position
// RGB interface polarity
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0007);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0147);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0012, 0x013C);
// VREG1OUT voltage
delayms(50);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0013, 0x0E00);
// VDV[4:0] for VCOM amplitude
// VCM[4:0] for VCOMH
LCD_CtrlWrite_ILI9320(0x0029, 0x0009);
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
// GRAM horizontal Address
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM Vertical Address
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0207);
LCD_CtrlWrite_ILI9320(0x0031, 0x0505);
LCD_CtrlWrite_ILI9320(0x0032, 0x0102);
LCD_CtrlWrite_ILI9320(0x0035, 0x0006);
LCD_CtrlWrite_ILI9320(0x0036, 0x0606);
LCD_CtrlWrite_ILI9320(0x0037, 0x0707);
LCD_CtrlWrite_ILI9320(0x0038, 0x0506);
LCD_CtrlWrite_ILI9320(0x0039, 0x0407);
LCD_CtrlWrite_ILI9320(0x003C, 0x0106);
LCD_CtrlWrite_ILI9320(0x003D, 0x0601);
//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000);
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF);
LCD_CtrlWrite_ILI9320(0x0052, 0x0000);
// Horizontal GRAM Start Address
// Horizontal GRAM End Address
// Vertical GRAM Start Address
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Page 8 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
LCD_CtrlWrite_ILI9320(0x0053, 0x013F);
// Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700);
LCD_CtrlWrite_ILI9320(0x0061, 0x0001);
LCD_CtrlWrite_ILI9320(0x006A, 0x0000);
// Gate Scan Line
// NDL,VLE, REV
// set scrolling line
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0147);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0012, 0x013C);
// VREG1OUT voltage
delayms(50);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0013, 0x0E00);
// VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x0009);
// VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000);
// display OFF
//************* Power OFF sequence **************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], APE, AP, DSTB, SLP
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x0002);
// SAP, BT[3:0], APE, AP, DSTB, SLP
}
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Page 9 of 34
V0.9
Page 10 of 34
TP5
VREG1OUT
TP6
VCL
TP7
C13
C6
C7
C8
1uF/ 6. 3V
1 uF/2 5V
1uF/ 6. 3V
C10
C11
1uF/ 10V
C10
1uF/ 10V
C9
1uF/ 10V
1uF/ 6. 3V
RB521S-30
D1
1uF/10V
C9
1uF/10V
D1
1uF/10V
VGH
1 uF/2 5V
1uF/ 6. 3V
VCI
1uF/ 6. 3V
1uF/ 10V
1uF/ 6. 3V
1uF/ 6. 3V
C8
1uF/ 6. 3V
VGL
1
1uF/ 6. 3V
1uF/ 6. 3V
C13
C7
RB521S-30
TEST
C6
1 uF/25 V
1 uF/25 V
C5
VCI
FMARK
1
C5
1uF/ 6. 3V
VCI 1
DDVDH
VCL
VREG1OUT
VCOML
TEST
VCL
C4
C4
VCI
1uF/ 6. 3V
1uF/ 10V
C4
C4
1
VCI 1
C3
1uF/ 6. 3V
C1 C2
1uF/ 6. 3V
VCOM
TP7
1
TP4
VCL
C3
TEST
T EST
VCL
DDVDH
VCOMH
1
TP6
1uF/ 6. 3V
1uF/ 6. 3V
TEST
VREG1OUT
1
VREG1OUT
1
TEST
VCI 1
1uF/ 6. 3V
VCC
I OVCC
FAMRK
nRD
nWR
RS
nCS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
nR ES ET
IM 3
I M0
C1 C2
FMARK
T EST
VREG1OUT
TP3
VGL
1
TP2
VGH
T EST
TP1
VCOM
VCI 1
1
1
1
TP5
VCI 1
T EST
TEST
DDVDH
TEST
1
TP4
DDVDH
DDVDH
Vc ore
VGL
TEST
VGH
1
TP3
VGL
1
for the regi sters s etti ng.
TP2
VGH
1uF/ 6. 3V
When the RGB i nte rface i s use d
TP1
VCOM
VCC
I OVCC
to tr ans fer the dis play da ta,
the SPI inte rface is nec essa ry
TEST
CPU Interface
VCOM
J1
FAMRK
1
2
9-bit i80- int erfa ce
SDO
SDI
1
2
1
nRD
nWR
RS
nCS
LED-
LED+
1
nRD
nWR
RS
nCS
FMARK
I OVCC
VCC V CI
I M0
I M3
nRESET
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
LED+
LED-
18-bit i80 -int erf ace
Inter fac e
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
0
I OVCC
VCCDU M1
VPP1
VPP1
VPP1
VPP2
VPP2
VPP2
VPP2
VPP2
VPP3
VPP3
VPP3
TESTO2
TESTO3
TEST1
TEST2
TEST4
TEST5
TEST3
I M0/I D
I M1
I M2
I M3
TESTO4
nRESET
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
TESTO7
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
SDO
SDI
nRD
nWR/ SCL
RS
nCS
TESTO9
FMARK
TSC
TESTO10
OSC1DUM1
OSC1DUM2
OSC1
OSC1DUM3
OSC2
I OGND
I OGND
I OVCC
VCC
VCC
VCC
VCC
VDD
VDD
VDD
TESTO13
VREFD
TESTO14
VREF
TESTO15
VREFC
VDDTEST
AGND
AGND
GND
GND
GND
RGND
RGND
TESTO18
VGS
TESTO19
V0T
TESTO20
VMON
TESTO21
V31T
VCOM
VCOM
VCOMH
VCOMH
VCOML
VCOML
TESTO22
TESTO23
VREG1OUT
TESTO24
VCOMR
VCL
VLOUT1
VLOUT1
DDVDH
DDVDH
VCI OUT
VCI OUT
VCI 1
VCI 1
VCI LVL
VCI
VCI
C12C12C12+
C12+
C11C11C11+
C11+
VGL
VGL
VGH
VGH
C13TESTO28
C13+
TESTO29
C21C21C21+
C21+
C22C22C22+
C22+
C23C23C23+
C23+
TESTO30
TESTO1
1
nRESET
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
8-bit i80- int erfa ce
TEST
1
2
16-bit i80 -int erf ace
1
VGL
1
2
0
0
1
1
LED+
LEDI M0
0
TEST
T EST
J1
nRESET
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
SDO
SDI
nRD
nWR
RS
nCS
FMARK
I OVCC
VC C VCI
LED+
LED-
IM3
VGH
VCOM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Vcore
VGH
VGL
VCI
VCI 1
DDVD H
VCL
VREG1OUT
VCOML
VCOMH
VCOM
I OVCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
VCCDU M1
VPP1
VPP1
VPP1
VPP2
VPP2
VPP2
VPP2
VPP2
VPP3
VPP3
VPP3
TESTO2
TESTO3
TEST1
TEST2
TEST4
TEST5
TEST3
I M0/ I D
I M1
I M2
I M3
TESTO4
nRESET
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
TESTO7
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
SDO
SDI
nRD
nWR/ SCL
RS
nCS
TESTO9
FMARK
TSC
TESTO10
OSC1DUM1
OSC1DUM2
OSC1
OSC1DUM3
OSC2
I OGND
I OGND
I OVCC
VCC
VCC
VCC
VCC
VDD
VDD
VDD
TESTO13
VREFD
TESTO14
VREF
TESTO15
VREFC
VDDTEST
AGND
AGND
GND
GND
GND
RGND
RGND
TESTO18
VGS
TESTO19
V0T
TESTO20
VMON
TESTO21
V31T
VCOM
VCOM
VCOMH
VCOMH
VCOML
VCOML
TESTO22
TESTO23
VREG1OUT
TESTO24
VCOMR
VCL
VLOUT1
VLOUT1
DDVDH
DDVDH
VCI OUT
VCI OUT
VCI 1
VCI 1
VCI LVL
VCI
VCI
C12C12C12+
C12+
C11C11C11+
C11+
VGL
VGL
VGH
VGH
C13TESTO28
C13+
TESTO29
C21C21C21+
C21+
C22C22C22+
C22+
C23C23C23+
C23+
TESTO30
TESTO1
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1.3. CMO 2.2” & CMO 2.4” & CMO 2.8” Panel
U1
ILI9320 for CMO Panel (CPU Interface)
C11
C1 2
C14 C 15
the di spl ay d ata, the S PI int erfa ce i s
necess ary fo r the regi ste rs s etti ng .
When t he RGB inte rfa ce is used to tr ansf er
LED B/ L1
Note:
1. When the RGB interface is not used, please shorted the VSYNC, HSYNC, DOTCLK
and ENABLE to IOVCC or GND.
2. When the SPI interface is not used, the SDI is shorted to IOVCC or GND, and
let SDO as open.
3. The Schottky barrier diode shall be added for VGL and VGH pins.
4. If the voltage of interface is 1.8V, the IOVCC is connected to 1.8V and the
VCC/VCI can be shorted together.
FMARK
TP8
U1
ILI9320 for CMO Panel (RGB Interface)
C1 2
C14 C 15
LED B/ L1
Note:
1. When the RGB interface is not used, please shorted the VSYNC, HSYNC, DOTCLK
and ENABLE to IOVCC or GND.
2. When the SPI interface is not used, the SDI is shorted to IOVCC or GND, and
let SDO as open.
3. The Schottky barrier diode shall be added for VGL and VGH pins.
4. If the voltage of interface is 1.8V, the IOVCC is connected to 1.8V and the
VCC/VCI can be shorted together.
RGB Interface
FMARK
TP8
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联系人:杨 生 13543266942 13642365547
1.3.1. CMO 2.2” initial code
void ILI9320_CMO22_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
// This delay is necessary
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
// Set the Vcore voltage and this setting is must.
// Start internal OSC.
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
// set SS and SM bit
LCD_CtrlWrite_ILI9320(0x0003, 0x0030);
// set GRAM write direction and BGR=0.
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
// Resize register
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
// set the back porch and front porch
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
// FMARK function
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
// Frame marker Position
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
// set 1 line inversion
// set non-display area refresh cycle ISC[3:0]
// RGB interface setting
// RGB interface polarity
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0007);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x013E);
// VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1C00);
// VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x0007);
// VCM[4:0] for VCOMH
// SAP, BT[3:0], AP, DSTB, SLP, STB
// Delay 50ms
// Delay 50ms
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
// GRAM horizontal Address
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM Vertical Address
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0000);
LCD_CtrlWrite_ILI9320(0x0031, 0x0207);
LCD_CtrlWrite_ILI9320(0x0032, 0x0707);
LCD_CtrlWrite_ILI9320(0x0035, 0x0203);
LCD_CtrlWrite_ILI9320(0x0036, 0x0609);
LCD_CtrlWrite_ILI9320(0x0037, 0x0707);
LCD_CtrlWrite_ILI9320(0x0038, 0x0400);
LCD_CtrlWrite_ILI9320(0x0039, 0x0707);
LCD_CtrlWrite_ILI9320(0x003C, 0x0500);
LCD_CtrlWrite_ILI9320(0x003D, 0x1807);
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//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000);
// Horizontal GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF);
LCD_CtrlWrite_ILI9320(0x0052, 0x0000);
// Horizontal GRAM End Address
LCD_CtrlWrite_ILI9320(0x0053, 0x013F);
// Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700);
LCD_CtrlWrite_ILI9320(0x0061, 0x0001);
// Gate Scan Line
LCD_CtrlWrite_ILI9320(0x006A, 0x0000);
// set scrolling line
// Vertical GRAM Start Address
// NDL,VLE, REV
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x013E);
// VREG1OUT voltage
// SAP, BT[3:0], AP, DSTB, SLP, STB
// Delay 50ms
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1C00);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0029, 0x0007);
// VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
// VDV[4:0] for VCOM amplitude
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000);
//************* Power OFF sequence **************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// display OFF
// SAP, BT[3:0], APE, AP, DSTB, SLP
// DC1[2:0], DC0[2:0], VC[2:0]
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x0002);
// Dis-charge capacitor power voltage
// SAP, BT[3:0], APE, AP, DSTB, SLP
}
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1.3.1. CMO 2.4” initial code
void ILI9320_CMO24_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
// This delay time is necessary
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
// Set the internal vcore voltage
// Start internal OSC.
// set SS and SM bit
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
// set 1 line inversion
LCD_CtrlWrite_ILI9320(0x0003, 0x1030);
// set GRAM write direction and BGR=1.
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
// Resize register
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
// set the back porch and front porch
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
// FMARK function
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
// Frame marker Position
// set non-display area refresh cycle ISC[3:0]
// RGB interface setting
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// RGB interface polarity
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
// VREG1OUT voltage
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
delayms(50);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x013B);
// VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1900);
LCD_CtrlWrite_ILI9320(0x0029, 0x0007);
// Delay 50ms
// Delay 50ms
// VDV[4:0] for VCOM amplitude
// VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM horizontal Address
// GRAM Vertical Address
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0007);
LCD_CtrlWrite_ILI9320(0x0031, 0x0504);
LCD_CtrlWrite_ILI9320(0x0032, 0x0703);
LCD_CtrlWrite_ILI9320(0x0035, 0x0002);
LCD_CtrlWrite_ILI9320(0x0036, 0x0707);
LCD_CtrlWrite_ILI9320(0x0037, 0x0406);
LCD_CtrlWrite_ILI9320(0x0038, 0x0006);
LCD_CtrlWrite_ILI9320(0x0039, 0x0404);
LCD_CtrlWrite_ILI9320(0x003C, 0x0700);
LCD_CtrlWrite_ILI9320(0x003D, 0x0A08);
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//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000);
// Horizontal GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF);
LCD_CtrlWrite_ILI9320(0x0052, 0x0000);
// Horizontal GRAM End Address
LCD_CtrlWrite_ILI9320(0x0053, 0x013F);
// Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700);
LCD_CtrlWrite_ILI9320(0x0061, 0x0001);
// Gate Scan Line
LCD_CtrlWrite_ILI9320(0x006A, 0x0000);
// set scrolling line
// Vertical GRAM Start Address
// NDL,VLE, REV
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VREG1OUT voltage
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// R11h=0x0031 at VCI=3.3V DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x013B);
// R12h=0x0138 at VCI=3.3V VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1900);
// R13h=0x1800 at VCI=3.3V VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x0007);
// R29h=0x0008 at VCI=3.3V VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
// VDV[4:0] for VCOM amplitude
// SAP, BT[3:0], AP, DSTB, SLP, STB
// Delay 50ms
// Delay 50ms
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000);
// display OFF
//************* Power OFF sequence **************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], APE, AP, DSTB, SLP
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x0002);
// VDV[4:0] for VCOM amplitude
// Dis-charge capacitor power voltage
// SAP, BT[3:0], APE, AP, DSTB, SLP
}
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1.3.2. CMO 2.8” initial code
void ILI9320_CMO28_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1);
LCD_nRESET = 0;
delayms(10);
// Delay 1ms
// Delay 10ms
// This delay is necessary
LCD_nRESET = 1;
delayms(50);
// Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
// Set the Vcore voltage and this setting is must.
// Start internal OSC.
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
// set SS and SM bit
LCD_CtrlWrite_ILI9320(0x0003, 0x0030);
// set GRAM write direction and BGR=0.
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
// Resize register
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
// set the back porch and front porch
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
// FMARK function
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
// Frame marker Position
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
// RGB interface polarity
// set 1 line inversion
// set non-display area refresh cycle ISC[3:0]
// RGB interface setting
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0007);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x013E);
// VREG1OUT voltage
// SAP, BT[3:0], AP, DSTB, SLP, STB
// Delay 50ms
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1C00);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0029, 0x000C);
// VCM[4:0] for VCOMH
// VDV[4:0] for VCOM amplitude
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
// GRAM horizontal Address
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM Vertical Address
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0007);
LCD_CtrlWrite_ILI9320(0x0031, 0x0403);
LCD_CtrlWrite_ILI9320(0x0032, 0x0404);
LCD_CtrlWrite_ILI9320(0x0035, 0x0002);
LCD_CtrlWrite_ILI9320(0x0036, 0x0707);
LCD_CtrlWrite_ILI9320(0x0037, 0x0606);
LCD_CtrlWrite_ILI9320(0x0038, 0x0106);
LCD_CtrlWrite_ILI9320(0x0039, 0x0007);
LCD_CtrlWrite_ILI9320(0x003C, 0x0700);
LCD_CtrlWrite_ILI9320(0x003D, 0x0707);
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Page 15 of 34
V0.9
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联系人:杨 生 13543266942 13642365547
//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000);
// Horizontal GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF);
LCD_CtrlWrite_ILI9320(0x0052, 0x0000);
// Horizontal GRAM End Address
LCD_CtrlWrite_ILI9320(0x0053, 0x013F);
// Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700);
LCD_CtrlWrite_ILI9320(0x0061, 0x0001);
// Gate Scan Line
LCD_CtrlWrite_ILI9320(0x006A, 0x0000);
// set scrolling line
// Vertical GRAM Start Address
// NDL,VLE, REV
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x013E);
// VREG1OUT voltage
// SAP, BT[3:0], AP, DSTB, SLP, STB
// Delay 50ms
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1E00);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0029, 0x000C);
// VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
// VDV[4:0] for VCOM amplitude
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000);
//************* Power OFF sequence **************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// display OFF
// SAP, BT[3:0], APE, AP, DSTB, SLP
// DC1[2:0], DC0[2:0], VC[2:0]
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x0002);
// Dis-charge capacitor power voltage
// SAP, BT[3:0], APE, AP, DSTB, SLP
}
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Page 16 of 34
V0.9
Page 17 of 34
1
1
1
1
1
1
1
VCI
VCI1
VDD
VCL
FM ARK
GND
VCI 1
VCOMH
TP10
VD D
TP11
VCL
TEST
TP4
1
VCOM
VREG1OU T
TP3
TEST
TEST
TEST
0
1
ID
1
1
1
TEST
TEST
M0
0
1
1
1
0
VCOM L
VCOM H
VCOM
1
1
M1
1
1
0
0
1
TP5
VCOML
TP12
FMARK
TEST
TP9
M2
0
0
0
0
0
TEST
VCI
M3
1
1
TEST
TP8
TEST
VCC
TP2
VGL
TEST
TP7
VGL
VGH
TP1
VGH
TEST
TEST
CON 40
I OVCC
VCC
VCI
C10
C11
C12
C13
C14
C15
1uF/10V
1uF/6. 3V
1uF/6. 3V
1uF/6. 3V
1uF/6. 3V
1uF/6. 3V
C9
HSC 226
1uF/6. 3V
1uF/25V
C8
C6
1uF/25V
C7
C5
1uF/6. 3V
1uF/6. 3V
C4
1uF/10V
1uF/6. 3V
C3
1uF/10V
VCOM
ENABLE
DOTCLK
HSYN C
VSYN C
nRESET
IM 3
IM 2
IM 1
IM 0/I D
FMARK
nCS
RS
nWR /SCL
nRD
SDI
SDO
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
VDD
VC OM
VCOM H
VCOM L
VR EG1OUT
VCL
DDVD H
VCI 1
VCI
VGL
VGH
T1
VCC
J1
VCC
IOVC C
VCI GND
nCS
RS
nWR/ SCL
nRD
nR ESET
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
GND
VSYNC H
SYNC
DOTCLK
ENABLE
SDO
SDI LED
+ LED I M0/ I D
I M1
I M2
I M3
LED LED +
C2
D1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
2
2 1
1
C1
ALL the VCOM pin s
must b e short ed
togeth er.
1uF/10V
VCOM
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
24
25
26
27
13
14
15
16
17
18
19
20
21
22
23
10
11
12
1
2
3
4
5
6
7
8
9
DU MM Y1
DU MM Y2
VC OM
VC OM
VC OM
DU MM Y3
DU MM Y4
DU MM Y5
DUMM Y6
DUMM Y7
DUMM Y8
DUMM Y9
DUMM Y10
C23+
C23DUMM Y11
C22+
C22C21+
C21DUMM Y12
C13+
C13VGH1
VGH2
VGH3
DUMM Y13
VGL1
VGL2
VGL3
C11+
C11+
C11C11C12+
C12+
C12C12VC I
VC I
VC I
VC ILVL
VC I1
VC I1
VC I1
VC I1
DDVDH
DDVDH
DDVDH
DDVDH
VLOU T1
VC L
VC L
VC OMR
VR EG1OUT
VC OML
VC OML
VC OML
VC OMH
VC OMH
VC OMH
VC OM
VC OM
VC OM
DUMM Y14
VGS
RGND
RGND
RGND
RGND
GND
GND
GND
AGND
AGND
AGND
AGND
DUMM Y15
DUMM Y16
VD D
VD D
VD D
VC C
VC C
VC C
I OVCC
I OVCC
I OVCC
I OGND
I OGND
I OGND
DUMM YR4
DUMM YR3
OSC2
OSC1
FM ARK
nCS
RS
nWR_SCL
nRD
SD I
SD O
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
EN ABLE
DOTCLK
H SYNC
VSYN C
nRESET
I M3
I M2
I M1
I M0/ ID
TEST4
VPP3
VPP3
VPP2
VPP2
VPP1
VPP1
VC OM
VC OM
VC OM
DUMM Y17
DU MM Y18
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电话:086-0755-83723989 传真:086-0755-61351350
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13543266942 13642365547
1.4. LPL2.2” & LPL 2.4” Panel
U1
ILI9320 for LPL QVGA Panel
I LI9320 f or LPL Panel
When t he RG B int erfac e is no t
used, the H SYNC, VS YNC, DOT CLK,
and ENA BLE are s hort ed to GND .
ALL the VCOM pins
must b e short ed
tog eth er .
Interf ace Se lect ion
i80- 18bi t inte rfac e
i80- 9bit i nterf ace
i80- 16bi t inte rfac e
i80- 8bit int er fac e
SPI i nter face
TP 6
VR E G1 O UT
J2
TP 13
GND
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V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
1.4.1. LPL 2.2” initial code
void ILI9320_LPL22_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
LCD_CtrlWrite_ILI9320(0x0003, 0x1030);
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
// Set the internal vcore voltage
// Start internal OSC.
// set SS and SM bit
// set 1 line inversion
// set GRAM write direction and BGR=1.
// Resize register
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
// set the back porch and front porch
// set non-display area refresh cycle ISC[3:0]
// FMARK function
// RGB interface setting
// Frame marker Position
// RGB interface polarity
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0007);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
delayms(200);
// SAP, BT[3:0], AP, DSTB, SLP, STB
// DC1[2:0], DC0[2:0], VC[2:0]
// VREG1OUT voltage
// VDV[4:0] for VCOM amplitude
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0137);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0012, 0x013B);
// VREG1OUT voltage
delayms(50);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0013, 0x0E00);
// VDV[4:0] for VCOM amplitude
// VCM[4:0] for VCOMH
LCD_CtrlWrite_ILI9320(0x0029, 0x000F);
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM horizontal Address
// GRAM Vertical Address
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0307);
LCD_CtrlWrite_ILI9320(0x0031, 0x0507);
LCD_CtrlWrite_ILI9320(0x0032, 0x0500);
LCD_CtrlWrite_ILI9320(0x0035, 0x0304);
LCD_CtrlWrite_ILI9320(0x0036, 0x0007);
LCD_CtrlWrite_ILI9320(0x0037, 0x0707);
LCD_CtrlWrite_ILI9320(0x0038, 0x0007);
LCD_CtrlWrite_ILI9320(0x0039, 0x0007);
LCD_CtrlWrite_ILI9320(0x003C, 0x0600);
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Page 18 of 34
V0.9
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LCD_CtrlWrite_ILI9320(0x003D, 0x0700);
//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000);
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF);
LCD_CtrlWrite_ILI9320(0x0052, 0x0000);
LCD_CtrlWrite_ILI9320(0x0053, 0x013F);
// Horizontal GRAM Start Address
// Horizontal GRAM End Address
// Vertical GRAM Start Address
// Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700);
LCD_CtrlWrite_ILI9320(0x0061, 0x0001);
LCD_CtrlWrite_ILI9320(0x006A, 0x0000);
// Gate Scan Line
// NDL,VLE, REV
// set scrolling line
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0137);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0012, 0x013B);
// VREG1OUT voltage
delayms(50);
// Delay 50ms
LCD_CtrlWrite_ILI9320(0x0013, 0x0E00);
// VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x000F);
// VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000);
// display OFF
//************* Power OFF sequence **************//
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Page 19 of 34
V0.9
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联系人:杨 生 13543266942 13642365547
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x0002);
// SAP, BT[3:0], APE, AP, DSTB, SLP
// DC1[2:0], DC0[2:0], VC[2:0]
// VREG1OUT voltage
// VDV[4:0] for VCOM amplitude
// Dis-charge capacitor power voltage
// SAP, BT[3:0], APE, AP, DSTB, SLP
}
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Page 20 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
1.4.2. LPL 2.4” initial code
void ILI9320_LPL24_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
// Set the internal vcore voltage
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
// Start internal OSC.
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
// set SS and SM bit
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
// set 1 line inversion
LCD_CtrlWrite_ILI9320(0x0003, 0x1030);
// set GRAM write direction and BGR=1.
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
// Resize register
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
// set the back porch and front porch
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
// set non-display area refresh cycle ISC[3:0]
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
// FMARK function
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
// RGB interface setting
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
// Frame marker Position
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
// RGB interface polarity
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0007);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200); // Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0137);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50); // Delay 50ms
LCD_CtrlWrite_ILI9320(0x0012, 0x013C);
// VREG1OUT voltage
delayms(50); // Delay 50ms
LCD_CtrlWrite_ILI9320(0x0013, 0x1600);
// VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x0007);
// VCM[4:0] for VCOMH
delayms(50);
// GRAM horizontal Address
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
Page 21 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM Vertical Address
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0007);
LCD_CtrlWrite_ILI9320(0x0031, 0x0403);
LCD_CtrlWrite_ILI9320(0x0032, 0x0400);
LCD_CtrlWrite_ILI9320(0x0035, 0x0003);
LCD_CtrlWrite_ILI9320(0x0036, 0x0007);
LCD_CtrlWrite_ILI9320(0x0037, 0x0606);
LCD_CtrlWrite_ILI9320(0x0038, 0x0106);
LCD_CtrlWrite_ILI9320(0x0039, 0x0007);
LCD_CtrlWrite_ILI9320(0x003C, 0x0700);
LCD_CtrlWrite_ILI9320(0x003D, 0x0700);
//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000); // Horizontal GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF); // Horizontal GRAM End Address
LCD_CtrlWrite_ILI9320(0x0052, 0x0000); // Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0053, 0x013F); // Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700); // Gate Scan Line
LCD_CtrlWrite_ILI9320(0x0061, 0x0001); // NDL,VLE, REV
LCD_CtrlWrite_ILI9320(0x006A, 0x0000); // set scrolling line
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173); // 262K color and display ON
}
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
Page 22 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000); // SAP, BT[3:0], AP, DSTB, SLP
LCD_CtrlWrite_ILI9320(0x0011, 0x0000); // DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000); // VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000); // VDV[4:0] for VCOM amplitude
delayms(200); // Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0); // SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0137); // DC1[2:0], DC0[2:0], VC[2:0]
delayms(50); // Delay 50ms
LCD_CtrlWrite_ILI9320(0x0012, 0x013C); // VREG1OUT voltage
delayms(50); // Delay 50ms
LCD_CtrlWrite_ILI9320(0x0013, 0x1600); //VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x0000); //VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173); // 262K color and display ON
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000); // display OFF
//************* Power OFF sequence **************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000); // SAP, BT[3:0], APE, AP, DSTB, SLP
LCD_CtrlWrite_ILI9320(0x0011, 0x0000); // DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000); // VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000); // VDV[4:0] for VCOM amplitude
delayms(200); // Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x0002); // SAP, BT[3:0], APE, AP, DSTB, SLP
}
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
Page 23 of 34
V0.9
J1
Page 24 of 34
1
1
1
1
VDD
VCL
FMARK
GND
CON40
1
J2
VCI 1
VCI 1
TP10
VD D
VCOMH
TP11
VCL
TEST
TP4
1
VCI1
C16
C10
DDVDH
C15
1uF/25V
TP 5
V C O ML
TP12
FMARK
D1
C2
C3
C4
C5
VGL
1uF/10V
1uF/10V
1uF/10V
TEST
1
1uF/6V
Interf ace Se lect ion
i80-18 bit i nterf ace
i80-9b it int erfac e
i80-16 bit i nterf ace
i80-8b it int erfac e
SPI inter face
145
146
147
FMARK
1uF/ 6V
VCOM
C1
VGH
VGL
1uF/6.3V
C9
1uF/6.3V
1uF/25V
HSC226
C7
1uF/ 6.3V
VCL
C14
C6
1uF/ 6.3V
VCI
1uF/ 6.3V
1uF/10V
VCOM L
VR EG1OUT
1uF/6V
VREG1OUT
TEST
TEST
VCOM
1
1
TP3
VCOM L
VCOM H
C13
1uF/6. 3V
1uF/ 6.3V
C12
1uF/6. 3V
TEST
1
VCL
VCC
IOVCC
C8
TEST
TP9
C6
TEST
VCI
TEST
TP2
VGL
C5
TEST
TP8
1
TEST
TEST
1
VREG1OUT
TP7
VCOM
1
VCOM H
V CO M
TEST
VCI 1
VCL
C13
C4
TEST
VCC
C11
TEST
1
DDVDH
1
TEST
1
VGL
I OVCC
VCOM
D1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
1
2
3
4
5
6
7
8
9
36
37
38
39
40
41
DB7
42
DB6
43
44
DB5
45
DB4
46
DB3
47
DB2
48
DB1
49
DB0
50
51
nRD
52
nWR
53
RS
54
nCS
55
56
57
FMARK
58
59
60
61
62
63
64
65
66
67
68
IOVCC
69
70
VCC
71
72
73
74
75
1uF/6V
76
VDD
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
VCOM
96
97
VCOMH
1uF/6V
98
99
VCOML
1uF/6V
100
101
VREG1OUT
102
1uF/6V
103
104
105
VCL
1uF/6V
106
107
108
1uF/ 6V
109
DDVDH
110
111
112
1uF/ 6V
113
VCI1
114
115
116
VCI
117
118
119
120
121
122
123
124
125
126
R B5 21 S-30
127
1 uF/2 5V
VGL 128
129
C 14
130
VGH
1 uF/2 5V
C15
131
132
133
134
135
136
1uF/10V
C1
137
138
1uF/10V
C2
139
140
1uF/10V
C3
141
142
143
VGL
144
145
VCOM
146
DB12
DB11
DB10
DB9
DB8
DB17
DB16
DB15
DB14
nRESET
IM3
IM0
C1 0 C1 1 C1 2
TEST
TP7
VGL
TP1
VGH
1uF/6. 3V
for the OSC a nd ex terna l
resist or can be rem oved.
TEST
C8VD D
TEST
1
VGH
TP6
VREG1OUT
1
1uF/ 6.3V
VCC
(OPEN)
TP5
VCI1
VCI
TEST
M0
0
1
0
1
ID
TP4
TEST
1
M1
1
1
1
1
0
IOVCC
On the de faul t s etti ng, th e
intern al resi stor is use d
DDVDH
VGH
M2
0
0
0
0
1
TP3
VGL
1
ALL the VCOM pin s
must b e short ed
togeth er.
FMARK
U1
TP2
VGH
VCC
M3
1
1
0
0
0
TP1
120K/1%1
R1
VCOM
VSYNC
HSYNC
DOTCLK
ENABLE
SDO
SDI LED
+ LED I M0/ I D
IM1
IM2
IM3
CPU Interface
GND
TEST
1
J1
29
30
31
32
33
34
35
36
37
38
39
40
VCOM
9-bit i80 -int erf ace
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
SDO
SDI
nRD
nWR/ SCL
RS
nCS
1
FMARK
IOVCC
VC C VCI
1
nCS
RS
nWR/ SCL
nRD
nR ESET
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
18-bi t i8 0-in terf ac e
nRD
nWR
RS
0
D15
D14
D13
D12
D11
D10
D9
D8
TESTO7
D7
D6
D5
D4
D3
D2
D1
D0
SDO
SDI
nRD_E
nWR _SC L
RS
nCS
TESTO8
TESTO9
FMAR K
TSC
TEST10
OSC1
OSC_GN D
OSC2
IOGND
IOGND
IOGND
IOGND
IOVCC
IOVCC
VCC
VCC
VCC
VCC
VDD
VDD
VDD
VDD
VDD
TESTO13
TESTO14
VREF
VREFC
VDDTEST
AGND
AGND
AGND
AGND
GND
GND
GND
GND
GND
VGS
TESTO20
TESTO21
VCOM
VCOM
VCOM H
VCOM H
VCOM L
VCOM L
VREG1OU T
TESTO22
TESTA5
VCOM R
VCL
VCL
VLOUT1
VLOUT1
DDVD H
DDVD H
VCI OUT
VCI OUT
VCI 1
VCI 1
VCI
VCI
C12M
C12M
C12P
C12P
C11M
C11M
C11P
C11P
AGND DUM1
VGL
VGL
AGND DUM2
AGND DUM3
VGH
VGH
C13M
C13M
C13P
C13P
C21M
C21P
C22M
C22P
C23M
C23P
VGL_SW
VCOM
DUM MY
VCOM
VCOM
1
2
1
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
1
2
8-bit i80 -int erf ace
DB14
DB13
DB12
DB11
DB10
DB9
DB8
IM0
IM3
nRESET
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
LED+
LED-
16-bi t i8 0-in terf ac e
1
nRESET
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
32
33
34
35
36
37
38
39
40
LED+
LED-
0
0
VCC
IOVC C
VCI
LED LED +
VPP2
VPP2
VPP3
VPP3
VPP3
TESTO2
TESTO3
TEST1
TEST2
TEST4
TEST5
TEST3
IM 0/I D
IM 1
IM 2
IM 3
TESTO4
nRESET
VSYNC
HSYNC
DOTC LK
ENABLE
D17
VCOM VCO M
VCOM DUM
MY VCC D
UM1
VPP1
VPP1
VPP1
VPP2
VPP2
I M0
0
GND
2
1
-2
-1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
IM3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
2
1
IM 0/ I D
IM 1
IM 2
IM 3
VCOM
D13
D12
D11
D10
D9
D8
TESTO7
D7
D6
D5
D4
D3
D2
D1
D0
SDO
SDI
nRD_E
nWR_SCL
RS
nCS
TESTO8
TESTO9
FMARK
TSC
TEST10
OSC1
OSC_GND
OSC2
IOGND
IOGND
IOGND
IOGND
IOVCC
IOVCC
VCC
VCC
VCC
VCC
VDD
VDD
VDD
VDD
VDD
TESTO13
TESTO14
VREF
VREFC
VDDTEST
AGND
AGND
AGND
AGND
GND
GND
GND
GND
GND
VGS
TESTO20
TESTO21
VCOM
VCOM
VCOMH
VCOMH
VCOML
VCOML
VREG1OUT
TESTO22
TESTA5
VCOMR
VCL
VCL
VLOUT1
VLOUT1
DDVDH
DDVDH
VCIOUT
VCIOUT
VCI1
VCI1
VCI
VCI
C12M
C12M
C12P
C12P
C11M
C11M
C11P
C11P
AGNDDUM1
VGL
VGL
AGNDDUM2
AGNDDUM3
VGH
VGH
C13M
C13M
C13P
C13P
C21M
C21P
C22M
C22P
C23M
C23P
VGL_SW
VCOM
DUMMY
VCOM
VCOM
DUMMY
VCCDUM1
VPP1
VPP1
VPP1
VPP2
VPP2
VPP2
VPP2
VPP3
VPP3
VPP3
TESTO2
TESTO3
TEST1
TEST2
TEST4
TEST5
TEST3
IM0/I D
IM1
IM2
IM3
TESTO4
nRESET
VSYNC
HSYNC
DOTCLK
ENABLE
D17
D16
D15
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
1.5. Hannstar 2.4” Panel
U1
HSD 2. 4" QVGA f or ILI9 32 0
C7
C9
All VC OM pins must be
shorte d to gether.
Inter fac e
VCI
When the RGB int erfa ce is used to tra nsfe r
the d ispl ay data, the S PI int erf ace i s
neces sar y f or th e reg iste rs se ttin g.
LED B/ L1
Note:
1. When the RGB interface is not used, please shorted the VSYNC, HSYNC, DOTCLK
and ENABLE to GND.
2. When the SPI interface is not used, the SDI is shorted to GND and let SDO as open.
3. The Schottky barrier diode shall be added for VGL pin.
4. If the voltage of interface is 1.8V, the IOVCC is connected to 1.8V and the
VCC/VCI connect to 2.8V.
FMARK
TP8
Hannstar 3.2” Panel
ILI9320 for HSD QVGA 3.2" Panel
HSD 3.2" QVGA f or ILI 932 0
OM pins
ALL the VC
must be sh
orted
together.
ALL the VGL pins
must be shorted
together.
TP6
VREG1OUT
TP13
GND
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
HSD 2.4” initial code
void ILI9320_HSD24_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
// This delay time is necessary
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
// Set the internal vcore voltage
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
// set SS and SM bit
LCD_CtrlWrite_ILI9320(0x0003, 0x1030);
// set GRAM write direction and BGR=1.
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
// Resize register
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
// set the back porch and front porch
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
// FMARK function
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
// Frame marker Position
// Start internal OSC.
// set 1 line inversion
// set non-display area refresh cycle ISC[3:0]
// RGB interface setting
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// RGB interface polarity
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
// VREG1OUT voltage
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
delayms(50);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x013A);
// VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1C00);
LCD_CtrlWrite_ILI9320(0x0029, 0x000A);
// Delay 50ms
// Delay 50ms
// VDV[4:0] for VCOM amplitude
// VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM horizontal Address
// GRAM Vertical Address
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0007);
LCD_CtrlWrite_ILI9320(0x0031, 0x0203);
LCD_CtrlWrite_ILI9320(0x0032, 0x0001);
LCD_CtrlWrite_ILI9320(0x0035, 0x0007);
LCD_CtrlWrite_ILI9320(0x0036, 0x0407);
LCD_CtrlWrite_ILI9320(0x0037, 0x0607);
LCD_CtrlWrite_ILI9320(0x0038, 0x0106);
LCD_CtrlWrite_ILI9320(0x0039, 0x0007);
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Page 25 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
LCD_CtrlWrite_ILI9320(0x003C, 0x0007);
LCD_CtrlWrite_ILI9320(0x003D, 0x001E);
//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000);
// Horizontal GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF);
LCD_CtrlWrite_ILI9320(0x0052, 0x0000);
// Horizontal GRAM End Address
LCD_CtrlWrite_ILI9320(0x0053, 0x013F);
// Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700);
LCD_CtrlWrite_ILI9320(0x0061, 0x0001);
// Gate Scan Line
LCD_CtrlWrite_ILI9320(0x006A, 0x0000);
// set scrolling line
// Vertical GRAM Start Address
// NDL,VLE, REV
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VREG1OUT voltage
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// R11h=0x0031 at VCI=3.3V DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x013A);
// R12h=0x0138 at VCI=3.3V VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1C00);
// R13h=0x1800 at VCI=3.3V VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x000A);
// R29h=0x0008 at VCI=3.3V VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
// VDV[4:0] for VCOM amplitude
// SAP, BT[3:0], AP, DSTB, SLP, STB
// Delay 50ms
// Delay 50ms
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000);
// display OFF
//************* Power OFF sequence **************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], APE, AP, DSTB, SLP
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Page 26 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
// Dis-charge capacitor power voltage
// SAP, BT[3:0], APE, AP, DSTB, SLP
LCD_CtrlWrite_ILI9320(0x0010, 0x0002);
}
HSD 3.2” initial code
void ILI9320_HSD32_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
// This delay time is necessary
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
// Set the internal vcore voltage
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
// set SS and SM bit
LCD_CtrlWrite_ILI9320(0x0003, 0x1030);
// set GRAM write direction and BGR=1.
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
// Resize register
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
// set the back porch and front porch
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
// FMARK function
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
// Frame marker Position
// Start internal OSC.
// set 1 line inversion
// set non-display area refresh cycle ISC[3:0]
// RGB interface setting
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// RGB interface polarity
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
// VREG1OUT voltage
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
delayms(50);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x013B);
// VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1800);
LCD_CtrlWrite_ILI9320(0x0029, 0x000F);
// Delay 50ms
// Delay 50ms
// VDV[4:0] for VCOM amplitude
// VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM horizontal Address
// GRAM Vertical Address
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0000);
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Page 27 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
LCD_CtrlWrite_ILI9320(0x0031, 0x0007);
LCD_CtrlWrite_ILI9320(0x0032, 0x0103);
LCD_CtrlWrite_ILI9320(0x0035, 0x0407);
LCD_CtrlWrite_ILI9320(0x0036, 0x090F);
LCD_CtrlWrite_ILI9320(0x0037, 0x0404);
LCD_CtrlWrite_ILI9320(0x0038, 0x0400);
LCD_CtrlWrite_ILI9320(0x0039, 0x0404);
LCD_CtrlWrite_ILI9320(0x003C, 0x0000);
LCD_CtrlWrite_ILI9320(0x003D, 0x0400);
//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000);
// Horizontal GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF);
LCD_CtrlWrite_ILI9320(0x0052, 0x0000);
// Horizontal GRAM End Address
LCD_CtrlWrite_ILI9320(0x0053, 0x013F);
// Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700);
LCD_CtrlWrite_ILI9320(0x0061, 0x0001);
// Gate Scan Line
LCD_CtrlWrite_ILI9320(0x006A, 0x0000);
// set scrolling line
// Vertical GRAM Start Address
// NDL,VLE, REV
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VREG1OUT voltage
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x013B);
// VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1800);
// VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x000F);
// VCM[4:0] for VCOMH
// VDV[4:0] for VCOM amplitude
// SAP, BT[3:0], AP, DSTB, SLP, STB
// Delay 50ms
// Delay 50ms
delayms(50);
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Page 28 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000);
// display OFF
//************* Power OFF sequence **************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], APE, AP, DSTB, SLP
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x0002);
// VDV[4:0] for VCOM amplitude
// Dis-charge capacitor power voltage
// SAP, BT[3:0], APE, AP, DSTB, SLP
}
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Page 29 of 34
V0.9
DDV DH
TP4
shall
4. If the voltage of interface is 1.8V,
VCC/VCI can be shorted together.
Page 30 of 34
TP5
TP6
VCI 1
VR EG1OUT
please
2. When the SPI interface
let SDO as open.
the SDI is shorted
shorted
the IOVCC
VCL
TP7
is connected
the VSYNC,
C5
to IOVCC
C6
HSYNC,
C14
C7
C8
C9
C15
C1 0
C11
C11
C12
1uF /10V
C12
VCOM
1uF/ 10V
1uF /10V
C1 0
VCOM
VGH
1uF/ 10V
C9
1uF/ 10V
C15
1uF /10V
R B521S-30
1uF/2 5V
VCO MH
Vc ore
VGL
VCI
VCI 1
DDV DH
VC L
VCO ML
VR EG1OUT
VCOM
D1
1uF /10V
D1
VGH
1uF /10V
1uF/2 5V
C8
1uF/ 10V
VGL
C14
1uF/2 5V
R B521S-30
HSYNC,
1uF /10V
VCI
1uF/ 6. 3V
1uF/ 10V
1uF/ 6. 3V
1uF/ 6. 3V
1uF/ 6. 3V
1uF/ 6. 3V
VC OM
I OVC C
C7
1uF/2 5V
C4
VCI
to IOVCC
C6
1uF /10V
DDV DH
is connected
VCI 1
the VSYNC,
C5
1uF /10V
C2C 3
C4
C4
VCI
C1
1uF/ 10V
1
VCL
C2C 3
1uF/ 6. 3V
TEST
the SDI is shorted
VC L
FMA RK
0. 1uF /6. 3V
VCC
I OVCC
FMA R K
nR D
nWR
RS nC
S
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
nRESET
I M3
I M0
C1
1uF/ 6. 3V
VCO MH
1
1
TP7
VCO ML
VR EG1OUT
TEST
TEST
VR EG1OUT
VC L
VREG1OU T
please
2. When the SPI interface
let SDO as open.
shorted
1uF/ 6. 3V
1uF/ 6. 3V
VCOM
Vc ore
1
VCI 1
1uF/ 6. 3V
1uF /6.3V
1
1
TEST
TEST
DD VDH
VC I 1
TEST
VGL
1
TP6
1
Note:
1. When the RGB interface is not used,
and ENABLE to IOVCC or GND.
is not used,
the IOVCC
TEST
TP3
diode
TP5
FMA RK
VGL
DDV DH
VCC
TEST
VGH
1
VGL
1
TP2
VGH
barrier
TP4
TEST
Inter fac e
I OVCC
TEST
VC OM
4. If the voltage of interface is 1.8V,
VCC/VCI can be shorted together.
VC L
TP1
VCOM
TP3
shall
1
3. The Schottky
FMA R K
nR D
nWR
RS nC
S
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
Note:
1. When the RGB interface is not used,
and ENABLE to IOVCC or GND.
is not used,
TEST
CPU Interface
42
43
44
45
46
47
48
49
1
2
Inter fac e
VREG1OU T
18-bi t i 80- int erfa ce
1
1
diode
TEST
0
VGH
barrier
VC I 1
1
VCOM
1
8- bit i80 -in terf ace
TP2
TEST
16- bit i8 0-in terf ace
1
40
41
CPU Interface
TP1
DD VDH
IM0
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
J1
1
0
0
32
33
34
35
36
37
38
39
3. The Schottky
TEST
0
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
1
2
18-bi t i 80- int erfa ce
nR D
nWR
RS nC
S
FMA RK
I OVCC
VC C VC
I
LED+
LED1
nRESET
I M0
I M3
nR ESET
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
LED+
LED0
20
21
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
22
23
24
25
26
27
28
29
30
31
DUMMY
DUMMY
VCO M
VCO M
VCO M
VPP1
VPP2
VPP2
VPP2
VPP2
VPP3A
VPP3A
VPP3B
T ESTO2
I OGND DUM
T ESTO3
T EST1
T EST2
T EST4
T EST5
PROTE CT
I M0/ I D
I M1
I M2
I M3
T ESTO4
I OVCC DUM
T ESTO5
R ESET
VSYNC
H SYNC
DOTC LK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
I OGND DUM
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
SDO
SDI
RD
WR/ SCL
RS
CS
I OVCC DUM
T ESTO9
FMAR K
TS8
TS7
TS6
TS5
TS4
TS3
TS2
TS1
TSC
T ESTO10
I OGND DUM
T ESTO11
T ESTO12
DUMMY R4
I OGND
I OGND
I OGND
I OVCC
I OVCC
I OVCC
VCC
VCC
VCC
VDD
VDD
VDD
AGND
AGND
AGND
GND
GND
RGND
RGND
RGND
VGS
VCOM
VCOM
VCOMH
VCOMH
VCOML
VCOML
VREG1OUT
VCOMR
VCL
VLOUT 1
DDVD H
DDVD H
VCI OU T
VCI 1
VCI 1
VCI LVL
VCI
VCI
VCI
C 12C 12C 12+
C 12+
C 11C 11C 11+
C 11+
VLOUT 3
VGL
VGL
VGL
VLOUT 2
VGH
VGH
C 13C 13+
C 21C 21+
C 22C 22+
C 23C 23+
VCOM
VCOM
VCOM
DUMMY
DUMMY
1
I OVC C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
8- bit i80 -in terf ace
I M3
I M0
VC OM
16- bit i8 0-in terf ace
1
VGL
1
2
1
IM0
1
1
1
2
0
0
TEST
TEST
J1
0
nR D
nWR
RS nC
S
FMA RK
I OVCC
VC C VC
I
LED+
LED-
IM3
I M0
I M3
nR ESET
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
LED+
LEDIM3
VGH
VC OM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
43
44
45
46
47
48
49
50
41
42
33
34
35
36
37
38
39
40
23
24
25
26
27
28
29
30
31
32
21
22
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
DUMMY
DUMMY
DUMMY
VCO M
VCO M
VCO M
DUMMY
DUMMY
VPP1
VPP2
VPP2
VPP2
VPP2
VPP3A
VPP3A
VPP3B
T ESTO2
I OGND DUM
T ESTO3
T EST1
T EST2
T EST4
T EST5
PROTE CT
I M0/ I D
I M1
I M2
I M3
T ESTO4
I OVCC DUM
T ESTO5
R ESET
VSYNC
H SYNC
DOTC LK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
I OGND DUM
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
SDO
SDI
RD
WR/ SCL
RS
CS
I OVCC DUM
T ESTO9
FMAR K
TS8
TS7
TS6
TS5
TS4
TS3
TS2
TS1
TSC
T ESTO10
I OGND DUM
T ESTO11
T ESTO12
DUMMY R4
I OGND
I OGND
I OGND
I OVCC
I OVCC
I OVCC
VCC
VCC
VCC
VDD
VDD
VDD
AGND
AGND
AGND
GND
GND
RGND
RGND
RGND
VGS
VCOM
VCOM
VCOMH
VCOMH
VCOML
VCOML
VREG1OUT
VCOMR
VCL
VLOUT 1
DDVD H
DDVD H
VCI OU T
VCI 1
VCI 1
VCI LVL
VCI
VCI
VCI
C 12C 12C 12+
C 12+
C 11C 11C 11+
C 11+
VLOUT 3
VGL
VGL
VGL
VLOUT 2
VGH
VGH
C 13C 13+
C 21C 21+
C 22C 22+
C 23C 23+
DUMMY
DUMMY
VCOM
VCOM
VCOM
DUMMY
DUMMY
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
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联系人:杨 生 13543266942 13642365547
1.6. AUO 2.6” & 2.8” Panel
U1
ILI9320_AUO2.6&2.8
C13
When the RG B i nter fac e is us ed to t ran sfe r
the d isp lay da ta, the SPI in ter face is
neces sar y f or the reg iste rs set ting .
9-bit i8 0-i nte rfa ce
LED B/ L1
or GND, and
DOTCLK
be added for VGL and VGH pins.
TP8
to 1.8V and the
FMAR K
AUO 2.4” Panel
U1
ILI9320_AUO2.4
C13
When the RG B i nter fac e is us ed to t ran sfe r
the d isp lay da ta, the SPI in ter face is
neces sar y f or the reg iste rs set ting .
9-bit i8 0-i nte rfa ce
LED B/ L1
or GND, and
DOTCLK
be added for VGL and VGH pins.
to 1.8V and the
FMAR K
TP8
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
V0.9
TEST
1
TEST
FMA RK
33
34
35
36
37
38
39
40
41
42
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
DU MMY
DU MMY
VCOM
VCOM
DU MMY
TEST1
TEST2
TEST4
TEST5
TEST3
I M0/I D
I M1
I M2
I M3
RESET
VSYNC
HSYNC
DO TCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
SDO
SDI
RD
WR/SCL
RS
CS
FMARK
TSC
OSC1
OSC2
I OGND
I OGND
I OVCC
I OVCC
VCC
VCC
VCC
VDD
VDD
VREFC
VDDTEST
AGND
AGND
AGND
DG ND
DG ND
DGND
RGND
RGND
VGS
VGS
VCOM
VCOM
VCOMH
VCOMH
VCOML
VCOML
VCOML
VREG1OUT
VCOMR
VCOMR
VCL
VCL
VLOUT1
VLOUT1
DDVDH
DDVDH
VCI OUT
VCI OUT
VCI 1
VCI 1
VCI LVL
VCI LVL
VCI
VCI
C12C12C12C12+
C12+
C12+
C11C11C11C11+
C11+
C11+
AGNDDU M1
VLOUT3
VGL
VGL
VGL
AGNDDU M3
VLOUT2
VLOUT2
VGH
VGH
TESTO27
C13C13C13C13+
C13+
C13+
C21C21C21+
C21+
C22C22C22+
C22+
C23C23C23+
C23+
DUMMY
VGL
DUMMY
VCOM
VCOM
DUMMY
DU MMY
C2
barrier
4. If the voltage of interface
VCC/VCI connect
to 2.8V.
VGL
TP3
DDV DH
TP4
C3
C4
C5
VCI 1
TP5
Page 31 of 34
C6
VREG1OUT
TP6
R1
120K
VCL
TP7
Note:
1. When the RGB interface
and ENABLE to GND.
is not used, please shorted
2. When the SPI interface
is not used, the SDI is shorted
C7
C8
C9
1uF/6V
1uF/ 6V
is 1.8V, the IOVCC is connected
D1
1
TP6
T EST
1
VR EG1OU T
F M AR K
T EST
TP5
VC L
VCI 1
1
TP4
T EST
D D VD H
V R E G 1O U T
1
TP3
T EST
VGL
VC I 1
1
GN D
F M AR K
I O VC C
VC I
VC C
nC S
RS
nW R /S C L
nR D
SD I
SD O
D B0
D B1
D B2
D B3
D B4
D B5
D B6
D B7
D B8
D B9
D B1 0
D B1 1
D B1 2
D B1 3
D B1 4
D B1 5
D B1 6
D B1 7
EN AB L E
D OT C LK
H SYN C
VS YN C
nR E S E T
L ED +
LE D -
TP2
T EST
1
1
1
2
3
4
5
6
7
8
9
10
VGH
D D VD H
T EST
T EST
1
GN D
GN D
F M AR K
VC C VC I
N CS
RS
nW R /E/SC L
SD I nR D _W R
T EST
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SD O 11
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D 10
D 11
D 12
D 13
D 14
D 15
D 16
D 17
E N A B LE
D O T C LK
H SYN C
VSYN C
33
34
35
36
TP1
VG L
VG H
VC O M
LED LED +
N R ESET
VC OM
1
TP2
VCL
All VCOM pin s mu st
shorted toget her.
43
44
45
46
47
48
49
50
I OVCC
51
52
VCC
53
54
55
56
1 uF / 6V
57
58
59
60
61
62
63
64
65
66
67
68
69
VCOM
70
1 uF / 6V
71
72
73
1 uF / 6V
74
75
1 uF / 6V
VREG1OUT 76
77
78
1 uF / 6V
79
VCL
80
81
82
83
DDVDH 84
1uF / 1 0V
85
86
87
VCI 1
1 uF / 6V
88
89
90
VCI
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
VGL
107
1uF / 2 5V
C10
108
109
110
111
1 uF/2 5V
C11
112
113
VGH
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
VGL
135
136
137
VCOM
138
139
140
nRD
nWR
RS
nCS
FMARK
C1
1
VGH
TEST
TP1
VREG1OUT
VCOM
C4
1uF / 6. 3V
C9
VC L
TP7
C12
C13
C14
C15
1uF/6V
1uF/ 6V
1uF/ 6V
1uF/ 6V
C 14
C 15
1uF /1 0V
C 13
1uF /1 0V
1uF /1 0V
C 12
C 11
1uF /2 5V
1uF / 6. 3V
C 10
1uF /2 5V
R B521S-30
D1
1uF / 6. 3V
C8
C7
1uF / 6. 3V
1uF / 6. 3V
C6
1uF /1 0V
C5
C3
1uF / 6. 3V
C2
1uF / 6. 3V
C1
1uF / 6. 3V
1uF / 6. 3V
FMARK
nWR/SCL
RS
nCS
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
SDO
SDI
nRD
nRESET
VSYNC
HSYNC
DOTCLK
ENABLE
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
IM0
IM1
IM2
IM3
VCOM
VCOM
VGH
VGL
VCI
VCI1
DDVDH
VCL
VCOML
VCOMH
VCOM
VDD
VCC
IOVCC
R1
120
1
CPU Interface
TEST
3. The Schottky
VCI 1
9-bit i80-i nterfac e
TEST
1
18-bit i80-in terfac e
1
DDV DH
0
1
1
1
TEST
8-bit i80-i nterfac e
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
I M3
nRESET
I M0
I OVCC
VCOM
36
VGL
16-bit i80-in terfac e
1
1
0
0
TEST
1
2
IM0
0
VGH
1
1
2
IM3
nRD
nWR
RS
nCS
FMARK
I OVCC
VC C VC I
LED+
LED-
J4
Connec tor
TEST
J1
I M0
I M3
nRESET
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
LED+
LED1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
10 0
10 1
10 2
10 3
10 4
10 5
10 6
10 7
10 8
10 9
11 0
11 1
11 2
11 3
11 4
11 5
11 6
11 7
11 8
11 9
12 0
12 1
12 2
12 3
12 4
12 5
12 6
12 7
12 8
12 9
13 0
13 1
13 2
13 3
13 4
13 5
13 6
13 7
13 8
13 9
14 0
14 1
14 2
14 3
14 4
14 5
14 6
14 7
14 8
14 9
15 0
15 1
15 2
15 3
15 4
15 5
15 6
15 7
15 8
15 9
16 0
16 1
16 2
16 3
16 4
16 5
16 6
16 7
16 8
16 9
17 0
17 1
17 2
17 3
17 4
17 5
17 6
17 7
NC
NC
VC O M
VC O M
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
T EST 1
T EST 2
T EST 4
T EST 5
PR O T EC T
I M O /I D
IM 1
IM 2
IM 3
NC
NC
R ES ET
V SYN C
H SYN C
D O T C LK
E N A B LE
D B1 7
D B1 6
D B1 5
D B1 4
D B1 3
D B1 2
D B1 1
D B1 0
D B9
D B8
NC
NC
D B7
D B6
D B5
D B4
D B3
D B2
D B1
D B0
SD O
SD I
RD
W R / SC L
RS
CS
NC
NC
F M AR K
NC
NC
NC
NC
NC
T SC
NC
NC
NC
O SC 1
O SC 2
IOGN D
IOGN D
IOGN D
IOGN D
IOV CC
IOV CC
VC C
VC C
VC C
VC C
VD D
VD D
VD D
VD D
VD D
NC
NC
VR EF C
VD D T E ST
AG N D
AG N D
AN G D
GND
GND
GND
R GN D
R GN D
VG S
NC
NC
NC
NC
NC
VC O M
VC O M
VC O M H
VC O M H
VC O M L
VC O M L
NC
NC
V R E G 1O U T
NC
NC
VC O M R
VC O M R
VC L
VC L
VL O U T 1
VL O U T 1
D D VD H
D D VD H
VC I O U T
VC I O U T
VC I 1
VC I 1
VC I L VL
VC I
VC I
C 1 2C 1 2C 1 2+
C 1 2+
C 1 1C 1 1C 1 1+
C 1 1+
NC
VL O U T 3
VG L
VG L
VG L
NC
NC
NC
VL O U T 2
VG H
VG H
NC
C 1 3C 1 3NC
C 1 3+
C 1 3+
NC
C 2 1C 2 1C 2 1+
C 2 1+
C 2 2C 2 2C 2 2+
C 2 2+
C 2 3C 2 3C 2 3+
C 2 3+
NC
NC
VC O M
VC O M
NC
ILI9320_PVI 2. 2
VCO M
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
1.7. PVI2.2” 2.8” Panel
Note:
1. When the RGB interface is not used, please shorted the VSYNC, HSYNC, DOTCLK
and ENABLE to IOVCC or GND.
2. When the SPI interface is not used, the SDI is shorted to IOVCC or GND, and
let SDO as open.
3. The Schottky barrier diode shall be added for VGL and VGH pins.
4. If the voltage of interface is 1.8V, the IOVCC is connected to 1.8V and the
VCC/VCI can be shorted together.
FM AR K
TP8
PVI2.4” Panel
U1
PVI 2. 4" QVGA f or I LI 9320
be
Interfac e
When the RGB int erfac e is use d to trans fer
the d isplay data , th e SPI inte rface is
necessar y for th e re giste rs set ting.
LED B/ L1
the VSYNC, HSYNC, DOTCLK
diode shall be added for VGL pin.
to GND and let SDO as open.
to 1.8V and the
FMARK
TP8
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网站www.sbdsemi.cn EMAIL:[email protected]
联系人:杨 生 13543266942 13642365547
1.7.1 PVI 2.8” initial code
void ILI9320_PVI28_Initial(void)
{
// VCI=2.8V
//************* Reset LCD Driver ****************//
LCD_nRESET = 1;
delayms(1); // Delay 1ms
LCD_nRESET = 0;
delayms(10); // Delay 10ms
// This delay time is necessary
LCD_nRESET = 1;
delayms(50); // Delay 50 ms
//************* Start Initial Sequence **********//
LCD_CtrlWrite_ILI9320(0x00E5, 0x8000);
LCD_CtrlWrite_ILI9320(0x0000, 0x0001);
// Set the internal vcore voltage
LCD_CtrlWrite_ILI9320(0x0001, 0x0100);
LCD_CtrlWrite_ILI9320(0x0002, 0x0700);
// set SS and SM bit
LCD_CtrlWrite_ILI9320(0x0003, 0x1030);
// set GRAM write direction and BGR=1.
LCD_CtrlWrite_ILI9320(0x0004, 0x0000);
// Resize register
LCD_CtrlWrite_ILI9320(0x0008, 0x0202);
LCD_CtrlWrite_ILI9320(0x0009, 0x0000);
// set the back porch and front porch
LCD_CtrlWrite_ILI9320(0x000A, 0x0000);
LCD_CtrlWrite_ILI9320(0x000C, 0x0000);
// FMARK function
LCD_CtrlWrite_ILI9320(0x000D, 0x0000);
// Frame marker Position
// Start internal OSC.
// set 1 line inversion
// set non-display area refresh cycle ISC[3:0]
// RGB interface setting
LCD_CtrlWrite_ILI9320(0x000F, 0x0000);
//*************Power On sequence ****************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// RGB interface polarity
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VDV[4:0] for VCOM amplitude
delayms(200);
// VREG1OUT voltage
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// SAP, BT[3:0], AP, DSTB, SLP, STB
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
delayms(50);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0138);
// VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1700);
LCD_CtrlWrite_ILI9320(0x0029, 0x000D);
// Delay 50ms
// Delay 50ms
// VDV[4:0] for VCOM amplitude
// VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0020, 0x0000);
LCD_CtrlWrite_ILI9320(0x0021, 0x0000);
// GRAM horizontal Address
// GRAM Vertical Address
// ----------- Adjust the Gamma Curve ----------//
LCD_CtrlWrite_ILI9320(0x0030, 0x0001);
LCD_CtrlWrite_ILI9320(0x0031, 0x0606);
LCD_CtrlWrite_ILI9320(0x0032, 0x0304);
LCD_CtrlWrite_ILI9320(0x0035, 0x0103);
LCD_CtrlWrite_ILI9320(0x0036, 0x011D);
LCD_CtrlWrite_ILI9320(0x0037, 0x0404);
LCD_CtrlWrite_ILI9320(0x0038, 0x0404);
LCD_CtrlWrite_ILI9320(0x0039, 0x0404);
LCD_CtrlWrite_ILI9320(0x003C, 0x0700);
LCD_CtrlWrite_ILI9320(0x003D, 0x0A1F);
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
Page 32 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
//------------------ Set GRAM area ---------------//
LCD_CtrlWrite_ILI9320(0x0050, 0x0000);
// Horizontal GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0051, 0x00EF);
LCD_CtrlWrite_ILI9320(0x0052, 0x0000);
// Horizontal GRAM End Address
LCD_CtrlWrite_ILI9320(0x0053, 0x013F);
// Vertical GRAM Start Address
LCD_CtrlWrite_ILI9320(0x0060, 0x2700);
LCD_CtrlWrite_ILI9320(0x0061, 0x0001);
// Gate Scan Line
LCD_CtrlWrite_ILI9320(0x006A, 0x0000);
// set scrolling line
// Vertical GRAM Start Address
// NDL,VLE, REV
//-------------- Partial Display Control ---------//
LCD_CtrlWrite_ILI9320(0x0080, 0x0000);
LCD_CtrlWrite_ILI9320(0x0081, 0x0000);
LCD_CtrlWrite_ILI9320(0x0082, 0x0000);
LCD_CtrlWrite_ILI9320(0x0083, 0x0000);
LCD_CtrlWrite_ILI9320(0x0084, 0x0000);
LCD_CtrlWrite_ILI9320(0x0085, 0x0000);
//-------------- Panel Control -------------------//
LCD_CtrlWrite_ILI9320(0x0090, 0x0010);
LCD_CtrlWrite_ILI9320(0x0092, 0x0000);
LCD_CtrlWrite_ILI9320(0x0093, 0x0003);
LCD_CtrlWrite_ILI9320(0x0095, 0x0110);
LCD_CtrlWrite_ILI9320(0x0097, 0x0000);
LCD_CtrlWrite_ILI9320(0x0098, 0x0000);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
}
void LCD_ExitSleep_ILI9320(void)
{
//*************Power On sequence ******************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// SAP, BT[3:0], AP, DSTB, SLP
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
// VREG1OUT voltage
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x17B0);
// Dis-charge capacitor power voltage
LCD_CtrlWrite_ILI9320(0x0011, 0x0037);
// R11h=0x0031 at VCI=3.3V DC1[2:0], DC0[2:0], VC[2:0]
delayms(50);
LCD_CtrlWrite_ILI9320(0x0012, 0x0138);
// R12h=0x0138 at VCI=3.3V VREG1OUT voltage
delayms(50);
LCD_CtrlWrite_ILI9320(0x0013, 0x1700);
// R13h=0x1800 at VCI=3.3V VDV[4:0] for VCOM amplitude
LCD_CtrlWrite_ILI9320(0x0029, 0x000D);
// R29h=0x0008 at VCI=3.3V VCM[4:0] for VCOMH
delayms(50);
LCD_CtrlWrite_ILI9320(0x0007, 0x0173);
// 262K color and display ON
// VDV[4:0] for VCOM amplitude
// SAP, BT[3:0], AP, DSTB, SLP, STB
// Delay 50ms
// Delay 50ms
}
void LCD_EnterSleep_ILI9320(void)
{
LCD_CtrlWrite_ILI9320(0x0007, 0x0000);
// display OFF
//************* Power OFF sequence **************//
LCD_CtrlWrite_ILI9320(0x0010, 0x0000);
// SAP, BT[3:0], APE, AP, DSTB, SLP
LCD_CtrlWrite_ILI9320(0x0011, 0x0000);
// DC1[2:0], DC0[2:0], VC[2:0]
LCD_CtrlWrite_ILI9320(0x0012, 0x0000);
// VREG1OUT voltage
LCD_CtrlWrite_ILI9320(0x0013, 0x0000);
delayms(200);
LCD_CtrlWrite_ILI9320(0x0010, 0x0002);
// VDV[4:0] for VCOM amplitude
// Dis-charge capacitor power voltage
// SAP, BT[3:0], APE, AP, DSTB, SLP
}
圣邦达电子有限公司 电话 0755-83723989 81753210 传真 0755-61351350 www.sbdsemi.cn
Page 33 of 34
V0.9
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
网 站 www.sbdsemi.cn
EMAIL : [email protected]
联系人:杨 生 13543266942 13642365547
Revision History
Revision History
Version No.
Date
Page
Description
V0.1
2006/11/22
New
V0.2
2006/11/28
Add the Hannstar FPC circuit
V0.4
2007/01/02
Add CPT 2.8” initial code
V0.5
2007/1/5
Modify the Hannstar FPC circuit
V0.6
2007/2/2
Add the Hannstar initial code
V0.7
2007/2/7
Add the AUO FPC circuit
V0.8
2007/2/9
ADD PVI FPC circuit
V0.9
2007/3/13
ADD CPT 3.2” panel FPC circuit and initial code
V0.91
2007/03/20
ADD Hannstar 2.4 initial code
V0.92
2007/04/21
ADD Hanstar 3.2 FPC and Initial code
ADD PVI 2.4 FPC and PVI 2.8 Initial code
ADD CMO 2.2 and 2.4 Initial code
台湾 ILITEK(弈力)公司推出的此芯片 ILI9320,是一款 TFT 屏的驱动 IC
该芯片可广泛适用与各类手机 LCM,MP3MP4 的 LCM 等产品。
有在设计生产中使用到此芯片的各企业公司可来电来信联系咨询。
深圳代理销售处:
深圳市圣邦达电子有限公司
电话:086-0755-83723989 传真:086-0755-61351350
联系人:杨 生 13543266942 13642365547
网址: www.sbdsemi.cn EMAIL:[email protected]
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