DISCRETE SEMICONDUCTORS DATA SHEET PHP1025 P-channel enhancement mode MOS transistor Objective specification File under Discrete Semiconductors, SC13b 1998 Feb 18 Philips Semiconductors Objective specification P-channel enhancement mode MOS transistor PHP1025 FEATURES PINNING - SOT96-1 (SO8) • Very low RDSon at low threshold PIN SYMBOL • High-speed switching DESCRIPTION 1 s source • No secondary breakdown 2 s source • Direct interface to C-MOS, TTL, etc. 3 s source 4 g gate APPLICATIONS 5 d drain • Power management 6 d drain • DC-DC converters 7 d drain • General purpose switch. 8 d drain DESCRIPTION P-channel enhancement mode MOS transistor in an 8-pin SOT96-1 (SO8) SMD plastic package. handbook, halfpage 8 d 5 g CAUTION 1 The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. 4 s Top view MAM398 Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS VDS drain-source voltage (DC) VSD source-drain diode forward voltage IS = −1.25 A; VGD = 0 MIN. MAX. UNIT − −12 V − −1.3 V VGSO gate-source voltage (DC) open drain − ±8 V VGSth gate-source threshold voltage ID = −1 mA; VDS = VGS −0.4 − V ID drain current (DC) Ts = 80 °C − −10 A RDSon drain-source on-state resistance ID = −5 A; VGS = −2.5 V − 25 mΩ Ptot total power dissipation Ts = 80 °C − 4 W 1998 Feb 18 2 Philips Semiconductors Objective specification P-channel enhancement mode MOS transistor PHP1025 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage (DC) − −12 V VGSO gate-source voltage (DC) open drain − ±8 V ID drain current (DC) Ts = 80 °C; note 1 − −10 A IDM peak drain current note 2 − −40 A Ptot total power dissipation Ts = 80 °C − 4 W Tamb = 25 °C; note 3 − 2.78 W Tamb = 25 °C; note 4 − 1.16 W Tstg storage temperature −55 +150 °C Tj operating junction temperature −55 +150 °C Source-drain diode IS source current (DC) Ts = 80 °C − −3 A ISM peak pulsed source current note 2 − −12 A Notes 1. Ts is the temperature at the soldering point of the drain lead. 2. Pulse width and duty cycle limited by maximum junction temperature. 3. Device mounted on a printed-circuit board with a Rth a-tp (ambient to tie-point) of 27.5 K/W. 4. Device mounted on a printed-circuit board with a Rth a-tp (ambient to tie-point) of 90 K/W. THERMAL CHARACTERISTICS SYMBOL Rth j-s PARAMETER thermal resistance from junction to soldering point 1998 Feb 18 3 VALUE UNIT 17.5 K/W Philips Semiconductors Objective specification P-channel enhancement mode MOS transistor PHP1025 CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. −12 TYP. − MAX. − UNIT V(BR)DSS drain-source breakdown voltage VGS = 0; ID = −10 µA VGSth gate-source threshold voltage VGS = VDS ; ID = −1 mA −0.4 − − V IDSS drain-source leakage current VGS = 0; VDS = −9.6 V − − −100 nA IGSS gate leakage current VGS = ±8 V; VDS = 0 − − ±100 nA RDSon drain-source on-state resistance V VGS = −4.5 V; ID = −5 A − − 23 mΩ VGS = −2.5 V; ID = −5 A − − 25 mΩ VGS = −1.8 V; ID = −2.5 A − − 29 mΩ Ciss input capacitance VGS = 0; VDS = −9.6 V; f = 1 MHz − tbf − pF Coss output capacitance VGS = 0; VDS = −9.6 V; f = 1 MHz − tbf − pF Crss reverse transfer capacitance VGS = 0; VDS = −9.6 V; f = 1 MHz − tbf − pF QG total gate charge VGS = −6 V; VDD = −6 V; ID = −5 A; Tamb = 25 °C − tbf − pC QGS gate-source charge VDD = −6 V; ID = −5 A Tamb = 25 °C − tbf − pC QGD gate-drain charge VDD = −6 V; ID = −5 A Tamb = 25 °C − tbf − pC VGS = 0 to −6 V; VDD = −6 V; ID = −1 A; Rgen = 6 Ω − tbf − ns − tbf − ns − tbf − ns − tbf − ns − tbf − ns − tbf − ns − − −1.3 V − tbf − ns Switching times td(on) turn-on delay time tf fall time ton turn-on switching time td(off) turn-off delay time tr rise time toff turn-off switching time VGS = −6 to 0 V; VDD = −6 V; ID = −1 A; Rgen = 6 Ω Source-drain diode VSD source-drain diode forward voltage VGD = 0; IS = −1.25 A trr reverse recovery time 1998 Feb 18 IS = −1.25 A; di/dt = 100 A/µs 4 Philips Semiconductors Objective specification P-channel enhancement mode MOS transistor PHP1025 PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 D E A X c y HE v M A Z 5 8 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.014 0.0075 0.20 0.19 0.16 0.15 0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024 inches 0.010 0.057 0.069 0.004 0.049 0.01 0.01 0.028 0.004 0.012 θ Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT96-1 076E03S MS-012AA 1998 Feb 18 EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 97-05-22 5 o 8 0o Philips Semiconductors Objective specification P-channel enhancement mode MOS transistor PHP1025 DEFINITIONS Data Sheet Status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Feb 18 6 Philips Semiconductors Objective specification P-channel enhancement mode MOS transistor PHP1025 NOTES 1998 Feb 18 7 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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