INTERSIL CA5470E

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Operational Amplifier with MOSFET Input/Bipolar Output
CA5470
®
May 2001
Features
Description
• High Speed CMOS Input Stage Provides
- Very High ZI . . . . . . . . . . . . . . . 5TΩ (5 x 1012Ω) (Typ)
- Very Low lI . . . . . . . . . . 0.5pA (Typ) at 5V Operation
- Very Low IIO . . . . . . . . . 0.5pA (Typ) at 5V Operation
The CA5470 is an operational amplifier that combines the
advantages of both high speed CMOS and bipolar transistors
on a single monolithic chip. It is constructed in the BiMOS-E
process which adds drain-extension implants to 3µm polygate
CMOS, enhancing both the voltage capability and providing
vertical bipolar transistors for broadband analog/digital functions. This process lends itself easily to high speed operational
amplifiers, comparators, analog switches and interface peripherals, resulting in twice the speed of the conventional CMOS
transistors having similar feature size.
• ESD Protection to 2000V
• 3V to 16V Power Supply Operation
• Fully Guaranteed Specifications Over Full Military
Range
• Wide BW (14MHz); High SR (5V/µs) at 5V Supply
• Wide VlCR Range From -0.5V to 3.7V (Typ) at 5V Supply
• Ideally Suited for CMOS and HCMOS Applications
Applications
• Bar Code Readers
BiMOS-E are broadbased bipolar transistors that have high
transconductance, gains more constant with current level, stable “precision” base-emitter offset voltages and superior drive
capability. Excellent interface with environmental potentials
enable use in 5V logic systems and future 3.3V logic systems.
Refer to Application Note AN8811.
• Fast Sample and Hold
ESD capability exceeds the standard 2000V level. The
CA5470 series can operate with single supply voltages from
3V to 16V or ±1.5V to ±8V. They have guaranteed specifications at both 5V and ±7.5V at room temperature as well as
over the full -55oC to 125oC military range.
• Timers
Part Number Information
• Photodiode Amplifiers (IR)
• Microprocessor Buffering
• Ground Reference Single Supply Amplifiers
• Voltage Controlled Oscillators
PART NUMBER
(BRAND)
• Voltage Followers
TEMP.
RANGE ( oC)
PKG.
NO.
PACKAGE
• V to l Converters
CA5470E
-55 to 125
14 Ld PDIP
E14.3
• Peak Detectors
CA5470M
(5470)
-55 to 125
14 Ld SOIC
M14.15
CA5470M96
(5470)
-55 to 125
14 Ld SOIC Tape
and Reel
M14.15
• Precision Rectifiers
• 5V Logic Systems
• 3V Logic Systems
Pinout
CA5470 (PDIP, SOIC)
TOP VIEW
OUTPUT 1 1
14 OUTPUT 4
1
NEG. INPUT 1 2
-
4
13 NEG. INPUT 4
-
+ +
POS. INPUT 1 3
12 POS. INPUT 4
V+ 4
POS. INPUT 2 5
NEG. INPUT 2 6
OUTPUT 2 7
11 V-
-
-
+ +
2
3
10 POS. INPUT 3
9
NEG. INPUT 3
8
OUTPUT 3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
File Number
1946.4
CA5470
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage (Between V+ And V- Terminals) . . . . . . . . . 16V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V)
Input Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA
Output Short Circuit Duration (Note 1) . . . . . . . . . . . . . . . . Indefinite
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
175
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Short circuit may be applied to ground or to either supply.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Typical Values Intended Only for Design Guidance at V+ = 5V, V- = 0V, TA = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
Input Resistance
RI
Input Capacitance
CI
Unity Gain Crossover Frequency
fT
Slew Rate
SR
UNITS
5
TΩ
3.1
pF
14
MHz
5
V/µs
27/25
ns
20
%
1
µs
436
kHz
VOUT = 3.65VP-P
CL = 25pF, RL= 2kΩ
(Voltage Follower)
tr
Overshoot
TYPICAL VALUES
f = 1MHz
Transient Response:
Rise Time/Fall Time
TEST CONDITIONS
OS
Settling Time (To <0.1%, VIN = 4VP-P)
tS
Full Power BW, SR = 5V/µs
CL = 25pF, RL= 2kΩ
(Voltage Follower)
FPBW
AV = 1, VOUT = 3.65VP-P
Electrical Specifications TA = 25oC, V+ = 5V, V- = GND
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
-
6
22
mV
Input Offset Voltage
|VIO|
Input Offset Current
|IIO|
-
0.5
50 (Note 3)
pA
II
-
0.5
50 (Note 3)
pA
VICR
3.5
-0.5 to 3.7
0
V
VICR = 0V to 3.5V
55
70
-
dB
Input Current
Common Mode Input Range
Common Mode Rejection Ratio
CMRR
Power Supply Rejection Ratio
PSRR
∆V = 2V
60
75
-
dB
Positive Output Voltage Swing
VOM+
RL = 2kΩ to GND
4
4.4
-
V
Negative Output Voltage Swing
VOM-
RL = 2kΩ to GND
-
0.06
0.10
V
VOUT = 2.5V, RL = ∞
-
6
7
mA
Total Supply Current
ISUPPLY
Unity Gain Bandwidth Product
fT
10
14
-
MHz
Slew Rate
SR
4
5
-
V/µs
ISOURCE
4
5.5
-
mA
1.0
1.2
-
mA
80
90
-
dB
Output Current
Source to opposite supply
Sink to opposite supply
Open Loop Gain
ISlNK
AOL
0.5V to 3.5V, RL = 10kΩ
NOTE:
3. This is the lowest value that can be tested reliably. Almost all devices will be <10pA.
2
CA5470
Electrical Specifications
PARAMETER
TA = -55oC to 125oC, V+ = 5V, V- = GND
MIN
TYP
MAX
UNITS
Input Offset Voltage
|VIO|
-
6
25
mV
Input Offset Current
|IIO|
-
550
5500
pA
II
-
550
11000
pA
Input Current
SYMBOL
TEST CONDITIONS
3.5
-0.5 to 3.7
0
V
Common Mode Rejection Ratio
CMRR
VICR = 0V to 3.5V
50
65
-
dB
Power Supply Rejection Ratio
PSRR
∆V = 2V
58
75
-
dB
Positive Output Voltage Swing
VOM+
RL = 2kΩ to GND
3.8
4.2
-
V
VOM-
RL = 2kΩ to GND
-
0.08
0.11
V
VOUT = 2.5V
-
9
11
mA
Common Mode Input Range
Negative Output Voltage Swing
Total Supply Current
VICR
ISUPPLY
Unity Gain Bandwidth Product
fT
8
12
-
MHz
Slew Rate
SR
3
5
-
V/µs
ISOURCE
4
5.5
-
mA
ISlNK
0.8
1.2
-
mA
80
90
-
dB
MIN
TYP
MAX
UNITS
Output Current
Source to opposite supply
Sink to opposite supply
Open Loop Gain
Electrical Specifications
PARAMETER
AOL
0.5V to 3.5V, RL = 10kΩ
TA = 25oC, VSUPPLY = ±7.5V
SYMBOL
TEST CONDITIONS
Input Offset Voltage
|VIO|
-
5
25
mV
Input Offset Current
|IIO|
-
0.5
50 (Note 4)
pA
II
-
1
50 (Note 4)
pA
VICR
5.8
-7.8 to 6.0
-7.5
V
Input Current
Common Mode Input Range
Common Mode Rejection Ratio
CMRR
VICR = 0V to 13.3V
60
70
-
dB
Power Supply Rejection Ratio
PSRR
∆V = 1V
60
76
-
dB
Positive Output Voltage Swing
VOM+
RL = 2kΩ to GND
6.3
6.5
-
V
RL = 10kΩ to GND
6.4
6.6
-
V
RL = 2kΩ to GND
-
-2.6
-2
V
RL = 10kΩ to GND
-
-7.3
-7.1
V
VOUT = GND, R L = ∞
-
10
12
mA
Negative Output Voltage Swing
Total Supply Current
VOM-
ISUPPLY
Unity Gain Bandwidth Product
fT
12
16
-
MHz
Slew Rate
SR
4
7
-
V/µs
ISOURCE
6.2
6.8
-
mA
ISlNK
1
1.4
-
mA
80
90
-
dB
Output Current
Source to opposite supply
Sink to opposite supply
Open Loop Gain
AOL
-5V to +5V, RL = 10kΩ
NOTE:
4. This is the lowest value that can be tested reliably. Almost all devices will be <10pA.
3
CA5470
Electrical Specifications
TA = -55oC to 125oC, VSUPPLY = ±7.5V
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input Offset Voltage
|VIO|
-
5
30
mV
Input Offset Current
|IIO|
-
550
5500
pA
II
-
1100
11000
pA
VICR
5.8
-7.8 to 6.0
-7.5
V
Input Current
Common Mode Input Range
Common Mode Rejection Ratio
CMRR
VICR = 0V to 3.5V
58
70
-
dB
Power Supply Rejection Ratio
PSRR
∆V = 1V
60
76
-
dB
Positive Output Voltage Swing
VOM+
RL = 2kΩ to GND
4.75
5.5
-
V
RL = 10kΩ to GND
6.1
6.4
-
V
RL = 2kΩ to GND
-
-2.6
-2
V
RL = 10kΩ to GND
-
-7.3
-7.1
V
VOM-
Negative Output Voltage Swing
VOUT = GND, R L = ∞
-
12
18
mA
Unity Gain Bandwidth Product
fT
10
15
-
MHz
Slew Rate
SR
3
7
-
V/µs
ISOURCE
6.2
6.8
-
mA
ISlNK
1
1.4
-
mA
80
90
-
dB
Total Supply Current
ISUPPLY
Output Current
Source to opposite supply
Sink to opposite supply
Open Loop Gain
-5V to +5V, RL = 10kΩ
AOL
Block Diagram (1/4 of CA5470)
V+
TO BIAS
CIRCUIT
100µA
4 1.8mA/AMP
150µA
320µA
50µA
50µA
1.2mA
+INPUT
AV ≈
6dB
OUTPUT
-INPUT
AV
2kΩ
≈ 30dB
AV ≈ 54dB
2kΩ
11
PMOS DIFFERENTIAL
INPUT STAGE
GROUNDED GATE
LEVEL SHIFTER
COMPOSITE MILLER
GAIN STAGE
4
OUTPUT STAGE
GND OR
- SUPPLY
CA5470
Typical Performance Curve
14
VS = ±7.5V
VOUT (VP-P)
12
10
8
6
4
V+ = 5V, V- = 0V
2
10K
100K
1M
10M
100M
FREQUENCY
FIGURE 1. MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY
Metallization Mask Layout
Dimensions in parentheses are in millimeters and
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).
97.2
(2.46)
The layout represents a chip when it is part of the
wafer. When the wafer is cut into chips, the cleavage
angles are 57o instead of 90o with respect to the face
of the chip. Therefore, the isolated chip is actually 7
mils (0.17mm) larger in both dimensions.
69.7
(1.77)
5