CXA2013M
EIAJ Sound Multiplexing Decoder
Description
The CXA2013M is a bipolar IC designed as EIAJ
TV sound multiplexing decoder, provides various
functions including sound multiplexing demodulation,
broadcast mode identification (stereo/bilingual
discrimination display), volume, tone control and
muting.
30 pin SOP (Plastic)
Features
• Adjustment free of filter
• Audio multiplexing decoder
• Sound processor
— One external input
— Bass control
— Treble control
— Volume control
— Balance control
are all included in a single chip. Almost any sort of
signal processing is possible through this IC.
• Separation adjustment, each mode control and sound
processor control are possible through I2C BUS.
Absolute Maximum Ratings
• Supply voltage
• Operating temperature
• Storage temperature
• Allowable power dissipation
(Ta = 25°C)
VCC
12
V
Topr –20 to +75 °C
Tstg –65 to +150 °C
PD
1000
mW
Operating Supply Voltage Range
8.5 to 9.5
V
Applications
TVs
Structure
Bipolar silicon monolithic IC
18 CH-R
17 CH-L
BASS 13
VOL 14
16 LS OUT-L
19 CL-L
TRE 12
LS OUT-R 15
20 CL-R
BAL 11
21 AUX-R
DGND 10
24 TV OUT-R
7
NC
22 AUX-L
25 TV OUT-L
6
CUBI
9
26 MC IN
5
MPX IN
SCL
27 MC OUT
4
Vcc
23 NC
28 SC IN
3
REFL
8
29 NC
2
GND
SDA
30 SC OUT
1
SUBI
Pin Configuration
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E00Y28A1Y-PS
SUBI
SC OUT
SC IN
MC OUT
MC IN
TV OUT-L
TV OUT-R
AUX-R
AUX-L
CH-L
CL-L
Block Diagram
1
30
28
27
26
25
24
21
22
17
19
SUB
SUBDEEM
MATRIX
SW
MAIN
TONE
VCA
16 LS OUT-L
VCA
15 LS OUT-R
MAINDEEM
–2–
SUB
DET
IIL LOGIC & CONT
FM
DEMOD
CUE
CARRIOR
SUB
BPF
3.5fH
CLOCK
BASS
TRE
952Hz
CLOCK
3.5fH
VCO
TONE
BUFFER
BIAS
CURRENT
BIAS
VOLTAGE
4.5fH
TRAP
CUE
BPF
AM
DEMOD
VOL
BAL
952Hz
BPF
COMP
DAC
IBIAS
BUS DEC
VCA
VOLTAGE
REGULATOR
ATT
3
4
5
6
18
20
11
12
13
14
8
9
10
GND
REFL
Vcc
MPX IN
CUBI
CH-R
CL-R
BAL
TRE
BASS
VOL
SDA
SCL
DGND
MPX SIGNAL
2
CXA2013M
CXA2013M
Pin Description
Pin
No.
Symbol
(Ta = 25°C, VCC = 9V)
Pin
voltage
Equivalent circuit
Description
Vcc
20µ
80µ
Vcc 16k
1
SUBI
64k
Bias capacitor connection of
sub FM detector
4.1V
1k
16k
8k
8k
1
147
4.2V
2
GND
147
1.7V
2
0
Analog block GND
Vcc
147
3
REFL
1.2V
The noise elimination filter
connection of internal
reference voltage
3
3.3k
20k
20k
24k
4
VCC
GND
Power supply
—
Vcc
87.9k
147
5
MPX IN
4.1V
27.6k
5
30k
50k
80µ
Sound multiplexing signal input.
Typical input level = 110mVrms
(monoural 100%)
4.2V
GND
Vcc
6
CUBI
4.1V
1k
147
40k
40k
40k
Vcc
11k
6
2k
Bias capacitor connection of
Cue pulse generator
4.2V
7,
23,
29
NC
—
—
–3–
—
CXA2013M
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
VCC
7.5k
35µ
4k
2.1V
×2
8
SDA
—
7.5k
Serial data I/O pin
VIH > 3.0V
VIL < 1.5V
×5
4.5k
3k
8
VCC
7.5k
35µ
4k
2.1V
9
SCL
—
×4
10.5k
3k
Serial clock I/O pin
VIH > 3.0V
VIL < 1.5V
9
10
DGND
10
—
Digital block GND
DAC output pin. (BAL)
Connect LPF capacitance of DAC.
Internal impedance is
approximately 20kΩ.
VCC
11
BAL
4.2V
40k
20k
5.2V
2k
12
TRE
4.2V
11
12
13
13
BASS
2k
DAC output pin. (BASS)
Connect LPF capacitance of DAC.
Internal impedance is
approximately 20kΩ.
75µ
4.2V
DAC output pin. (TRE)
Connect LPF capacitance of DAC.
Internal impedance is
approximately 20kΩ.
VCC
10k
5k
5.2V
2k
14
14
VOL
5.2V
×4
×4
300µ
–4–
DAC output pin. (VOL)
Connect LPF capacitance of DAC.
Internal impedance is
approximately 5kΩ.
CXA2013M
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
VCC
3k
15
LS OUT-R
LSOUT right channel output
pin
4.2V
10p
147
500
15
16
LS OUT-L
84k
500
16
LSOUT left channel output
pin
4.2V
Vcc
17
CH-L
250µ
4.2V
Treble filter pin
(Left channel)
250µ
6k
5.7k
5.7k
17
18
18
CH-R
147
Treble filter pin
(Right channel)
4.2V
Vcc
19
CL-L
Bass filter pin
(Left channel)
250µ
250µ
4.2V
5.4k
10.7k
12.3k
19
20
20
CL-R
147
4.2V
4.2V
Bass filter pin
(Right channel)
Vcc
21
AUX-R
10µ
4.2V
Right channel external input
pin
36k
21
22
22
AUX-L
4.2V
147
12k
Left channel external input
pin
4.2V
–5–
CXA2013M
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
VCC
3k
24
TV OUT-R
TVOUT right channel output
pin
4.2V
147
580
24
25
TV OUT-L
14.3k
580
25
TVOUT left channel output
pin
35.7k
4.2V
4.2V
Vcc Vcc
Vcc
8k
147
26
MC IN
8k
4.1V
27
DC cut capacitor connection
of main signal
147
26
16k
160µ
27
MC OUT
3.4V
4.2V
80µ
GND
Vcc
Vcc
8k
28
SC IN
4.1V
8k
147
30
Vcc
8k
40k
DC cut capacitor connection
of sub signal
320µ
147
28
30
SC OUT
3.9V
16k
4.2V
4.2V
80µ
GND
–6–
Electrical Characteristics
(Ta = 25°C, VCC = 9V)
No.
Item
Symbol
Mode
Input
pin
Input signal
Measurement
conditions
Filter
Output
pin
Min.
Typ.
Max.
Unit
–7–
1
Current consumption Icc
—
No input
4
30
43
60
mA
2
MPX input level
Vin
5
MONO 1kHz, 100% mod.
5
—
110
—
mVrms
3
MPX input level
range
Vrange
—
—
—
–3
—
3
dB
4
MONO output level
Vmain
MONO
5
MONO 1kHz 100% mod.
Sub: Career OFF, Cue: OFF
24/25
400
500
5
MONO frequency
response
Fcmain
MONO
5
MONO 10kHz 100% mod.
20 log ('10k'/'1k')
Sub: Career OFF, Cue: OFF
24/25 –15.4 –13.4 –11.4
6
MONO distortion
THDm
MONO
5
MONO 1kHz 100% mod.
Sub: Career OFF, Cue: OFF
15kLPF 24/25
—
0.2
1.0
%
7
MONO distortion at
maximum input
THDmmax MONO
5
MONO 1kHz 300% mod.
Sub: Career OFF, Cue: OFF
15kLPF 24/25
—
0.3
2.0
%
8
MONO S/N
SNmain
MONO
5
MONO 1kHz 100% mod.
Sub: Career OFF, Cue: OFF
15kLPF 24/25
65
73
—
dB
9
Sub output level
Vsub
BIL
5
SUB 1kHz 100% mod.
Main 0% mod., Cue: BIL
15kLPF 24/25
400
500
10
Sub frequency
response
Fcsub
BIL
5
SUB 10kHz 100% mod.
Main 0% mod., Cue: BIL
11
Sub distortion
THDsub
BIL
5
SUB 1kHz 100% mod.
Main 0% mod., Cue: BIL
12
Sub S/N
SNsub
BIL
5
SUB 1kHz 100% mod.
Main 0% mod., Cue: BIL
13
ST output level L-ch
Vstl
ST
5
14
ST output level R-ch
Vstr
ST
5
20 log ('100%'/'0%')
600 mVrms
dB
600 mVrms
dB
15kLPF 24/25
—
1.0
2.0
%
15kLPF 24/25
59
64
—
dB
ST-L 1kHz 100% mod.
Cue: Stereo
15kLPF
25
400
500
600 mVrms
ST-R 1kHz 100% mod.
Cue: Stereo
15kLPF
24
400
500
600 mVrms
20 log ('100%'/'0%')
CXA2013M
15kLPF 24/25 –18.4 –15.9 –13.4
20 log ('10k'/'1k')
No.
Item
Symbol
Mode
Input
pin
Input signal
Measurement
conditions
Filter
Output
Min.
pin
Typ.
Max.
Unit
–8–
ST distortion L-ch
THDstl
ST
5
ST-L 1kHz 100% mod.
Cue: Stereo
15kLPF
25
—
0.2
1.5
%
16
ST distortion R-ch
THDstr
ST
5
ST-R 1kHz 100% mod.
Cue: Stereo
15kLPF
24
—
0.2
1.5
%
17
ST separation
L→R
STLsep
ST
5
ST-L 1kHz 100% mod.
Cue: Stereo
20 log ('Lch'/'Rch')
15kLPF 24/25
35
45
—
dB
18
ST separation
R→L
STRsep
ST
5
ST-R 1kHz 100% mod.
Cue: Stereo
20 log ('Rch'/'Lch')
15kLPF 24/25
35
45
—
dB
19
Cross talk
Main → Sub
CTms
BIL
5
Main 1kHz 100% mod.
Sub: 0% mod., Cue: BIL
20 log (S0 = '0'/S0 = '1') 1kBPF 24/25
55
58
—
dB
20
Cross talk
Sub → Main
CTsm
BIL
5
SUB 1kHz 100% mod.
Main 0% mod., Cue: BIL
20 log (S0 = '1'/S0 = '0') 1kBPF 24/25
60
70
—
dB
21
Cross talk
CTmsb
Main → Sub BOTH mode
BIL
5
Main 1kHz 100% mod.
Sub: 0% mod., Cue: BIL
20 log ('Lch'/'Rch')
S1 = '1'
1kBPF 24/25
55
58
—
dB
22
Cross talk
CTsmb
Sub → Main BOTH mode
BIL
5
SUB 1kHz 100% mod.
Main 0% mod., Cue: BIL
20 log ('Rch'/'Lch')
S1 = '1'
1kBPF 24/25
60
70
—
dB
23
Sub residual carrier
BIL
5
Main 0% mod.
Sub: 0% mod., Cue: BIL
24
—
10
30
mVrms
24
Main residual carrier CLmain
BIL
5
Main 0% mod.
Sub: 0% mod., Cue: BIL
25
—
12
20
mVrms
25
TVOUT mute
attenuation
Mutv
MONO
5
MONO 1kHz 100% mod.
Sub: Career OFF, Cue: OFF
20 log (MUTE TV = '0'/
MUTE TV = '1')
—
–80
–70
dB
26
DC offset stereo
L-ch
OSstl
ST
5
ST 0% mod.
Cue: Stereo
MUTE TV = '1'
– MUTE TV = '0'
25
–100
0
100
mV
27
DC offset stereo
R-ch
OSstr
ST
5
ST 0% mod.
Cue: Stereo
MUTE TV = '1'
– MUTE TV = '0'
24
–100
0
100
mV
28
Cue detection
sensitivity
THcue
BIL
5
Change Cue level
20 log ('100%mod.'/
'BIL-on level')
BUS
RETURN
9
14
17
dB
29
SUB detection
sensitivity
THsub
BIL
5
Change SUB career level
20 log ('100%mod.'/
'BIL-on level')
BUS
RETURN
10
13
18
dB
30
Cue BPF gain
BPcue
—
5
Sine wave
55.069kHz, 8.8mVrms
TEST = '1'
25
330
480
620 mVrms
CLsub
1kBPF 24/25
CXA2013M
15
No.
Item
Symbol
Mode
Input
pin
—
5
Input signal
Measurement
conditions
Output
Filter pin
Min.
Typ.
Max.
Unit
1
20
38
—
dB
15/16
400
500
–9–
Sine wave
66mVrms
20 log ('31.47kHz'/
'70.8kHz')
21/22
Sine wave
1kHz 500mVrms
EXT = '1'
INT
21/22
Sine wave
1kHz 500mVrms
20 log
(EXT = '1'/EXT = '0')
1kBPF 15/16
62
—
—
dB
CTls2
EXT
5
Main 1kHz 100% mod.
Sub: 0% mod. , Cue: BIL
20 log
(EXT = '0'/EXT = '1')
1kBPF 15/16
70
—
—
dB
LSOUT mute
attenuation
MUls
EXT
21/22
Sine wave
1kHz 500mVrms
EXT = '1'
MUTE LS = '0'
1kBPF 15/16
—
—
–70
dB
36
LSOUT DC offset
OSls
EXT
21/22 No input
15/16
–50
0
50
mV
37
LSOUT S/N
SNls
EXT
21/22
Sine wave
1kHz 500mVrms
EXT = '1'
15kLPF 15/16
65
75
—
dB
38
LSOUT distortion
THDls
EXT
21/22
Sine wave
1kHz 500mVrms
EXT = '1'
15kLPF 15/16
—
0.1
0.5
%
39
BASS maximum
boost
TBmax
EXT
21/22
Sine wave
100Hz 500mVrms
EXT = '1'
BASS = '1F'
15/16
8.5
11.0
13.5
dB
40
BASS maximum
attenuation
TBmin
EXT
21/22
Sine wave
100Hz 500mVrms
EXT = '1'
BASS = '0'
15/16 –13.5 –11.0 –8.5
dB
41
TREBLE maximum
boost
TTmax
EXT
21/22
Sine wave
10kHz 500mVrms
EXT = '1'
TREBLE = '1F'
15/16
13.5
dB
42
TREBLE maximum
attenuation
TTmin
EXT
21/22
Sine wave
10kHz 500mVrms
EXT = '1'
TREBLE = '0 '
15/16 –13.5 –11.0 –8.5
dB
43
Volume maximum
attenuation
VOLmin
EXT
21/22
Sine wave
1kHz 500mVrms
EXT = '1'
VOL = '0'
1kBPF 15/16
—
–90
–70
dB
44
Volume
minimum noise
VOLminn
EXT
21/22 No input
EXT = '1',
20 log (VOL = '0'/
'500mVrms')
15kLPF 15/16
—
–90
–80
dB
31
4.5fH
TR45
trap attenuation level
32
LSOUT output level
Vls
EXT
33
LSOUT cross talk
EXT → INT
CTls1
34
LSOUT cross talk
INT → EXT
35
EXT = '1'
MUTE LS = '1'
– MUTE LS = '0'
8.5
11.0
630 mVrms
CXA2013M
Electrical Characteristics Measurement Circuit
V2
V1
C16
1µ
R4
10k
SW21
SW22
C17
1µ
C15
4.7µ
VOL
LS OUT-R
6
7
8
9
10
11
12
13
14
15
CH-R
LS OUT-L
BASS
5
CH-L
TRE
4
CL-L
BAL
3
CL-R
DGND
2
AUX-R
AUX-L
1
MC IN
SCL
16
NC
17
SDA
18
TV OUT-R
19
NC
20
TV OUT-L
21
CUBI
22
MPX IN
MC OUT
23
Vcc
24
SC IN
25
REFL
26
NC
27
GND
28
SC OUT
29
X1
SUBI
30
C12
0.01µ C11
C10
4700p 4700p
C13
0.01µ
C14
4.7µ
– 10 –
X1
C2 A
1µ
Vcc
9V
C4
1µ
C3
47µ
C5
1µ
R1
220
C6
0.1µ
R2
220
SW20
C1
1µ
C7
0.1µ
C8
0.1µ
C9
0.1µ
SW
R3
10k
FILTER
1kHz BPF
15kHz LPF
30kHz LPF
SW
I2C BUS DATA
SIGNAL
GENERATOR
MEASURES
(AC VOLTMETER)
CXA2013M
DGND
CXA2013M
Adjustment method
Separation adjustment
EIAJ sound multiplexing encoder
Application circuit
Oscilloscope
AC Voltmeter
R L
MPX IN
CH1 CH2
TV OUT-L TV OUT-R
15kHz LPF
Switch
Fig. 1
Procedure
1) Connect components as shown in Fig.1. (TEST = 0)
2) Set the encoder to MONO mode, and input 110mVrms (1kHz 100% modulation) to MPX IN (Pin 5).
3) Set the encoder to stereo mode, and input only left channel signal (1kHz 100% modulation) to MPX IN
(Pin 5).
4) Monitor the oscilloscope and AC voltmeter and adjust ATT so that the R-ch is at a minimum.
(Separation standard: more than 35dB)
– 11 –
CXA2013M
Register Specification
Slave address
SLAVE RECEIVER
SLAVE TRANSMITTER
84H
85H
Register table
SUB ADDRESS
MSB
LSB
DATA
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
∗∗∗∗0000
TEST
∗∗∗∗0001
∗
∗
EXT
∗∗∗∗0010
∗
∗
∗
BASS (5)
∗∗∗∗0011
∗
∗
∗
TREBLE (5)
BIT0
ATT (7)
FOMO
∗∗∗∗0100
S1
S0
MUTE TV MUTE LS
VOL (8)
∗
∗
∗∗∗∗0101
BAL (6)
∗: Don't care
Status resigter
STA1
STA2
STA3
STA4
STA5
STA6
STA7
STA8
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
PON
ST
BIL
—
—
—
—
—
Note) When the IC is powered on, the registers "MUTE TV", "MUTE LS" and "VOL" are set to "0".
– 12 –
CXA2013M
Description of registers
Control registers
Register Number Classi- ∗ Standard
fication setting
of bits
Contents
TEST
1
T
0
DAC test mode for VCA, checking Cue BPF mode.
ATT
7
A
34
Adjustment of stereo separation
EXT
1
U
0
Selection of TV mode or external input mode for LSOUT output 1: External
FOMO
1
U
0
Selection of forced MONO mode ON/OFF
S1
1
U
0
Selection of TV OUT, LS OUT output signal
S0
1
U
0
Selection of TV OUT, LS OUT output signal
MUTE TV
1
U
1
Selection of TV OUT mute ON/OFF
0: Mute ON, 1: Mute OFF
MUTE LS
1
U
1
Selection of LS OUT mute ON/OFF
0: Mute ON, 1: Mute OFF
BASS
5
U
10
LS OUT output bass control
TREBLE
5
U
10
LS OUT output treble control
VOL
8
U
FF
LS OUT output signal level control
BAL
6
U
20
LS OUT-L, R output signal level (balance) control
1: Forced MONO
∗ Classification U: User control
A: Adjustment
T: Test (when IC manufactured)
Status Registers
Register
Number of bits
Contens
PON
1
POWER ON RESET detection
1: RESET
ST
1
Stereo detection of the MPXIN input signal
1: Stereo
BIL
1
Bilingual detection of the MPXIN input signal
1: Bilingual
– 13 –
1: TEST
CXA2013M
Description of Control Registers
TEST (1) :
DAC test mode for VCA and checking Cue BPF mode.
Use only for the electrical characteristics inspection process of IC.
0 = Normal mode
1 = Test mode, the Cue signal component through Cue BPF to TV OUT-L.
Output DAC voltage for VCA to TV OUT-R.
ATT (7) :
Perform the separation adjustment by varying the signal level input to MPX IN (Pin 5).
Variable range of the input signal: Normal input level ±3.0dB
0 = Level Min.
34 = Center
7F = Level Max.
EXT (1) :
Select TV mode or external input mode for LS OUT output
0 = TV mode
1 = External input mode
FOMO (1) :
Select ON/OFF forced MONO mode
0 = Forced MONO OFF
1 = Forced MONO ON
S1 (1) :
Select output signal for TV OUT, LS OUT
S0 (1) :
Select output signal for TV OUT, LS OUT
MUTE TV (1) :
Mute TV OUT output
0 = Mute ON
1 = Mute OFF
MUTE LS (1) :
Mute LS OUT output
0 = Mute ON
1 = Mute OFF
BASS (5) :
LS OUT output bass control
0 = Bass Min.
10 = Bass Center (0dB)
1F = Bass Max.
TREBLE (5) :
LS OUT output treble contorl
0 = Treble Min.
10 = Treble Center (0dB)
1F = Treble Max.
VOL (8) :
LS OUT output signal level control
0 = Volume Min. (–90dB Typ.)
FF = Volume Max. (0dB)
BAL (6) :
LS OUT-L, R output signal level (balance) control
0 = Lch Min., Rch Max.
20 = Center (Lch 0dB, Rch 0dB)
3F = Lch Max., Rch Min.
– 14 –
CXA2013M
Description of Mode Control
TV OUT output mode control table (TEST = 0 normal mode)
Input signal
MONO
Stereo
Bilingual
Mode detection
ST
BIL
0
0
1
0
Mode control
TV OUT output
FOMO
S1
S0
MUTE TV
L
R
∗
∗
∗
0
MUTE
MUTE
∗
∗
∗
1
MAIN
MAIN
∗
∗
∗
0
MUTE
MUTE
1
∗
∗
1
L+R
L+R
0
0
0
1
L
R
0
0
1
1
L
R
0
1
0
1
L
R
∗
∗
∗
0
MUTE
MUTE
∗
0
0
1
MAIN
MAIN
∗
0
1
1
SUB
SUB
∗
1
0
1
MAIN
SUB
0
1
∗: Don't care
LS OUT output mode control table (TEST = 0 normal mode, EXT = 0 TV mode)
Input signal
MONO
Stereo
Bilingual
Mode detection
ST
BIL
0
0
1
0
Mode control
LS OUT output
FOMO
S1
S0
MUTE LS
L
R
∗
∗
∗
0
MUTE
MUTE
∗
∗
∗
1
MAIN
MAIN
∗
∗
∗
0
MUTE
MUTE
1
∗
∗
1
L+R
L+R
0
0
0
1
L
R
0
0
1
1
L
R
0
1
0
1
L
R
∗
∗
∗
0
MUTE
MUTE
∗
0
0
1
MAIN
MAIN
∗
0
1
1
SUB
SUB
∗
1
0
1
MAIN
SUB
0
1
∗: Don't care
TV OUT/LS OUT output mode control table (TEST = 0 normal mode)
EXT
TV OUT
LS OUT
L
R
L
R
TV mode
0
TV mode
Lch
TV mode
Rch
TV mode
Lch
TV mode
Rch
External mode
1
TV mode
Lch
TV mode
Rch
EXT
Lch
EXT
Rch
– 15 –
CXA2013M
Description of Operation
The sound mutiplexing signal input from Pin 5 is passed through IN AMP and is applied to the Cue BPF, Sub
BPF, and Main de-emphasis circuit.
1. Discrimination circuits
Cue BPF passes only the Cue signal component from the multiplex signal. In the AM demodulator, the
signal (AM wave) is AM detected and one of two sine waves is generated, either a 922.5Hz signal for
bilingual broadcasts or a 982.5Hz signal for stereo broadcasts.
In the 952Hz BPF, the 3.5fH carrier component is eliminated from the Cue signal after AM wave detection.
The Cue signal, from which the carrier component has been eliminated, is waveform shaped by COMP, with
the resulting 922.5Hz or 982.5Hz pulse being applied to the Logic section.
In the 3.5fH VCO, a 3.5fH pulse locked onto the Cue signal carrier (3.5fH) is created and sent to the Logic
section.
In the Logic section, the broadcast mode is identified using the countdown method. Depending on this
result as well as the presence of a SUB signal from SUB detector and the MUTE ON/OFF, MODE
switching, and FOMO ON/OFF instructions from CONT, the output switching control signal is created. This
signal is used to control the output condition of OUTPUT SW and MAIN OUT.
2. Main circuits
In MAIN DEEM, de-emphasis is applied to the Main signal component and the Sub and Cue components
are removed.
After passing through the MAIN DEEM, the Main signal is applied to MATRIX, OUTPUT AMP, and
MAINOUT.
3. Sub circuits
In SUB BPF, only the SUB signal component out of multiplex signals is passed through. In the 4.5fH trap,
the digital facsimile signal component is removed.
In FM Demod, the SUB signal is FM demodulated.
In SUB DEEM, the FM demodulated Sub signal is de-emphasized and the carrier component is removed.
After passing through SUB DEEM, the Sub signal is applied to MATRIX and OUTPUT AMP.
4. MATRIX and output circuits
In MATRIX, the L and R signals are created by adding and subtracting the Main signal from MAIN DEEM
and the Sub signal from SUB DEEM in stereo broadcast.
In OUTPUT AMP and OUTPUT SW, the output signal is switched under the control of Logic.
In addition, MAIN OUT always outputs the MAIN signal component, regardless of the broadcast mode.
5. TONE circuit
Control BASS and TREBLE. Bass and TREBLE characteristics are decided by each CL and CH external
capacitance.
6. BALANCE, VOLUME curcuit
Control BALANCE and VOLUME. BALANCE has 64steps and VOLUME has 256 steps.
7. DAC
DAC is the circuit that control BASS, TREBLE, VOLUME and BALANCE.
Internal impedance is approximately 20kΩ (approximately 5kΩ for VOLUME).
Connect the external capacitance for LPF to each pins.
– 16 –
Application Circuit
TVOUT output
C21
1µ
External input
C20
1µ
C11
10µ
C19
10µ
C15
0.1µ
C16
10µ
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
MC OUT
MC IN
TV OUT-L
TV OUT-R
NC
AUX-L
AUX-R
CL-R
CL-L
CH-R
CH-L
LS OUT-L
C13
C12
4700p 4700p
SC IN
C14
0.1µ
NC
C17
10µ
SC OUT
C18
10µ
– 17 –
SUBI
GND
REFL
Vcc
MPX IN
CUBI
NC
SDA
SCL
DGND
BAL
TRE
BASS
VOL
LS OUT-R
LSOUT
output
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
C1
10µ
C2
10µ
Vcc
9V
C4
10µ
C3
100µ
Composite
baseband
signal input
C5
10µ
R1
220
µ-com
R2
220
C6
4.7µ
C7
4.7µ
C8
4.7µ
C9
4.7µ
C10
10µ
DGND
CXA2013M
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
CXA2013M
I2C Bus Block Items (SDA, SCL)
No.
Item
Symbol
Min.
Typ.
Max.
Unit
1
High level input voltage
VIH
3.0
—
5.0
2
Low level input voltage
VIL
0
—
1.5
3
High level input current
IIH
—
—
10
4
Low level input current
IIL
—
—
10
5
Low level output voltage SDA (Pin 8) during 3mA inflow
VOL
0
—
0.4
V
6
Maximum inflow current
IOL
3
—
—
mA
7
Input capacitance
CI
—
—
10
pF
8
Maximum clock frequency
fSCL
0
—
100
kHz
9
Minimum waiting time for data change
tBUF
4.7
—
—
10
Minimum waiting time for start of data transfer
tHD:STA
4.0
—
—
11
Low level clock pulse width
tLOW
4.7
—
—
12
High level clock pulse width
tHIGH
4.0
—
—
13
Minimum waiting time for start preparation
tSU:STA
4.7
—
—
14
Minimum data hold time
tHD:DAT
0
—
—
15
Minimum data preparation time
tSU:DAT
250
—
—
ns
16
Rise time
tR
—
—
1
µs
17
Fall time
tF
—
—
300
ns
18
Minimum waiting time for stop preparation
tSU:STO
4.7
—
—
µs
V
µA
µs
I2C bus load conditions: Pull-up resistor 4kΩ (Connect to +5V)
Load capacitor 200pF (Connect to GND)
I2C Bus Control Signal
SDA
tBUF
tR
tHD:STA
tF
SCL
P
S
tHD:STA
tLOW
tHD:DAT
tHIGH
– 18 –
tSU:DAT
Sr
tSU:STA
tSU:STO
P
CXA2013M
I2C Bus Signal
There are I2C signals, SDA (Serial DATA) and SCL (Serial CLOCK) signals. SDA is a bidirectional signal.
• Accordingly there are 3 values outputs, H, L, and Hi-Z.
H
L
Hi-Z
L
• I2C transfer begins with Start Condition and ends with STOP condition.
Start Condition S
Stop Condition P
SDA
SCL
– 19 –
CXA2013M
• I2C data write (Write from I2C controller to the IC)
L during Write
MSB
MSB
LSB
Hi-Z
Hi-Z
SDA
1
SCL
2
S
3
4
5
6
7
8
9
ACK
Address
MSB
1
8
9
Sub Address
ACK
LSB
Hi-Z
1
8
Hi-Z
9
DATA (n)
1
ACK
8
DATA (n + 1)
ACK
Hi-Z
8
9
9
DATA (n + 2)
Hi-Z
1
8
∗ Data can be transferred in 8-bit units to be
set as required.
Sub address is incremented automatically.
9
P
DATA
ACK
DATA
ACK
• I2C data read (Read from the IC to I2C controller)
H during Read
Hi-Z
SDA
1
SCL
6
7
8
9
1
8
7
9
S
P
ACK
Address
DATA
ACK
• Read timing
MSB
LSB
IC output SDA
SCL
Read timing
9
1
2
ACK
3
4
DATA
∗ Data Read is performed during SCL rise.
– 20 –
5
6
7
8
9
ACK
CXA2013M
Example of Representative Characteristics
SUB BPF frequency characteristics
Output level [dB]
Output level [dB]
De-emphasis characteristics
0
0
–20
–5
–10
–40
Main
–15
–60
Sub
100
1k
10
10k
20
30
Frequency [Hz]
40
50
60
70
80
90 100
Frequency [kHz]
MAIN distortion characteristics
Cue BPF frequency characteristics
2
Distortion [%]
Attenuation level [dB]
3
0
–20
1
–40
–60
3.5fH
–40k
3.5fH
–20k
3.5fH
3.5fH
+20k
100
3.5fH
+40k
200
300
400
500
MAIN modulation factor [%]
Frequency [Hz]
BALANCE CONTROL characteristics
0
0
–10
–10
LS OUT-L, R [dB]
LS OUT-L, R [dB]
VOL CONTROL characteristics
–20
–30
–40
–50
OUT L
OUT R
–20
–30
–40
–50
–60
–60
–70
–70
–80
–80
40
80
C0
BUS data [VOL]
0
FF
10
20
30
BUS data [BALANCE]
– 21 –
3F
CXA2013M
TONE characteristics
LS OUT -L, R [dB]
20
BASS-TREBLE MAX.
10
0
BASS-TREBLE MIN.
–10
–20
100
1k
Frequency [Hz]
– 22 –
10k
CXA2013M
Package Outline
Unit: mm
30PIN SOP (PLASTIC)
+ 0.4
2.3 – 0.15
+ 0.4
18.8 – 0.1
0.1
30
+ 0.2
0.1 – 0.05
(9.3)
A
0.5 ± 0.2
10.3 ± 0.4
+ 0.3
7.6 – 0.1
16
15
1
1.27
0.45 ± 0.1
0.2
M
+ 0.1
0.2 – 0.05
0˚ to 10˚
DETAIL A
PACKAGE STRUCTURE
SONY CODE
EIAJ CODE
PACKAGE MATERIAL
EPOXY RESIN
SOP-30P-L03
LEAD TREATMENT
SOLDER PLATING
SOP030-P-0375
LEAD MATERIAL
COPPER ALLOY
PACKAGE MASS
0.7g
JEDEC CODE
LEAD PLATING SPECIFICATIONS
ITEM
SPEC.
LEAD MATERIAL
COPPER ALLOY
SOLDER COMPOSITION
Sn-Bi Bi:1-4wt%
PLATING THICKNESS
5-18µm
– 23 –
Sony Corporation