DG9461 Vishay Siliconix Low-Voltage Single SPDT Analog Switch Low Voltage Operation (+2.7 to +5 V) Low On-Resistance - rDS(on): 40 Fast Switching - tON : 35 ns, tOFF: 20 ns Low Leakage - ICOM(on): 200-pA max Low Charge Injection - QINJ: 1 pC Low Power Consumption TTL/CMOS Compatible ESD Protection > 2000 V (Method 3015.7) Available in TSOP-6 and SOIC-8 Reduced Power Consumption Simple Logic Interface High Accuracy Reduce Board Space (TSOP-6) Battery Operated Systems Portable Test Equipment Sample and Hold Circuits Cellular Phones Communication Systems Military Radio PBX, PABX Guidance and Control Systems The DG9461 is a single-pole/double-throw monolithic CMOS analog device designed for high performance switching of analog signals. Combining low power, high speed (tON: 35 ns, tOFF: 20 ns), low on-resistance (rDS(on): 40 ) and small physical size (TSOP-6), the DG9461 is ideal for portable and battery powered applications requiring high performance and efficient use of board space. The DG9461 is built on Vishay Siliconix’s low voltage BCD-15 process. Minimum ESD protection, per Method 3015.7, is 2000 V. An epitaxial layer prevents latchup. Break-before -make is guaranteed for DG9461. Each switch conducts equally well in both directions when on, and blocks up to the power supply level when off. TSOP-6 IN 1 6 NO V+ 2 5 COM GND 3 4 NC Top View Logic NC NO 0 ON OFF 1 OFF ON Logic “0” 0.8 V Logic “1” 2.4 V SOIC-8 NO 1 8 V+ COM 2 7 IN NC 3 6 * GND 4 5 * Temp Range Package Part Number TSOP-6 DG9461DV SOIC-8 DG9461DY -40 to 85°C Top View *Not Connected Document Number: 70832 S-63597—Rev. B, 26-Jul-99 www.vishay.com FaxBack 408-970-5600 4-1 DG9461 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Reference to GND V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +13 V IN, COM, NC, NOa . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (V+ + 0.3 V) Continuous Current (Any terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Peak Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA (Pulsed at 1ms, 10% duty cycle) ESD (Method 3015.7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > 2000 V Storage Temperature (D Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 125°C Power Dissipation (Packages)b 8-Pin Narrow Body SOICc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 mW Notes: a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 6.5 mW/_C above 75_C SPECIFICATIONS (V+ = 3 V) Test Conditions Otherwise Unless Specified Parameter P Symbol S b l V+ = 3 V, 10%, VIN = 0.8 or 2.4 Ve D Suffix –40 to 85_C a Temp T Minc Full 0 Typb Maxc Unit 3 V Analog Switch Analog Signal Ranged VANALOG rDS(on) VNO or VNC = 1.5 V, V+ = 2.7 V ICOM = 5 mA Room Full 50 80 140 rDS(on) Matchd DrDS(on) VNO or VNC = 1.5 V Room 0.4 2 rDS(on) Flatnessf rDS(on) Flatness VNO or VNC = 1 and 2 V Room 4 8 NO or NC Off Leakage Current g INO/NC(off) VNO or VNC = 1 V / 2 V, VCOM = 2 V / 1 V Room Full -100 –5000 5 100 5000 COM Off Leakage Current g ICOM(off) VCOM = 1 V / 2 V, VNO or VNC = 2 V / 1 V Room Full -100 –5000 5 100 5000 Channel-On Leakage Current g ICOM(on) VCOM = VNO or VNC = 1 V / 2 V Room Full -200 –10000 10 200 10000 Drain-Source On-Resistance W pA A Digital Control Input Current mA IINL or IINH Full 1 Turn-On Time tON Room Full 50 120 200 Turn-Off Time tOFF Room Full 20 50 120 ns 5 pC Dynamic Characteristics Break-Before-Make Time VNO or VNC = 1 1.5 5V td Room 3 20 QINJ CL = 1 nF, Vgen = 0 V, Rgen = 0 W Room 1 Off-Isolation OIRR RL = 50 W, CL = 5 pF, f = 1 MHz Room –74 Source-Off Capacitance CS(off) Room 7 Channel-On Capacitance CD(on) Room 32 Charge Injection dB f = 1 MHz pF Power Supply Power Supply Range V+ Power Supply Current I+ 2.7 V+ = 3.3 V, VIN = 0 or 3.3 V 12 V 1 mA Notes: a. b. c. d. e. f. g. Room = 25°C, Full = as determined by the operating suffix. Typical values are for design aid only, not guaranteed nor subject to production testing. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. Guarantee by design, nor subjected to production test. VIN = input voltage to perform proper function. Difference of min and max values. Guraranteed by 5-V leakage testing, not production tested.. www.vishay.com S FaxBack 408-970-5600 4-2 Document Number: 70832 S-63597—Rev. B, 26-Jul-99 DG9461 Vishay Siliconix Test Conditions Otherwise Unless Specified D Suffix –40 to 85_C Typb Maxc Unit 5 V Room Full 30 60 75 VNO or VNC = 1.5 V Room 0.4 2 VNO or VNC = 1, 2, and 3 V Room 2 6 INO/NC(off) VNO or VNC = 1 V / 4 V, VCOM = 4 V / 1 V Room Full -100 –5000 10 100 5000 COM Off Leakage Current ICOM(off) VCOM = 1 V / 4 V, VNO or VNC = 4 V / 1 V Room Full -100 –5000 10 100 5000 Channel-On Leakage Current ICOM(on) VCOM = VNO or VNC = 1 V / 4 V Room Full -200 –10000 P Parameter V+ = 5 V, 10%, VIN = 0.8 or 2.4 Ve Tempa T Minc Full 0 rDS(on) VNO or VNC = 3.5 V, V+ = 4.5 V ICOM = 5 mA DrDS(on) rDS(on) Flatness S b l Symbol Analog Switch Analog Signal Ranged Drain-Source On-Resistance rDS(on) Matchd rDS(on) Flatnessf NO or NC Off Leakage Current VANALOG W pA A 200 10000 Digital Control Input Current mA IINL or IINH Full 1 Turn-On Time tON Room Full 35 75 150 Turn-Off Time tOFF Room Full 20 50 100 ns 5 pC Dynamic Characteristics Break-Before-Make Time VNO or VNC = 3 3.0 0V td Room 3 10 Charge Injection QINJ CL = 1 nF, Vgen = 0 V, Rgen = 0 W Room 2 Off-Isolation OIRR RL = 50 W, CL = 5 pF, f = 1 MHz Room –74 Room –7 Room 32 NC and NO Capacitance C(off) Channel-On Capacitance CD(on) dB f = 1 MHz pF Power Supply Power Supply Range V+ Power Supply Current I+ 2.7 V+ = 5.5 V, VIN = 0 or 5.5 V 12 V 1 mA Notes: a. b. c. d. e. f. Room = 25°C, Full = as determined by the operating suffix. Typical values are for design aid only, not guaranteed nor subject to production testing. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. Guarantee by design, nor subjected to production test. VIN = input voltage to perform proper function. Difference of min and max values. Document Number: 70832 S-63597—Rev. B, 26-Jul-99 www.vishay.com S FaxBack 408-970-5600 4-3 DG9461 Vishay Siliconix _ Charge Injection Supply Current vs. VIN 3000 2.0 V+ = 3 V 1.5 2500 1.0 I SUPPLY ( m A) 2000 Q INJ (pC) 0.5 0.0 –0.5 1500 V+ = 5 V 1000 500 –1.0 –1.5 0 –2 –500 V+ = 3 V 0 0.5 1.0 1.5 2.0 2.5 0 3.0 1 2 VCOM Leakage Current vs. Temperature 5 Off-Isolation vs. Frequency –40 1 nA –60 OFF-Isolation (dB) I COM(off) (A) 4 VIN 10 nA 100 pA ICOM(off) 10 pA 3 ICOM(on) 1 pA –80 –100 –120 0.1 pA –140 25 45 65 85 105 125 0.001 M 0.01 M Temperature (_C) 1M 10 M Frequency (Hz) Off-Leakage vs. Voltage @ 25_C rDS vs. VCOM 80 2.5 2.0 0.1 M V+ = 5 V 1.5 V+ = 3 V 60 ICOM 0.5 r DS(on) ( W ) I OFF (pA) 1.0 0.0 –0.5 INO/NC 40 V+ = 5 V –1.0 20 –1.5 –2.0 –2.5 0 0 1 2 3 VCOM www.vishay.com S FaxBack 408-970-5600 4-4 4 5 0 1 2 3 4 5 VCOM Document Number: 70832 S-63597—Rev. B, 26-Jul-99 DG9461 Vishay Siliconix _ rDS vs. VCOM Switching Time vs. Temperature 80 70 V+ = 3 V 60 85_C tON 50 t ON / t OFF (nsec) r DS(on) ( ) 60 25_C 40_C 40 20 40 30 tOFF 20 10 0 0 0.5 1.0 1.5 2.0 2.5 0 –60 3.0 –30 0 VCOM 30 60 90 120 Temperature (_C) tON/tOFF vs. Power Supply Voltage Input Switching Point vs. Power Supply Voltage 120 2.25 100 2.00 1.75 V IN (sw) T (nsec) 80 60 1.50 1.25 tON 40 1.00 tOFF 20 0 1.5 0.75 0.5 2.0 2.5 3.0 3.5 V+ Document Number: 70832 S-63597—Rev. B, 26-Jul-99 4.0 4.5 5.0 2 3 4 5 6 V+ www.vishay.com S FaxBack 408-970-5600 4-5 DG9461 Vishay Siliconix V+ +3V Logic Input V+ NO or NC Switch Input tr t 20 ns tf t 20 ns 50% 0V Switch Output COM VOUT 0.9 x VOUT Switch Output IN Logic Input RL 300 W GND CL 35 pF 0V tOFF tON 0V Logic “1” = Switch On Logic input waveforms inverted for switches that have the opposite logic sense. CL (includes fixture and stray capacitance) VOUT + VCOM ǒ RL Ǔ R L ) R ON FIGURE 1. Switching Time V+ Logic Input V+ tr <5 ns tf <5 ns 0V COM NO VNO 3V VO NC VNC RL 300 W IN CL 35 pF GND VNC = VNO VO Switch Output 90% 0V tD tD CL (includes fixture and stray capacitance) FIGURE 2. Break-Before-Make Interval V+ Rgen DVOUT V+ NC or NO COM VOUT VOUT + IN Vgen CL 3V IN On On Off GND Q = DVOUT x CL IN depends on switch configuration: input polarity determined by sense of switch. FIGURE 3. Charge Injection www.vishay.com FaxBack 408-970-5600 4-6 Document Number: 70832 S-63597—Rev. B, 26-Jul-99 DG9461 Vishay Siliconix V+ 10 nF V+ COM 0V, 2.4 V IN COM NC or NO Off Isolation + 20 log RL GND VNCńNO VCOM Analyzer FIGURE 4. Off-Isolation V+ 10 nF V+ COM Meter IN 0 V, 2.4 V NC or NO GND HP4192A Impedance Analyzer or Equivalent f = 1 MHz FIGURE 5. Channel Off/On Capacitance Document Number: 70832 S-63597—Rev. B, 26-Jul-99 www.vishay.com FaxBack 408-970-5600 4-7