FQS4900 August 2000 QFET TM FQS4900 Dual N & P-Channel, Logic Level MOSFET General Description Features These dual N and P-channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. This device is well suited for high interface in telephone sets. • N-Channel 1.3A, 60V, RDS(on) = 0.55 Ω @ VGS = 10 V RDS(on) = 0.65 Ω @ VGS = 5 V P-Channel -0.3A, -300V, RDS(on) = 15.5 Ω @ VGS = -10 V RDS(on) = 16 Ω @ VGS =- 5 V • Low gate charge ( typical N-Channel 1.6 nC) ( typical P-Channel 3.6 nC) • Fast switching • Improved dv/dt capability 5 ! 4 ! "! ! ! D2 D2 D1 D1 3 6 G2 S2 G1 S1 7 ! 2 ! $ # ! ! 1 8 Absolute Maximum Ratings Symbol VDSS ID TA = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TA = 25°C) Drain Current N-Channel 60 Drain Curent VGSS Gate-Source Voltage Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) dv/dt PD - Pulsed A 1.3 -0.3 -0.19 A (Note 1) 5.2 -1.2 A (Note 2) 7.0 4.5 ± 20 (TA = 70°C) TJ, TSTG Units V 0.82 - Continuous (TA = 70°C) IDM P-Channel -300 Operating and Storage Temperature Range 2.0 V V/ns W 1.3 W -55 to +150 °C Thermal Characteristics Symbol RθJA Parameter Thermal Resistance, Junction-to-Ambient ©2000 Fairchild Semiconductor International Typ -- Max 62.5 Units °C/W Rev. A, August 2000 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Type Min Typ Max Units VGS = 0 V, ID = 250 µA N-Ch 60 -- -- V VGS = 0 V, ID = -250 µA P-Ch -300 -- -- V -- -- 1 µA -- -- 10 µA -- -- -1 µA -- -- -10 µA Off Characteristics BVDSS IDSS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VDS = 60 V, VGS = 0 V VDS = 48 V, TC = 55°C VDS = -300 V, VGS = 0 V VDS = -240 V, TC = 55°C N-Ch P-Ch IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V All -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V All -- -- -100 nA On Characteristics VGS(th) RDS(on) Gate Threshold Voltage Static Drain-Source On-Resistance VDS = 4V, ID = 20 mA N-Ch 1.0 -- 1.95 V VDS = 4V, ID = -20 mA P-Ch -1.0 -- -1.95 V VGS = 10 V, ID = 0.65 A VGS = 5 V, ID = 0.65 A VGS = -10 V, ID = -0.15 A VGS = -5 V, ID = -0.15 A gFS Forward Transconductance N-Ch P-CH -- 0.39 0.55 Ω -- 0.46 0.65 Ω -- 11.2 15.5 Ω -- 11.4 16 Ω VDS = 10 V, ID = 0.65 A N-CH -- 1.7 -- S VDS = -10 V, ID = -0.15 A P-CH -- 0.6 -- S N-Channel VDD = 30 V, ID = 1.3 A, RG = 25 Ω N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch --------------- 5.7 10 21 25 11 35 17 47 1.6 3.6 0.28 0.42 0.82 2.1 21 30 50 60 32 80 45 105 2.1 4.7 ----- ns ns ns ns ns ns ns ns nC nC nC nC nC nC N-Ch P-Ch --- --- 1.3 -0.3 A A VGS = 0 V, IS = 1.3 A N-Ch -- -- 1.5 V VGS = 0 V, IS = -0.3 A P-Ch -- -- -4.0 V Switching Characteristics td(on) tr td(off) tf Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge P-Channel VDD = -150 V, ID = -0.3 A, RG = 25 Ω N-Channel VDS = 48 V, ID = 1.3 A, VGS = 5 V P-Channel VDS = -240 V, ID = -0.3 A, VGS = -5 V Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 3. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 4. Essentially independent of operating temperature ©2000 Fairchild Semiconductor International Rev. A, August 2000 FQS4900 Electrical Characteristics VGS 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V 0 10 ID, Drain Current [A] ID, Drain Current [A] Top : 0 10 150℃ 25℃ -55℃ ※ Notes : 1. VDS = 25V 2. 250μ s Pulse Test ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ -1 10 -1 -1 0 10 10 1 10 0 10 2 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics VGS = 10V 1.5 IDR , Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 2.0 VGS = 5V 1.0 0.5 0 10 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test ※ Note : TJ = 25℃ -1 0.0 0 2 4 6 10 8 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 ID, Drain Current [A] VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 120 Ciss ※ Notes : 1. VGS = 0 V 2. f = 1 MHz Coss 80 40 Crss 10 VGS, Gate-Source Voltage [V] 160 Capacitance [pF] FQS4900 Typical Characteristics : N-Channel VDS = 30V 8 VDS = 48V 6 4 2 ※ Note : ID = 1.3 A 0 -1 10 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2000 Fairchild Semiconductor International 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A, August 2000 FQS4900 Typical Characteristics : N-Channel (Continued) 2.5 2.0 1.1 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 1.2 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 150 1.5 1.0 0.5 ※ Notes : 1. VGS = 10 V 2. ID = 0.65 A 0.0 -100 200 -50 o 0 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 1.5 Operation in This Area is Limited by R DS(on) ID, Drain Current [A] 1.2 10 ms 1 ms ID, Drain Current [A] 1 10 100 ms 0 10 1s 10 s DC -1 10 ※ Notes : 0.9 0.6 0.3 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -2 10 -1 0 10 1 10 0.0 25 2 10 10 50 75 Figure 9. Maximum Safe Operating Area 125 150 Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 10 0 .2 1 ※ N o te s : 1 . Z θ J C ( t) = 6 2 . 5 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 / t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .1 0 .0 5 0 .0 2 10 0 0 .0 1 PDM Zθ JC ( t) , T h e r m a l R e s p o n s e 100 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] t1 s in g le p u ls e 10 t2 -1 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ] Figure 11. Transient Thermal Response Curve ©2000 Fairchild Semiconductor International Rev. A, August 2000 0 VGS -10.0 V -8.0 V -6.0 V -5.0 V -4.5 V -4.0 V -3.5 V Bottom : -3.0 V 10 0 10 -1 10 -I D , Drain Current [A] -I D, Drain Current [A] Top : ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ -2 10 150℃ 25℃ -55℃ ※ Notes : 1. VDS = -25V 2. 250μ s Pulse Test -1 -1 0 10 10 1 10 0 10 2 4 6 8 10 -VGS , Gate-Source Voltage [V] -VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 30 0 25 -I DR , Reverse Drain Current [A] RDS(on) [ Ω ], Drain-Source On-Resistance 10 VGS = - 5V 20 VGS = - 10V 15 ※ Note : TJ = 25℃ 10 0.0 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test -1 10 0.3 0.6 0.9 1.2 1.5 0.0 0.5 -ID , Drain Current [A] 1.0 1.5 2.0 2.5 3.0 -VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12 250 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 10 Ciss 150 Coss 100 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz Crss 50 0 -1 10 -V GS , Gate-Source Voltage [V] 200 Capacitance [pF] FQS4900 Typical Characteristics : P-Channel (Continued) VDS = -60V 8 VDS = -150V 6 VDS = -240V 4 2 ※ Note : ID = -0.3 A 0 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2000 Fairchild Semiconductor International 0 1 2 3 4 5 6 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A, August 2000 FQS4900 Typical Characteristics : P-Channel (Continued) 2.5 2.0 1.1 RDS(ON) , (Normalized) Drain-Source On-Resistance -BV DSS , (Normalized) Drain-Source Breakdown Voltage 1.2 1.0 ※ Notes : 1. VGS = 0 V 2. ID = -250 μ A 0.9 0.8 -100 -50 0 50 100 150 1.5 1.0 ※ Notes : 1. VGS = -10 V 2. ID = -0.15 A 0.5 0.0 -100 200 -50 0 50 100 150 200 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 1 0.35 10 Operation in This Area is Limited by R DS(on) 0.30 0 10 ms 0.25 1 ms -I D, Drain Current [A] -I D, Drain Current [A] 10 100 ms 1s -1 10 10 s DC -2 10 ※ Notes : 0.20 0.15 0.10 o 1. TC = 25 C 0.05 o 2. TJ = 150 C 3. Single Pulse -3 10 0 1 10 0.00 25 2 10 10 50 75 Figure 9. Maximum Safe Operating Area 125 150 Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 10 0 .2 1 ※ N o te s : 1 . Z θ J C ( t) = 6 2 . 5 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 / t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .1 0 .0 5 0 .0 2 10 0 0 .0 1 PDM Zθ JC ( t) , T h e r m a l R e s p o n s e 100 TC, Case Temperature [℃] -VDS, Drain-Source Voltage [V] t1 s in g le p u ls e 10 t2 -1 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ] Figure 11. Transient Thermal Response Curve ©2000 Fairchild Semiconductor International Rev. A, August 2000 FQS4900 Gate Charge Test Circuit & Waveform 50KΩ 12V VGS Same Type as DUT Qg 200nF 5V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG 5V DUT VGS 10% td(on) tr t on ©2000 Fairchild Semiconductor International td(off) tf t off Rev. A, August 2000 FQS4900 Package Dimensions 8-SOP MIN #5 6.00 ±0.30 0.236 ±0.012 8° 0~ +0.10 0.15 -0.05 +0.004 0.006 -0.002 MAX0.10 MAX0.004 1.80 MAX 0.071 3.95 ±0.20 0.156 ±0.008 5.72 0.225 0.41 ±0.10 0.016 ±0.004 #4 1.27 0.050 #8 5.13 MAX 0.202 #1 4.92 ±0.20 0.194 ±0.008 ( 0.56 ) 0.022 1.55 ±0.20 0.061 ±0.008 0.1~0.25 0.004~0.001 0.50 ±0.20 0.020 ±0.008 ©2000 Fairchild Semiconductor International Rev. A, August 2000 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ E2CMOS™ FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench® QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2000 Fairchild Semiconductor International Rev. A, January 2000