FAIRCHILD FSTU16862_06

Revised October 2006
FSTU16862
20-Bit Bus Switch with 2V Undershoot Protection
General Description
Features
The Fairchild Switch FSTU16862 provides 20-bits of highspeed CMOS TTL-compatible bus switching. The low On
Resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
■ Undershoot hardened to 2V (A and B Ports)
The device is organized as a 20-bit bus switch. When OEX
is LOW, the switch is ON and Port A is connected to Port B.
When OEX is HIGH, a high impedance state exists
between the A and B Ports. The A and B Ports are protected against undershoot to support an extended range to
2.0V below ground. Fairchild's integrated Undershoot
Hardened Circuit (UHC®¥) senses undershoot at the I/O
and responds by preventing voltage differentials from
developing and turning the switch on.
■ Zero bounce in flow-through mode
■ 4: switch connection between two ports
■ Minimal propagation delay through the switch
■ Low lCC
■ Control inputs compatible with TTL level
■ See Application Note AN-5008 for details on
FSTU - Undershoot Protected Fairchild Switch Family
Ordering Code:
Order Number
Package
Number
Package Description
FSTU16862QSP
MQA48A
48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide
FSTU16862MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
UHC®¥ is a registered trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS500703
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FSTU16862 20-Bit Bus Switch with 2V Undershoot Protection
May 2002
FSTU16862
Logic Diagram
Connection Diagram
Pin Descriptions
Pin Name
Description
OEx
Bus Switch Enables
A
Bus A
B
Bus B
Truth Table
Inputs
OEx
L
H
Inputs/Outputs
A, B
B
A
Z
H HIGH Voltage Level
L LOW Voltage Level
Z High Impedance
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2
Supply Voltage (VCC)
DC Switch Voltage (VS) (Note 2)
DC Input Voltage (VIN) (Note 3)
DC Input Diode Current (lIK) VIN 0V
Recommended Operating
Conditions (Note 4)
0.5V to 7.0V
2.0V to 7.0V
0.5V to 7.0V
50 mA
DC Output Current (IOUT)
128 mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Power Supply Operating (VCC)
Input Voltage (VIN)
0V to 5.5V
Output Voltage (VOUT)
0V to 5.5V
Input Rise and Fall Time (tr, tf)
r100 mA
65qC to 150 qC
Switch Control Input
0 ns/V to 5 ns/V
Switch I/O
0 ns/V to DC
-40 qC to 85 qC
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: VS is the voltage observed/applied at either the A or B Ports across
the switch.
Note 3: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 4: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
VCC
Symbol
Parameter
(V)
40 qC to 85 qC
TA
Min
Typ
(Note 5)
Max
1.2
4.5
Units
IIN
18 mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
r1.0
PA
0 d VIN d 5.5V
0
10
PA
VIN
5.5
r1.0
PA
0 d A, B d VCC
2.0
V
Conditions
V
5.5V
IOZ
OFF-STATE Leakage Current
RON
Switch On Resistance
4.5
4
7
:
VIN
0V, IIN
64 mA
(Note 6)
4.5
4
7
:
VIN
0V, IIN
30 mA
4.5
8
14
:
VIN
2.4V, IIN
15 mA
4.0
11
20
:
VIN
2.4V, IIN
15 mA
VCC or GND, IOUT
ICC
Quiescent Supply Current
5.5
3
PA
VIN
' ICC
Increase in ICC per Input
5.5
2.5
mA
One Input at 3.4V
5.5
2.0
V
(Note 7)
VIKU
Other Inputs at VCC or GND
Voltage Undershoot
0.0 mA t IIN t 50 mA
OE
Note 5: Typical values are at VCC
0
5.0V and TA
5.5V
25qC
Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
Note 7: Per TTL driven input, control pins only.
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FSTU16862
Absolute Maximum Ratings(Note 1)
FSTU16862
AC Electrical Characteristics
TA
Symbol
CL
Parameter
tPHL, tPLH
Propagation Delay Bus-to-Bus
(Note 8)
tPZH, tPZL
Output Enable Time
tPHZ, tPLZ
40 qC to 85 qC,
50pF, RU
VCC
4.5 – 5.5V
Min
Max
1.0
Output Disable Time
1.0
RD
500:
VCC
Units
Figure
Conditions
4.0V
Min
Number
Max
0.25
0.25
ns
5.9
6.4
ns
6.9
7.4
ns
VI
OPEN
Figures
2, 3
Figures
2, 3
VI
7V for tPZL
VI
OPEN for tPZH
VI
7V for tPLZ
VI
OPEN for tPHZ
Figures
2, 3
Note 8: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
CIN
CI/O
Note 9: TA
(Note 9)
Parameter
Typ
Max
Units
Conditions
Control Pin Input Capacitance
3
pF
VCC
Input/Output Capacitance “OFF State”
6
pF
VCC, OE
25qC, f
5.0V, VIN
0V
5.0V, VIN
0V
1 MHz, Capacitance is characterized but not tested.
Undershoot Characteristic (Note 10)
Symbol
VOUTU
Parameter
Output Voltage During Undershoot
Min
Typ
2.5
VOH - 0.3
Max
Units
Conditions
V
Figure 1
Note 10: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage
undershoot event.
FIGURE 1.
Device Test Conditions
Parameter
Value
VIN
see Waveform
V
100K
:
VTRI
11.0
V
VCC
5.5
V
R1
R2
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Transient
Input Voltage (VIN) Waveform
Units
4
FSTU16862
AC Loading and Waveforms
Note: Input driven by 50: source terminated in 50:
Note: C L includes load and stray capacitance
Note: Input PRR
1.0 MHz, tW
500 ns
FIGURE 2. AC Test Circuit
FIGURE 3. AC Waveforms
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FSTU16862
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide
Package Number MQA48A
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FSTU16862 20-Bit Bus Switch with 2V Undershoot Protection
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384(FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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