INTERSIL HFA3424IB96

HFA3424
Data Sheet
January 1997
File Number
4131.2
2.4GHz - 2.5GHz Low Noise Amplifier
Features
The Intersil 2.4GHz PRISM™ chip set is
a highly integrated five-chip solution for
RF modems employing Direct
Sequence Spread Spectrum (DSSS)
signaling. The HFA3424 2.4GHz 2.5GHz low noise amplifier is an optional chip that can be
added to the five chips in the PRISM™ chip set. The
HFA3424 offers increased sensitivity for systems targeting
802.11 specifications. (See Figure 1, the Typical Application
Diagram.)
• Low Noise Figure . . . . . . . . . . . . . . . . . . . . . . . . . . 1.90dB
The Intersil HFA3424 PRISM™ is a high performance low
noise amplifier in a low cost SOIC 8 lead surface mount
plastic package. The HFA3424 employs a fully monolithic
design which eliminates the need for external tuning
networks. It can be biased using 3V or 5V supplies and has
an option for biasing at higher currents for increased
dynamic range.
Applications
™
The HFA3424 is ideally suited for use where low noise
figure, high gain, high dynamic range and low power
consumption required. Typical applications include receiver
front ends in the Wireless Local Area Network (WLAN) and
wireless data collection markets in the 2.4GHz Industrial,
Scientific and Medical (ISM) band, as well as standard gain
blocks, buffer amps, driver amps and IF amps in both fixed
and portable systems.
• High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14dB
• Low Power Consumption . . . . . . . . . . . . . . 3V to 5V, 5mA
• High Dynamic Range
• DC Decoupled RF Input and Output
• No External RF Tuning Elements Necessary
• Low Cost SOIC 8 Lead Plastic Package
• Systems Targeting IEEE 802.11 Standard
• TDD Quadrature-Modulated Communication
Systems
• Wireless Local Area Networks
• PCMCIA Wireless Transceivers
• ISM Systems
• TDMA Packet Protocol Radios
• PCS/Wireless PBX
• Wireless Local Loop
Ordering Information
PART NUMBER
Pinout
TEMP.
RANGE (oC)
PACKAGE
HFA3424IB
-40 to 85
8 Ld SOIC
HFA3424IB96
-40 to 85
Tape and Reel
PKG.
NO.
M8.15
Functional Block Diagram
HFA3424
(SOIC)
TOP VIEW
VDD
GND
1
8
GND
VBIAS
2
7
VDD
RF IN
3
6
RF OUT
GND
4
5
GND
LNA 1
EXTENDED
BIAS
2-7
RF OUT
RF IN
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
PRISM® is a registered trademark of Intersil Corporation. PRISM logo is a trademark of Intersil Corporation.
HFA3424
Typical Application Diagram
HSP3824
HFA3724
(FILE# 4064)
TUNE/SELECT
HFA3424 (NOTE)
RXI
(FILE# 4131)
A/D
DESPREAD
RXQ
I
÷2
(FILE# 4066)
0o/90o
M
M
U
U
X
X
RSSI
A/D
A/D
CCA
TXI
SPREAD
RFPA
VCO
HFA3925
VCO
802.11
MAC-PHY
INTERFACE
CTRL
HFA3624
UP/DOWN
CONVERTER
DPSK
DEMOD
DATA TO MAC
(FILE# 4067)
TXQ
Q
DPSK
MOD.
(FILE# 4132)
QUAD IF MODULATOR
DSSS BASEBAND PROCESSOR
DUAL SYNTHESIZER
HFA3524 (FILE# 4062)
NOTE:
PRISM™ CHIP SET FILE #4063
FIGURE 1. TYPICAL TRANSCEIVER AMPLIFIER APPLICATIONS CIRCUIT USING THE HFA3424
Required for systems targeting 802.11 specifications.
For additional information on the PRISM™ chip set, call
(407) 724-7800 to access Intersil’ AnswerFAX system. When
prompted, key in the four-digit document number (File #) of
the datasheets you wish to receive.
2-8
The four-digit file numbers are shown in Typical Application
Diagram, and correspond to the appropriate circuit.
HFA3424
Absolute Maximum Ratings
Thermal Information
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +10VDC
Input Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +17dBm
Supply Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Thermal Resistance (Typical, Note 2)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
165
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Only if Pin 2 is used to increase current.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
TA = 25oC, Z0 = 50Ω, VDD = +5V, PIN = -30dBm, f = 2.45GHz, VBIAS = Open Circuit
Unless Otherwise Specified
Electrical Specifications
PARAMETER
MIN
TYP
MAX
UNITS
LNA Input Frequency Range
2.4
-
2.5
GHz
Gain
12
14
16
dB
Noise Figure
-
1.90
2.30
dB
Input VSWR
-
1.5:1
-
Output VSWR
-
1.5:1
-
Input Return Loss
-
-14.0
-
dB
Output Return Loss
-
-14.0
-
dB
Output 1dB Compression
-
3
-
dBm
Input IP3
-
1
-
dBm
Reverse Isolation
-
30
-
dB
Supply Current at VDD = 5V
3
5
7
mA
2.7
-
5.5
V
Supply Range
Typical Performance Curves
18
2.0
TA = 25oC
NOISE FIGURE (dB)
16
GAIN (dB)
5V, 20mA
5V, 5mA
14
12
TA = 25oC
3V, 5mA
1.9
5V, 5mA
1.8
5V, 20mA
1.7
3V, 5mA
10
2.2
2.3
2.4
2.5
FREQUENCY (GHz)
FIGURE 2. GAIN vs FREQUENCY
2-9
2.6
2.7
1.6
2.40
2.42
2.44
2.46
FREQUENCY (GHz)
2.48
FIGURE 3. NOISE FIGURE vs FREQUENCY
2.50
HFA3424
Typical Performance Curves
3.0
(Continued)
4
5V, 5mA, TA = 25oC
TA = 25oC
5V, 20mA
2.5
INPUT IP3 (dBm)
2
VSWR
OUTPUT
2.0
1.5
5V, 5mA
0
3V, 5mA
-2
INPUT
1.0
2.2
2.3
2.4
2.5
FREQUENCY (GHz)
2.6
-4
2.40
2.7
FIGURE 4. VSWR vs FREQUENCY
2.42
2.44
2.46
FREQUENCY (GHz)
2.48
2.50
FIGURE 5. INPUT IP3 vs FREQUENCY
2.6
18
5V, 5mA
5V, 5mA
85oC
NOISE FIGURE (dB)
GAIN (dB)
16
-40oC
25oC
14
85oC
12
2.3
2.0
25oC
1.7
-40oC
10
2.2
2.3
2.4
2.5
FREQUENCY (GHz)
FIGURE 6. GAIN vs FREQUENCY
2-10
2.6
2.7
1.4
2.40
2.42
2.44
2.46
FREQUENCY (GHz)
2.48
FIGURE 7. NOISE FIGURE vs FREQUENCY
2.50
HFA3424
Typical Application Circuit
500pF
15nH
+VDD
VBIAS (PIN 2)
PIN 2 ALLOWS FOR AN EXTERNAL RESISTOR
RBB TO BE USED TO GROUND FOR AN OPTIONAL
20mA CURRENT OPERATION. RECOMMENDED
VALUES FOR THE CHIP RESISTOR ARE 30Ω TO 35Ω.
7
6
5
3
4
30Ω To 35Ω To Ground
2
Open
RF SIGNAL OUTPUT 2.4GHz
(50Ω TRANSMISSION LINE)
SEE NOTE 2
8
EXTENDED BIAS
1
NORMAL BIAS
RBB
RF SIGNAL INPUT 2.4GHz
(50Ω TRANSMISSION LINE)
SEE NOTE 2
NOTE:
3.
No DC blocking capacitor required on LNA input or output transmission lines.
FIGURE 8. REFERENCE APPLICATION/TEST DESIGN SETUP SCHEMATIC: LOW NOISE AMPLIFIER
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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2-11
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