ETC ICL3243CB

ICL3221, ICL3222, ICL3223, ICL3232, ICL3241,
ICL3243
TM
Data Sheet
September 2001
1 Microamp Supply-Current, +3V to +5.5V,
250kbps, RS-232 Transmitters/Receivers
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The Intersil ICL32XX devices are 3.0V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications, even at VCC = 3.0V. Targeted
applications are PDAs, Palmtops, and notebook and laptop
computers where the low operational, and even lower
standby, power consumption is critical. Efficient on-chip
charge pumps, coupled with manual and automatic
powerdown functions (except for the ICL3232), reduce the
standby supply current to a 1µA trickle. Small footprint
packaging, and the use of small, low value capacitors ensure
board space savings as well. Data rates greater than
250kbps are guaranteed at worst case load conditions. This
family is fully compatible with 3.3V only systems, mixed 3.3V
and 5.0V systems, and 5.0V only systems.
The ICL324X are 3 driver, 5 receiver devices that provide a
complete serial port suitable for laptop or notebook
computers. Both devices also include noninverting alwaysactive receivers for “wake-up” capability.
The ICL3221, ICL3223 and ICL3243, feature an automatic
powerdown function which powers down the on-chip powersupply and driver circuits. This occurs when an attached
peripheral device is shut off or the RS-232 cable is removed,
conserving system power automatically without changes to
the hardware or operating system. These devices power up
again when a valid RS-232 voltage is applied to any receiver
input.
Table 1 summarizes the features of the devices represented
by this data sheet, while Application Note AN9863
summarizes the features of each device comprising the
ICL32XX 3V family.
File Number
4805.8
Features
• Drop in Replacements for MAX3221, MAX3222,
MAX3223, MAX3232, MAX3241, MAX3243, SP3243
• ICL3221 is Low Power, Pin Compatible Upgrade for 5V
MAX221
• ICL3222 is Low Power, Pin Compatible Upgrade for 5V
MAX242, and SP312A
• ICL3232 is Low Power Upgrade for HIN232/ICL232 and
Pin Compatible Competitor Devices
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• Latch-Up Free
• On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
• Manual and Automatic Powerdown Features (Except
ICL3232)
• Guaranteed Mouse Driveability (ICL324X Only)
• Receiver Hysteresis For Improved Noise Immunity
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs
• Wide Power Supply Range . . . . . . . Single +3V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . . . . 1µA
Applications
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Modems, Printers and other Peripherals
- Digital Cameras
- Cellular/Mobile Phones
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
NO. OF NO. OF
Tx.
Rx.
NO. OF
MONITOR Rx.
(R OUTB)
DATA
RATE
(kbps)
Rx. ENABLE
FUNCTION?
READY
OUTPUT?
MANUAL
POWERDOWN?
AUTOMATIC
POWERDOWN
FUNCTION?
ICL3221
1
1
0
250
YES
NO
YES
YES
ICL3222
2
2
0
250
YES
NO
YES
NO
ICL3223
2
2
0
250
YES
NO
YES
YES
ICL3232
2
2
0
250
NO
NO
NO
NO
ICL3241
3
5
2
250
YES
NO
YES
NO
ICL3243
3
5
1
250
NO
NO
YES
YES
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, All Rights Reserved
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Ordering Information
(NOTE 1)
PART NO.
TEMP.
RANGE ( oC)
Ordering Information
PACKAGE
PKG. NO.
(NOTE 1)
PART NO.
TEMP.
RANGE ( oC)
(Continued)
PACKAGE
PKG. NO.
ICL3221CA
0 to 70
16 Ld SSOP
M16.209
ICL3232IBN
-40 to 85
16 Ld SOIC (N)
M16.15
ICL3221IA
-40 to 85
16 Ld SSOP
M16.209
ICL3232IB
-40 to 85
16 Ld SOIC
M16.3
ICL3221CV
0 to 70
16 Ld TSSOP
M16.173
ICL3232CP
0 to 70
16 Ld PDIP
E16.3
ICL3222CA
0 to 70
20 Ld SSOP
M20.209
ICL3232CV
0 to 70
16 Ld TSSOP
M16.173
ICL3222IA
-40 to 85
20 Ld SSOP
M20.209
ICL3232IV
-40 to 85
16 Ld TSSOP
M16.173
ICL3222CB
0 to 70
18 Ld SOIC
M18.3
ICL3241CA
0 to 70
28 Ld SSOP
M28.209
ICL3222IB
-40 to 85
18 Ld SOIC
M18.3
ICL3241IA
-40 to 85
28 Ld SSOP
M28.209
ICL3222CP
0 to 70
18 Ld PDIP
E18.3
ICL3241CB
0 to 70
28 Ld SOIC
M28.3
ICL3222CV
0 to 70
20 Ld TSSOP
M20.173
ICL3241IB
-40 to 85
28 Ld SOIC
M28.3
ICL3222IV
-40 to 85
20 Ld TSSOP
M20.173
ICL3241CV
0 to 70
28 Ld TSSOP
M28.173
ICL3223CA
0 to 70
20 Ld SSOP
M20.209
ICL3241IV
-40 to 85
28 Ld TSSOP
M28.173
ICL3223IA
-40 to 85
20 Ld SSOP
M20.209
ICL3243CA
0 to 70
28 Ld SSOP
M28.209
ICL3223CP
0 to 70
20 Ld PDIP
E20.3
ICL3243IA
-40 to 85
28 Ld SSOP
M28.209
ICL3223CV
0 to 70
20 Ld TSSOP
M20.173
ICL3243CB
0 to 70
28 Ld SOIC
M28.3
ICL3223IV
-40 to 85
20 Ld TSSOP
M20.173
ICL3243IB
-40 to 85
28 Ld SOIC
M28.3
ICL3232CA
0 to 70
16 Ld SSOP
M16.209
ICL3243CV
0 to 70
28 Ld TSSOP
M28.173
ICL3232IA
-40 to 85
16 Ld SSOP
M16.209
ICL3243IV
-40 to 85
28 Ld TSSOP
M28.173
ICL3232CB
0 to 70
16 Ld SOIC
M16.3
NOTE:
ICL3232CBN
0 to 70
16 Ld SOIC (N)
M16.15
1. Most surface mount devices are available on tape and reel; add
“-T” to suffix.
Pinouts
ICL3221 (SSOP, TSSOP)
TOP VIEW
EN 1
16 FORCEOFF
C1+ 2
V+
15 VCC
3
14 GND
13 T1OUT
C1- 4
C2+ 5
12 FORCEON
11 T1IN
C2- 6
10 INVALID
V- 7
R1IN 8
9 R1OUT
2
ICL3222 (PDIP, SOIC)
TOP VIEW
EN 1
18 SHDN
C1+ 2
17 VCC
3
16 GND
V+
C1- 4
15 T1OUT
C2+ 5
14 R1 IN
C2- 6
13 R1 OUT
V- 7
12 T1IN
T2 OUT 8
11 T2IN
R2IN 9
10 R2 OUT
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Pinouts
(Continued)
ICL3222 (SSOP, TSSOP)
TOP VIEW
EN 1
ICL3223 (PDIP, SSOP, TSSOP)
TOP VIEW
EN 1
20 SHDN
20 FORCEOFF
C1+ 2
19 VCC
C1+ 2
19 VCC
3
18 GND
V+
3
18 GND
V+
C1- 4
17 T1OUT
C1- 4
17 T1OUT
C2+ 5
16 R1IN
C2+ 5
16 R1 IN
C2- 6
15 R1OUT
C2- 6
15 R1 OUT
V- 7
T2OUT 8
13 T1IN
R2IN 9
12 T2IN
R2OUT 10
T2 OUT 8
13 T1IN
R2IN 9
12 T2IN
R2OUT 10
11 NC
ICL3232 (PDIP, SOIC, SSOP, TSSOP)
TOP VIEW
C1+ 1
V+ 2
C1-
3
14 FORCEON
V- 7
14 NC
11 INVALID
ICL3241 (SOIC, SSOP, TSSOP)
TOP VIEW
16 VCC
C2+ 1
28 C1+
15 GND
C2- 2
27 V+
V-
14 T1OUT
3
26 VCC
25 GND
C2+ 4
13 R1 IN
R1 IN 4
C2- 5
12 R1 OUT
R2 IN 5
24 C1-
11 T1IN
R3 IN 6
23 EN
10 T2IN
R4 IN 7
22 SHDN
R5 IN 8
21 R1OUTB
V- 6
T2 OUT 7
9 R2 OUT
R2IN 8
T1OUT
28 C1+
C2- 2
19 R1OUT
18 R2OUT
T3IN 12
17 R3OUT
T2IN 13
16 R4OUT
T1IN 14
15 R5OUT
27 V+
3
26 VCC
R1IN 4
25 GND
R2IN 5
24 C1-
R3IN 6
23 FORCEON
R4IN 7
22 FORCEOFF
R5IN 8
21 INVALID
T1OUT 9
20 R2OUTB
T2OUT 10
19 R1OUT
T3OUT 11
18 R2OUT
T3IN 12
17 R3OUT
T2IN 13
16 R4OUT
T1IN 14
15 R5OUT
V-
3
20 R2OUTB
T3OUT 11
ICL3243 (SOIC, SSOP, TSSOP)
TOP VIEW
C2+ 1
9
T2OUT 10
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Pin Descriptions
PIN
VCC
FUNCTION
System power supply input (3.0V to 5.5V).
V+
Internally generated positive transmitter supply (+5.5V).
V-
Internally generated negative transmitter supply (-5.5V).
GND
Ground connection.
C1+
External capacitor (voltage doubler) is connected to this lead.
C1-
External capacitor (voltage doubler) is connected to this lead.
C2+
External capacitor (voltage inverter) is connected to this lead.
C2-
External capacitor (voltage inverter) is connected to this lead.
TIN
TTL/CMOS compatible transmitter Inputs.
TOUT
RS-232 level (nominally ±5.5V) transmitter outputs.
RIN
RS-232 compatible receiver inputs.
ROUT
TTL/CMOS level receiver outputs.
ROUTB
INVALID
EN
SHDN
TTL/CMOS level, noninverting, always enabled receiver outputs.
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
Active low receiver enable control; doesn’t disable ROUTB outputs.
Active low input to shut down transmitters and on-board power supply, to place device in low power mode.
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2).
FORCEON
Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).
4
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Typical Operating Circuits
ICL3221
ICL3222
C3 (OPTIONAL CONNECTION, NOTE)
C3 (OPTIONAL CONNECTION, NOTE)
V- 7
T1
11
T1IN
V+
13
9
R1OUT
8
+ C3
0.1µF
C2
0.1µF
C4
+ 0.1µF
T1OUT
R1IN
5kΩ
R1
1 EN
16
FORCEOFF
12
INVALID
FORCEON
GND
10
VCC
2
+
4
5
+
6
+
17
C1+
3
V+
C2+
+
T1
15
T2
T1OUT
T2OUT
14
R1 IN
5kΩ
R1
9
10
TO POWER
CONTROL
LOGIC
C4
0.1µF
8
13
R1OUT
+ C3
0.1µF
7
VC2-
11
T2IN
VCC
C1-
12
T1IN
TTL/CMOS
LOGIC LEVELS
C2
0.1µF
3
VCC
C1
0.1µF
+
0.1µF
RS-232
LEVELS
15
2
+ C1+
4
C15
+ C2+
6
C2-
C1
0.1µF
TTL/CMOS
LOGIC LEVELS
+3.3V
0.1µF
RS-232
LEVELS
+
+
+3.3V
R2OUT
R2 IN
1 EN
5kΩ
R2
14
SHDN
18
VCC
GND
NOTE: THE NEGATIVE TERMINAL OF C3 CAN BE
CONNECTED TO EITHER VCC OR GND
16
NOTE: THE NEGATIVE TERMINAL OF C3 CAN BE
CONNECTED TO EITHER VCC OR GND
ICL3223
TTL/CMOS
LOGIC LEVELS
T1IN
5
+
6
C1+
VCC
C1C2+
+3.3V
V+
3
V- 7
C2T1
13
17
T2
12
C4
0.1µF
+
15
16
T1IN
9
EN
5kΩ
R2
0.1µF
1
+
3
4
+
5
R2IN
11
10
C1+
16
VCC
V+
C1C2+
V-
C2T1
T2
INVALID
FORCEON
GND
11
VCC
TO POWER
CONTROL LOGIC
+ C3
0.1µF
6
C4
0.1µF
+
R1OUT
T1OUT
7
T2IN
T2OUT
13
12
R1
R1IN
5kΩ
9
20
2
14
8
R2OUT
FORCEOFF
14
R1IN
5kΩ
10
1
C2
0.1µF
+
T1 OUT
T2 OUT
R1
R2OUT
C1
0.1µF
8
T2IN
R1OUT
+ C3
0.1µF
+
2
+
4
19
R2
R2IN
5kΩ
GND
15
18
NOTE: THE NEGATIVE TERMINAL OF C3 CAN BE
CONNECTED TO EITHER VCC OR GND
5
RS-232
LEVELS
C2
0.1µF
C3 (OPTIONAL CONNECTION, NOTE)
0.1µF
TTL/CMOS
LOGIC LEVELS
C1
0.1µF
+
RS-232
LEVELS
+3.3V
ICL3232
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
(Continued)
ICL3241
C2
0.1µF
T1IN
0.1µF
28
C1+
+
24
C11
C2+
+
2
C2-
26
VCC
V+
V-
14
T1
13
T2
27
3
9
+ C3
0.1µF
T3
12
+
C2
0.1µF
+
C1C2+
+
V-
3
C2T1
C4
0.1µF
+
9
T2
10
T2OUT
T3
12
T3OUT
C3
0.1µF
T1OUT
13
11
T3IN
21
T3OUT
20
R2OUTB
20
R2 OUTB
19
4
R1OUT
TTL/CMOS
LOGIC LEVELS
19
R1IN
R1
5kΩ
18
5
R2OUT
R2IN
4
R1OUT
R1IN
R1
17
18
5
R2IN
R2
R3IN
5kΩ
R3
16
6
R3OUT
R3IN
R3
16
7
R4IN
R4IN
R4
R5OUT
R5IN
GND
25
5kΩ
R5
23
FORCEON
TO POWER
CONTROL LOGIC
22
8
R5OUT
5kΩ
R5
6
5kΩ
15
8
SHDN
R4
5kΩ
15
23 EN
5kΩ
R4OUT
7
R4OUT
5kΩ
17
6
R3OUT
5kΩ
R2OUT
5kΩ
R2
RS-232
LEVELS
TTL/CMOS
LOGIC LEVELS
2
27
V+
T2IN
R1 OUTB
VCC
1
VCC
14
11
T3IN
24
26
C1+
T1IN
T1OUT
T2OUT
0.1µF
28
C1
0.1µF
C4
0.1µF
+
10
T2IN
+
VCC
22
FORCEOFF
21
INVALID
GND
25
R5IN
RS-232
LEVELS
C1
0.1µF
+3.3V
+
RS-232
LEVELS
+3.3V
ICL3243
RS-232
LEVELS
Typical Operating Circuits
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Absolute Maximum Ratings
Thermal Information
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
TIN, FORCEOFF, FORCEON, EN, SHDN . . . . . . . . . -0.3V to 6V
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
ROUT, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V CC +0.3V
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 2)
θJA (oC/W)
16 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . .
90
18 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . .
80
20 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . .
77
16 Ld Wide SOIC Package . . . . . . . . . . . . . . . . . . .
100
16 Ld Narrow SOIC Package. . . . . . . . . . . . . . . . . .
115
18 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
75
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
75
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
135
20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . .
122
16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . .
145
20 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . .
140
28 Ld SSOP and TSSOP Packages . . . . . . . . . . . .
100
Moisture Sensitivity (see Technical Brief TB363)
All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC, SSOP, TSSOP - Lead Tips Only)
Operating Conditions
Temperature Range
ICL32XXCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
ICL32XXIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C 4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = 25oC
PARAMETER
TEST CONDITIONS
TEMP
(oC)
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Powerdown
All RIN Open, FORCEON = GND, FORCEOFF = VCC
(ICL3221, ICL3223, ICL3243 Only)
25
-
1.0
10
µA
Supply Current, Powerdown
FORCEOFF = SHDN = GND (Except ICL3232)
25
-
1.0
10
µA
Supply Current,
Automatic Powerdown Disabled
All Outputs Unloaded,
FORCEON = FORCEOFF =
SHDN = VCC
VCC = 3.15V,
ICL3221-32
25
-
0.3
1.0
mA
VCC = 3.0V, ICL3241-43
25
-
0.3
1.0
mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
TIN, FORCEON, FORCEOFF, EN, SHDN
Full
-
-
0.8
V
Input Logic Threshold High
TIN, FORCEON, FORCEOFF,
EN, SHDN
VCC = 3.3V
Full
2.0
-
-
V
VCC = 5.0V
Full
2.4
-
-
V
Input Leakage Current
TIN, FORCEON, FORCEOFF, EN, SHDN
Full
-
±0.01
±1.0
µA
Output Leakage Current
(Except ICL3232)
FORCEOFF = GND or EN = VCC
Full
-
±0.05
±10
µA
Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
Output Voltage High
IOUT = -1.0mA
Full
-
V
VCC -0.6 VCC -0.1
AUTOMATIC POWERDOWN (ICL3221, ICL3223, ICL3243 Only, FORCEON = GND, FORCEOFF = VCC)
Receiver Input Thresholds to
Enable Transmitters
ICL32XX Powers Up (See Figure 6)
Full
-2.7
-
2.7
V
Receiver Input Thresholds to
Disable Transmitters
ICL32XX Powers Down (See Figure 6)
Full
-0.3
-
0.3
V
INVALID Output Voltage Low
IOUT = 1.6mA
Full
-
-
0.4
V
INVALID Output Voltage High
IOUT = -1.0mA
Full
VCC-0.6
-
-
V
25
-
100
-
µs
Receiver Threshold to Transmitters
Enabled Delay (tWU)
7
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C 4 = 0.1µF; Unless Otherwise Specified.
Typicals are at TA = 25oC (Continued)
TEMP
(oC)
MIN
TYP
MAX
UNITS
Receiver Positive or Negative
Threshold to INVALID High Delay
(tINVH)
25
-
1
-
µs
Receiver Positive or Negative
Threshold to INVALID Low Delay
(tINVL)
25
-
30
-
µs
Full
-25
-
25
V
VCC = 3.3V
25
0.6
1.2
-
V
VCC = 5.0V
25
0.8
1.5
-
V
VCC = 3.3V
25
-
1.5
2.4
V
VCC = 5.0V
25
-
1.8
2.4
V
Input Hysteresis
25
-
0.3
-
V
Input Resistance
25
3
5
7
kΩ
PARAMETER
TEST CONDITIONS
RECEIVER INPUTS
Input Voltage Range
Input Threshold Low
Input Threshold High
TRANSMITTER OUTPUTS
Output Voltage Swing
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
±5.0
±5.4
-
V
Output Resistance
VCC = V+ = V- = 0V, Transmitter Output = ±2V
Full
300
10M
-
Ω
Full
-
±35
±60
mA
VOUT = ±12V, VCC = 0V or 3V to 5.5V
Automatic Powerdown or FORCEOFF = SHDN = GND
Full
-
-
±25
µA
T1IN = T2IN = GND, T3IN = VCC, T3OUT Loaded with 3kΩ to
GND, T1OUT and T2OUT Loaded with 2.5mA Each
Full
±5
-
-
V
Maximum Data Rate
RL = 3kΩ, CL = 1000pF, One Transmitter Switching
Full
250
500
-
kbps
Receiver Propagation Delay
Receiver Input to Receiver
Output, CL = 150pF
tPHL
25
-
0.3
-
µs
tPLH
25
-
0.3
-
µs
Output Short-Circuit Current
Output Leakage Current
MOUSE DRIVEABILITY (ICL324X Only)
Transmitter Output Voltage
(See Figure 9)
TIMING CHARACTERISTICS
Receiver Output Enable Time
Normal Operation (Except ICL3232)
25
-
200
-
ns
Receiver Output Disable Time
Normal Operation (Except ICL3232)
25
-
200
-
ns
Transmitter Skew
tPHL - tPLH
Full
-
200
1000
ns
Receiver Skew
tPHL - tPLH
Full
-
100
500
ns
Transition Region Slew Rate
VCC = 3.3V,
RL = 3kΩ to 7kΩ,
Measured From 3V to -3V or -3V
to 3V
CL = 200pF to 2500pF
25
4
8.0
30
V/µs
CL = 200pF to 1000pF
25
6
-
30
V/µs
ESD PERFORMANCE
RS-232 Pins (TOUT, RIN)
All Other Pins
Human Body Model
ICL3221 - ICL3243
25
-
>±8
-
kV
IEC1000-4-2 Contact Discharge
ICL3221 - ICL3243
25
-
±8
-
kV
IEC1000-4-2 Air Gap Discharge
ICL3221 - ICL3232
25
-
±8
-
kV
ICL3241 - ICL3243
25
-
±6
-
kV
ICL3221 - ICL3243
25
-
±2
-
kV
Human Body Model
8
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Detailed Description
ICL32XX interface ICs operate from a single +3V to +5.5V
supply, guarantee a 250kbps minimum data rate, require
only four small external 0.1µF capacitors, feature low power
consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
Charge-Pump
Intersil’s new ICL32XX family utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a VCC supply as
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
voltage doubler and inverter functions at VCC = 3.3V. See
the “Capacitor Selection” section, and Table 3 for capacitor
recommendations for other operating conditions. The charge
pumps operate discontinuously (i.e., they turn off as soon as
the V+ and V- supplies are pumped up to the nominal
values), resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies,
these transmitters deliver true RS-232 levels over a wide
range of single supply system voltages.
Except for the ICL3232, all transmitter outputs disable and
assume a high impedance state when the device enters the
powerdown mode (see Table 2). These outputs may be
driven to ±12V when disabled.
All devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one
transmitter operating at full speed. Under more typical
conditions of V CC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one
transmitter easily operates at 900kbps.
Transmitter inputs float if left unconnected, and may cause
ICC increases. Connect unused inputs to GND for the best
performance.
Receivers
All the ICL32XX devices contain standard inverting receivers
that tristate (except for the ICL3232) via the EN or
FORCEOFF control lines. Additionally, the two ICL324X
products include noninverting (monitor) receivers (denoted
by the R OUTB label) that are always active, regardless of the
state of any control lines. All the receivers convert RS-232
signals to CMOS output levels and accept inputs up to ±25V
while presenting the required 3kΩ to 7kΩ input impedance
(see Figure 1) even if the power is off (VCC = 0V). The
receivers’ Schmitt trigger input stage uses hysteresis to
increase noise immunity and decrease errors due to slow
input signal transitions.
9
The ICL3221/22/23/41 inverting receivers disable only when
EN is driven high. ICL3243 receivers disable during forced
(manual) powerdown, but not during automatic powerdown
(see Table 2).
ICL324X monitor receivers remain active even during
manual powerdown and forced receiver disable, making
them extremely useful for Ring Indicator monitoring.
Standard receivers driving powered down peripherals must
be disabled to prevent current flow through the peripheral’s
protection diodes (see Figures 2 and 3). This renders them
useless for wake up functions, but the corresponding monitor
receiver can be dedicated to this task as shown in Figure 3.
VCC
RXOUT
RXIN
-25V ≤ VRIN ≤ +25V
5kΩ
GND ≤ VROUT ≤ VCC
GND
FIGURE 1. INVERTING RECEIVER CONNECTIONS
Low Power Operation
These 3V devices require a nominal supply current of
0.3mA, even at VCC = 5.5V, during normal operation (not in
powerdown mode). This is considerably less than the 5mA to
11mA current required by comparable 5V RS-232 devices,
allowing users to reduce system power simply by switching
to this new family.
Pin Compatible Replacements For 5V Devices
The ICL3221/22/32 are pin compatible with existing 5V
RS-232 transceivers - see the “Features” section on the front
page for details.
This pin compatibility coupled with the low Icc and wide
operating supply range, make the ICL32XX potential lower
power, higher performance drop-in replacements for existing
5V applications. As long as the ±5V RS-232 output swings
are acceptable, and transmitter input pull-up resistors aren’t
required, the ICL32XX should work in most 5V applications.
When replacing a device in an existing 5V application, it is
acceptable to terminate C3 to VCC as shown on the “Typical
Operating Circuit”. Nevertheless, terminate C3 to GND if
possible, as slightly better performance results from this
configuration.
Powerdown Functionality (Except ICL3232)
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 1µA, because the on-chip charge
pump turns off (V+ collapses to VCC, V- collapses to GND),
and the transmitter outputs tristate. Inverting receiver
outputs may or may not disable in powerdown; refer to Table
2 for details. This micro-power mode makes these devices
ideal for battery powered and portable applications.
Software Controlled (Manual) Powerdown
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Most devices in the ICL32XX family provide pins that allow
the user to force the IC into the low power, standby state.
determine the IC’s mode. For always enabled operation,
FORCEON and FORCEOFF are both strapped high. To
switch between active and powerdown modes, under logic or
software control, only the FORCEOFF input need be driven.
The FORCEON state isn’t critical, as FORCEOFF
dominates over FORCEON. Nevertheless, if strictly manual
control over powerdown is desired, the user must strap
FORCEON high to disable the automatic powerdown
circuitry. Inverting (standard) receiver outputs also disable
when the device is in powerdown, thereby eliminating the
possible current path through a shutdown peripheral’s input
protection diode (see Figures 2 and 3).
On the ICL3222 and ICL3241, the powerdown control is via
a simple shutdown (SHDN) pin. Driving this pin high enables
normal operation, while driving it low forces the IC into it’s
powerdown state. Connect SHDN to VCC if the powerdown
function isn’t needed. Note that all the receiver outputs
remain enabled during shutdown (see Table 2). For the
lowest power consumption during powerdown, the receivers
should also be disabled by driving the EN input high (see
next section, and Figures 2 and 3).
The ICL3221, ICL3223, and ICL3243 utilize a two pin
approach where the FORCEON and FORCEOFF inputs
TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE
RS-232
SIGNAL
PRESENT
AT
RECEIVER
INPUT?
FORCEOFF
(NOTE 3)
OR SHDN FORCEON
EN
TRANSMITTER RECEIVER
ROUTB
INVALID
INPUT
INPUT
INPUT
OUTPUTS
OUTPUTS OUTPUTS OUTPUT
MODE OF OPERATION
ICL3222, ICL3241
N.A.
L
N.A.
L
High-Z
Active
Active
N.A.
Manual Powerdown
N.A.
L
N.A.
H
High-Z
High-Z
Active
N.A.
Manual Powerdown w/Rcvr. Disabled
N.A.
H
N.A.
L
Active
Active
Active
N.A.
Normal Operation
N.A.
H
N.A.
H
Active
High-Z
Active
N.A.
Normal Operation w/Rcvr. Disabled
NO
H
H
L
Active
Active
N.A.
L
NO
H
H
H
Active
High-Z
N.A.
L
YES
H
L
L
Active
Active
N.A.
H
YES
H
L
H
Active
High-Z
N.A.
H
NO
H
L
L
High-Z
Active
N.A.
L
NO
H
L
H
High-Z
High-Z
N.A.
L
YES
L
X
L
High-Z
Active
N.A.
H
Manual Powerdown
YES
L
X
H
High-Z
High-Z
N.A.
H
Manual Powerdown w/Rcvr. Disabled
NO
L
X
L
High-Z
Active
N.A.
L
Manual Powerdown
NO
L
X
H
High-Z
High-Z
N.A.
L
Manual Powerdown w/Rcvr. Disabled
NO
H
H
N.A.
Active
Active
Active
L
Normal Operation
(Auto Powerdown Disabled)
YES
H
L
N.A.
Active
Active
Active
H
Normal Operation
(Auto Powerdown Enabled)
NO
H
L
N.A.
High-Z
Active
Active
L
Powerdown Due to Auto Powerdown
Logic
YES
L
X
N.A.
High-Z
High-Z
Active
H
Manual Powerdown
NO
L
X
N.A.
High-Z
High-Z
Active
L
Manual Powerdown
ICL3221, ICL3223
Normal Operation
(Auto Powerdown Disabled)
Normal Operation
(Auto Powerdown Enabled)
Powerdown Due to Auto Powerdown
Logic
ICL3243
NOTE:
3. Applies only to the ICL3241 and ICL3243.
10
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
The INVALID output always indicates whether or not a valid
RS-232 signal is present at any of the receiver inputs (see
Table 2), giving the user an easy way to determine when the
interface block should power down. In the case of a
disconnected interface cable where all the receiver inputs
are floating (but pulled to GND by the internal receiver pull
down resistors), the INVALID logic detects the invalid levels
and drives the output low. The power management logic
then uses this indicator to power down the interface block.
Reconnecting the cable restores valid levels at the receiver
inputs, INVALID switches high, and the power management
logic wakes up the interface block. INVALID can also be
used to indicate the DTR or RING INDICATOR signal, as
long as the other receiver inputs are floating, or driven to
GND (as in the case of a powered down driver). Connecting
FORCEOFF and FORCEON together disables the
automatic powerdown feature, enabling them to function as
a manual SHUTDOWN input (see Figure 4).
VCC
FORCEON
INVALID
ICL3221/23/43
I/O
UART
CPU
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
With any of the above control schemes, the time required to
exit powerdown, and resume transmission is only 100µs. A
mouse, or other application, may need more time to wake up
from shutdown. If automatic powerdown is being utilized, the
RS-232 device will reenter powerdown if valid receiver levels
aren’t reestablished within 30µs of the ICL32XX powering
up. Figure 5 illustrates a circuit that keeps the ICL32XX from
initiating automatic powerdown for 100ms after powering up.
This gives the slow-to-wake peripheral circuit time to
reestablish valid RS-232 output levels.
VCC
CURRENT
FLOW
VCC
FORCEOFF
PWR
MGT
LOGIC
VOUT = VCC
Rx
POWERED
DOWN
UART
Tx
SHDN = GND
GND
OLD
RS-232 CHIP
POWER
MANAGEMENT
UNIT
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
MASTER POWERDOWN LINE
0.1µF
FORCEOFF
1MΩ
FORCEON
ICL3221/23/43
VCC
FIGURE 5. CIRCUIT TO PREVENT AUTO POWERDOWN FOR
100ms AFTER FORCED POWERUP
TRANSITION
DETECTOR
TO
WAKE-UP
LOGIC
ICL324X
Automatic Powerdown (ICL3221/23/43 Only)
VCC
R2OUTB
RX
POWERED
DOWN
UART
VOUT = HI-Z
R2OUT
TX
R2IN
T1IN
T1OUT
FORCEOFF = GND
OR SHDN = GND, EN = VCC
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
11
Even greater power savings is available by using the devices
which feature an automatic powerdown function. When no
valid RS-232 voltages (see Figure 6) are sensed on any
receiver input for 30µs, the charge pump and transmitters
powerdown, thereby reducing supply current to 1µA. Invalid
receiver levels occur whenever the driving peripheral’s
outputs are shut off (powered down) or when the RS-232
interface cable is disconnected. The ICL32XX powers back
up whenever it detects a valid RS-232 voltage level on any
receiver input. This automatic powerdown feature provides
additional system power savings without changes to the
existing operating system.
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
due to a receiver output forward biasing the protection diode,
when driving the input of a powered down (VCC = GND)
peripheral (see Figure 2). The enable input has no effect on
transmitter nor monitor (R OUTB) outputs.
VALID RS-232 LEVEL - ICL32XX IS ACTIVE
2.7V
INDETERMINATE - POWERDOWN MAY OR
MAY NOT OCCUR
Capacitor Selection
0.3V
INVALID LEVEL - POWERDOWN OCCURS AFTER 30µs
-0.3V
INDETERMINATE - POWERDOWN MAY OR
MAY NOT OCCUR
-2.7V
VALID RS-232 LEVEL - ICL32XX IS ACTIVE
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
Automatic powerdown operates when the FORCEON input
is low, and the FORCEOFF input is high. Tying FORCEON
high disables automatic powerdown, but manual powerdown
is always available via the overriding FORCEOFF input.
Table 2 summarizes the automatic powerdown functionality.
Devices with the automatic powerdown feature include an
INVALID output signal, which switches low to indicate that
invalid levels have persisted on all of the receiver inputs for
more than 30µs (see Figure 7). INVALID switches high 1µs
after detecting a valid RS-232 level on a receiver input.
INVALID operates in all modes (forced or automatic
powerdown, or forced on), so it is also useful for systems
employing manual powerdown circuitry. When automatic
powerdown is utilized, INVALID = 0 indicates that the
ICL32XX is in powerdown mode.
RECEIVER
INPUTS
INVALID
} REGION
TRANSMITTER
OUTPUTS
INVALID
OUTPUT
VCC
tINVL
tINVH
0
PWR UP
AUTOPWDN
V+
VCC
0
V-
FIGURE 7. AUTOMATIC POWERDOWN AND INVALID
TIMING DIAGRAMS
The time to recover from automatic powerdown mode is
typically 100µs.
Receiver ENABLE Control (ICL3221/22/23/41 Only)
Several devices also feature an EN input to control the
receiver outputs. Driving EN high disables all the inverting
(standard) receiver outputs placing them in a high
impedance state. This is useful to eliminate supply current,
12
The charge pumps require 0.1µF capacitors for 3.3V
operation. For other supply voltages refer to Table 3 for
capacitor values. Do not use values smaller than those listed
in Table 3. Increasing the capacitor values (by a factor of 2)
reduces ripple on the transmitter outputs and slightly
reduces power consumption. C2, C3, and C4 can be
increased without increasing C1’s value, however, do not
increase C1 without also increasing C2, C3, and C4 to
maintain the proper ratios (C1 to the other capacitors).
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
TABLE 3. REQUIRED CAPACITOR VALUES
VCC
(V)
C1
(µF)
C2, C 3, C4
(µF)
3.0 to 3.6
0.1
0.1
4.5 to 5.5
0.047
0.33
3.0 to 5.5
0.1
0.47
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple VCC to ground with a
capacitor of the same value as the charge-pump capacitor C1.
Connect the bypass capacitor as close as possible to the IC.
Transmitter Outputs when Exiting
Powerdown
Figure 8 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
5V/DIV
at 250kbps. The static transmitters were also loaded with an
RS-232 receiver.
FORCEOFF
T1
VCC
+
0.1µF
+
2V/DIV
C1+
VCC
V+
C1
C1-
+
C3
ICL32XX
+
V-
C2+
C2
T2
C4
+
C2VCC = +3.3V
C1 - C4 = 0.1µF
TIN
TOUT
TIME (20µs/DIV.)
RIN
ROUT
FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
EN
Mouse Driveability
VCC
The ICL324X have been specifically designed to power a
serial mouse while operating from low voltage supplies.
Figure 9 shows the transmitter output voltages under
increasing load current. The on-chip switching regulator
ensures the transmitters will supply at least ±5V during worst
case conditions (15mA for paralleled V+ transmitters, 7.3mA
for single V- transmitter). The Automatic Powerdown feature
does not work with a mouse, so FORCEOFF and
FORCEON should be connected to VCC .
5k
SHDN OR
FORCEOFF
FIGURE 10. TRANSMITTER LOOPBACK TEST CIRCUIT
5V/DIV.
T1IN
T1OUT
TRANSMITTER OUTPUT VOLTAGE (V)
6
5
VOUT+
4
R1OUT
3
VCC = 3.0V
2
1
VCC = +3.3V
C1 - C4 = 0.1µF
T1
0
5µs/DIV.
VOUT+
-1
FIGURE 11. LOOPBACK TEST AT 120kbps
T2
-2
ICL3241/43
-3
-4
VCC
T3
1
2
VOUT -
VOUT -
5V/DIV.
-5
-6
0
3
5
4
6
7
8
9
10
T1IN
LOAD CURRENT PER TRANSMITTER (mA)
FIGURE 9. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CURRENT (PER TRANSMITTER, i.e., DOUBLE
CURRENT AXIS FOR TOTAL VOUT+ CURRENT)
T1OUT
High Data Rates
The ICL32XX maintain the RS-232 ±5V minimum transmitter
output voltages even at high data rates. Figure 10 details a
transmitter loopback test circuit, and Figure 11 illustrates the
loopback test result at 120kbps. For this test, all transmitters
were simultaneously driving RS-232 loads in parallel with
1000pF, at 120kbps. Figure 12 shows the loopback results
for a single transmitter driving 1000pF and an RS-232 load
13
1000pF
R1OUT
VCC = +3.3V
C1 - C4 = 0.1µF
2µs/DIV.
FIGURE 12. LOOPBACK TEST AT 250kbps
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Interconnection with 3V and 5V Logic
The ICL32XX directly interface with 5V CMOS and TTL logic
families. Nevertheless, with the ICL32XX at 3.3V, and the
logic supply at 5V, AC, HC, and CD4000 outputs can drive
ICL32XX inputs, but ICL32XX outputs do not reach the
minimum VIH for these logic families. See Table 4 for more
information.
Typical Performance Curves
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
VCC
SYSTEM
POWER-SUPPLY SUPPLY
VOLTAGE
VOLTAGE
(V)
(V)
3.3
5
5
5
3.3
Compatible with all CMOS
families.
Compatible with all TTL and
CMOS logic families.
Compatible with ACT and HCT
CMOS, and with TTL. ICL32XX
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
VCC = 3.3V, TA = 25oC
6
25
VOUT+
4
20
SLEW RATE (V/µs)
TRANSMITTER OUTPUT VOLTAGE (V)
3.3
COMPATIBILITY
2
1 TRANSMITTER AT 250kbps
1 OR 2 TRANSMITTERS AT 30kbps
0
-2
15
-SLEW
+SLEW
10
VOUT -
-4
-6
0
1000
2000
3000
4000
5
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 13. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 14. SLEW RATE vs LOAD CAPACITANCE
45
45
ICL3221
ICL3222 - ICL3232
40
40
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
250kbps
35
250kbps
30
25
20
120kbps
15
10
20kbps
5
35
30
25
120kbps
20
15
20kbps
10
5
0
0
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 15. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
14
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
FIGURE 16. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Typical Performance Curves
VCC = 3.3V, TA = 25oC (Continued)
3.5
NO LOAD
ALL OUTPUTS STATIC
45
ICL324X
250kbps
3.0
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
40
35
30
120kbps
25
20
20kbps
15
10
ICL3221 - ICL3232
2.5
2.0
1.5
1.0
ICL324X
0.5
ICL324X
5
0
0
1000
2000
3000
4000
5000
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
LOAD CAPACITANCE (pF)
FIGURE 17. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 18. SUPPLY CURRENT vs SUPPLY VOLTAGE
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
ICL3221:
73 mils x 91 mils (1850µm x 2300µm)
ICL3222/23/32:
100 mils x 100 mils (2540µm x 2540µm)
ICL3241/43:
100 mils x 127 mils (2550µm x 3230µm)
METALLIZATION:
Type: Metal 1: AISi(1%)
Thickness: Metal 1: 8kÅ
Type: Metal 2: AISi (1%)
Thickness: Metal 2: 10kÅ
Type: Silox
Thickness: 13kÅ
TRANSISTOR COUNT:
ICL3221: 286
ICL3222: 338
ICL3223: 357
ICL3232: 296
ICL324X: 464
PROCESS:
Si Gate CMOS
SUBSTRATE POTENTIAL (POWERED UP):
GND
15
6.0
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Dual-In-Line Plastic Packages (PDIP)
E16.3 (JEDEC MS-001-BB ISSUE D)
N
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
1 2 3
INCHES
N/2
-B-
-AE
D
BASE
PLANE
-C-
A2
SEATING
PLANE
A
L
D1
e
B1
D1
A1
eC
B
0.010 (0.25) M C A B S
MILLIMETERS
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.15
1.77
8, 10
eA
C
0.008
0.014
C
D
0.735
0.775
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
0.005
-
0.13
-
5
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
eA
0.300 BSC
eB
-
4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3.
L
0.115
N
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
16
5
E
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
7. eB and eC are measured at the lead tips with the leads unconstrained.
eC must be zero or greater.
0.355
19.68
D1
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
0.204
18.66
16
2.54 BSC
7.62 BSC
0.430
-
0.150
2.93
10.92
3.81
16
6
7
4
9
Rev. 0 12/93
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Dual-In-Line Plastic Packages (PDIP)
E18.3 (JEDEC MS-001-BC ISSUE D)
N
18 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
1 2 3
INCHES
N/2
SYMBOL
-B-AE
D
BASE
PLANE
-C-
A2
SEATING
PLANE
A
L
D1
e
B1
D1
A1
eC
B
0.010 (0.25) M C A B S
MILLIMETERS
MIN
MAX
MIN
MAX
NOTES
A
-
A1
0.015
0.210
-
5.33
4
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.15
1.77
8, 10
eA
C
0.008
0.014
0.204
0.355
-
C
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
D
0.845
0.880
D1
0.005
-
21.47
0.13
22.35
-
5
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2.54 BSC
-
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
eA
0.300 BSC
7.62 BSC
6
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
eB
-
0.430
-
10.92
7
L
0.115
0.150
2.93
3.81
4
4. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
7. eB and eC are measured at the lead tips with the leads unconstrained.
eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
17
N
18
18
9
Rev. 0 12/93
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Dual-In-Line Plastic Packages (PDIP)
E20.3 (JEDEC MS-001-AD ISSUE D)
N
20 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
1 2 3
INCHES
N/2
SYMBOL
-B-AE
D
BASE
PLANE
-C-
A2
SEATING
PLANE
A
L
D1
e
B1
D1
A1
eC
B
0.010 (0.25) M C A B S
MAX
MIN
MAX
NOTES
A
-
A1
0.015
0.210
-
5.33
4
-
0.39
-
4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
C
L
B1
0.045
0.070
1.55
1.77
8
eA
C
0.008
0.014
0.204
0.355
-
C
eB
NOTES:
11. Controlling Dimensions: INCH. In case of conflict between English
and Metric dimensions, the inch dimensions control.
12. Dimensioning and tolerancing per ANSI Y14.5M-1982.
13. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication No. 95.
14. Dimensions A, A1 and L are measured with the package seated in
JEDEC seating plane gauge GS-3.
15. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
16. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
17. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater.
18. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm).
19. N is the maximum number of terminal positions.
20. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
18
MILLIMETERS
MIN
D
0.980
1.060
24.89
26.9
5
D1
0.005
-
0.13
-
5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
6
eB
-
0.430
-
10.92
7
L
0.115
0.150
2.93
3.81
4
N
20
20
9
Rev. 0 12/93
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Small Outline Plastic Packages (SOIC)
M16.15 (JEDEC MS-012-AC ISSUE C)
N
INDEX
AREA
0.25(0.010) M
H
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
B M
E
INCHES
-B-
1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
µα
e
A1
B
0.25(0.010) M
0.10(0.004)
C A M
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.3859
0.3937
9.80
10.00
3
E
0.1497
0.1574
3.80
4.00
4
e
C
B S
0.050 BSC
21. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
22. Dimensioning and tolerancing per ANSI Y14.5M-1982.
23. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
24. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
25. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
26. “L” is the length of terminal for soldering to a substrate.
27. “N” is the number of terminal positions.
28. Terminal numbers are shown for reference only.
29. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
30. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
19
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
N
NOTES:
MILLIMETERS
α
16
0o
1.27
16
8o
0o
6
7
8o
Rev. 0 12/93
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Thin Shrink Small Outline Plastic Packages (TSSOP)
M16.173
N
INDEX
AREA
E
0.25(0.010) M
E1
2
INCHES
GAUGE
PLANE
-B1
16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
B M
3
L
0.05(0.002)
-A-
SEATING PLANE
A
D
-C-
α
e
A2
A1
b
0.10(0.004) M
0.25
0.010
c
0.10(0.004)
C A M
B S
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.047
-
1.20
-
A1
0.002
0.006
0.05
0.15
-
A2
0.031
0.051
0.80
1.05
-
b
0.0075
0.0118
0.19
0.30
9
c
0.0035
0.0079
0.09
0.20
-
D
0.193
0.201
4.90
5.10
3
E1
0.169
0.177
4.30
4.50
4
e
0.026 BSC
E
0.246
L
0.0177
N
α
NOTES:
31. These package dimensions are within allowable dimensions of
JEDEC MO-153-AB, Issue E.
32. Dimensioning and tolerancing per ANSI Y14.5M-1982.
33. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
34. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
35. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
36. “L” is the length of terminal for soldering to a substrate.
37. “N” is the number of terminal positions.
38. Terminal numbers are shown for reference only.
39. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch).
40. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
20
MILLIMETERS
0.65 BSC
0.256
6.25
0.0295
0.45
16
0o
6.50
0.75
16
8o
0o
6
7
8o
Rev. 0 6/98
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Small Outline Plastic Packages (SSOP)
M16.209 (JEDEC MO-150-AC ISSUE B)
16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
N
INDEX
AREA
0.25(0.010) M
H
B M
INCHES
E
-B1
2
SYMBOL
GAUGE
PLANE
3
L
0.25
0.010
SEATING PLANE
-A-
A
D
-C-
µα
e
B
0.25(0.010) M
C
0.10(0.004)
C A M
MAX
A
-
A1
0.002
B S
MAX
NOTES
0.078
-
2.00
-
-
0.05
-
-
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.233
0.255
5.90
6.50
3
E
0.197
0.220
5.00
5.60
4
0.026 BSC
0.65 BSC
-
H
0.292
0.322
7.40
8.20
-
L
0.022
0.037
0.55
0.95
6
8o
0o
N
α
NOTES:
MIN
A2
e
A2
A1
MILLIMETERS
MIN
16
0o
16
7
8o
Rev. 2
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
21
3/95
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Small Outline Plastic Packages (SOIC)
M16.3 (JEDEC MS-013-AA ISSUE C)
N
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010) M
H
B M
INCHES
E
-B1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
MIN
MAX
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.3977
0.4133
10.10
10.50
3
E
0.2914
0.2992
7.40
7.60
4
e
µα
B S
11. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
12. Dimensioning and tolerancing per ANSI Y14.5M-1982.
13. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
14. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
15. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
16. “L” is the length of terminal for soldering to a substrate.
17. “N” is the number of terminal positions.
18. Terminal numbers are shown for reference only.
19. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
20. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
22
0.050 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
8o
0o
N
α
NOTES:
MILLIMETERS
SYMBOL
16
0o
16
7
8o
Rev. 0 12/93
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Small Outline Plastic Packages (SOIC)
M18.3 (JEDEC MS-013-AB ISSUE C)
N
18 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010) M
H
B M
INCHES
E
-B1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
MIN
MAX
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.4469
0.4625
11.35
11.75
3
E
0.2914
0.2992
7.40
7.60
4
e
µα
B S
21. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
22. Dimensioning and tolerancing per ANSI Y14.5M-1982.
23. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
24. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
25. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
26. “L” is the length of terminal for soldering to a substrate.
27. “N” is the number of terminal positions.
28. Terminal numbers are shown for reference only.
29. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
30. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
23
0.050 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.010
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
8o
0o
N
α
NOTES:
MILLIMETERS
SYMBOL
18
0o
18
7
8o
Rev. 0 12/93
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Thin Shrink Small Outline Plastic Packages (TSSOP)
M20.173
N
INDEX
AREA
E
0.25(0.010) M
E1
2
INCHES
GAUGE
PLANE
-B1
20 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
B M
3
L
0.05(0.002)
-A-
SEATING PLANE
A
D
-C-
α
e
A2
A1
b
0.10(0.004) M
0.25
0.010
c
0.10(0.004)
C A M
B S
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.047
-
1.20
-
A1
0.002
0.006
0.05
0.15
-
A2
0.031
0.051
0.80
1.05
-
b
0.0075
0.0118
0.19
0.30
9
c
0.0035
0.0079
0.09
0.20
-
D
0.252
0.260
6.40
6.60
3
E1
0.169
0.177
4.30
4.50
4
e
0.026 BSC
E
0.246
L
0.0177
N
α
NOTES:
31. These package dimensions are within allowable dimensions of
JEDEC MO-153-AC, Issue E.
32. Dimensioning and tolerancing per ANSI Y14.5M-1982.
33. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
34. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
35. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
36. “L” is the length of terminal for soldering to a substrate.
37. “N” is the number of terminal positions.
38. Terminal numbers are shown for reference only.
39. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch).
40. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
24
MILLIMETERS
0.65 BSC
0.256
6.25
0.0295
0.45
20
0o
6.50
0.75
20
8o
0o
6
7
8o
Rev. 1 6/98
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Shrink Small Outline Plastic Packages (SSOP)
M20.209 (JEDEC MO-150-AE ISSUE B)
20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
N
INDEX
AREA
0.25(0.010) M
H
B M
INCHES
E
-B1
2
SYMBOL
GAUGE
PLANE
3
L
0.25
0.010
SEATING PLANE
-A-
A
D
-C-
µα
e
B
0.25(0.010) M
C
0.10(0.004)
C A M
MAX
A
-
A1
0.002
B S
41. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
42. Dimensioning and tolerancing per ANSI Y14.5M-1982.
43. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
44. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch)
per side.
45. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.
46. “L” is the length of terminal for soldering to a substrate.
47. “N” is the number of terminal positions.
48. Terminal numbers are shown for reference only.
49. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B”
dimension at maximum material condition.
50. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
25
MAX
NOTES
0.078
-
2.00
-
-
0.05
-
-
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.272
0.295
6.90
7.50
3
E
0.197
0.220
5.00
5.60
4
0.026 BSC
0.65 BSC
-
H
0.292
0.322
7.40
8.20
-
L
0.022
0.037
0.55
0.95
6
8o
0o
N
α
NOTES:
MIN
A2
e
A2
A1
MILLIMETERS
MIN
20
0o
20
7
8o
Rev. 2 4/95
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Thin Shrink Small Outline Plastic Packages (TSSOP)
M28.173
N
INDEX
AREA
E
0.25(0.010) M
E1
2
INCHES
GAUGE
PLANE
-B1
28 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
B M
3
L
0.05(0.002)
-A-
SEATING PLANE
A
D
-C-
α
e
A2
A1
b
0.10(0.004) M
0.25
0.010
c
0.10(0.004)
C A M
B S
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
-
0.047
-
1.20
-
A1
0.002
0.006
0.05
0.15
-
A2
0.031
0.051
0.80
1.05
-
b
0.0075
0.0118
0.19
0.30
9
c
0.0035
0.0079
0.09
0.20
-
D
0.378
0.386
9.60
9.80
3
E1
0.169
0.177
4.30
4.50
4
e
0.026 BSC
E
0.246
L
0.0177
N
α
NOTES:
51. These package dimensions are within allowable dimensions of
JEDEC MO-153-AE, Issue E.
52. Dimensioning and tolerancing per ANSI Y14.5M-1982.
53. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
54. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
55. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
56. “L” is the length of terminal for soldering to a substrate.
57. “N” is the number of terminal positions.
58. Terminal numbers are shown for reference only.
59. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch).
60. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
26
MILLIMETERS
0.65 BSC
0.256
6.25
0.0295
0.45
28
0o
6.50
0.75
28
8o
0o
6
7
8o
Rev. 0 6/98
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Shrink Small Outline Plastic Packages (SSOP)
M28.209 (JEDEC MO-150-AH ISSUE B)
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
N
INDEX
AREA
0.25(0.010) M
H
B M
INCHES
E
-B1
2
SYMBOL
GAUGE
PLANE
3
L
0.25
0.010
SEATING PLANE
-A-
A
D
-C-
µα
e
B
0.25(0.010) M
C
0.10(0.004)
C A M
MAX
A
-
A1
0.002
B S
61. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
62. Dimensioning and tolerancing per ANSI Y14.5M-1982.
63. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
64. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
65. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
66. “L” is the length of terminal for soldering to a substrate.
67. “N” is the number of terminal positions.
68. Terminal numbers are shown for reference only.
69. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
“B” dimension at maximum material condition.
70. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
27
MAX
NOTES
0.078
-
2.00
-
-
0.05
-
-
0.065
0.072
1.65
1.85
-
B
0.009
0.014
0.22
0.38
9
C
0.004
0.009
0.09
0.25
-
D
0.390
0.413
9.90
10.50
3
E
0.197
0.220
5.00
5.60
4
0.026 BSC
0.65 BSC
-
H
0.292
0.322
7.40
8.20
-
L
0.022
0.037
0.55
0.95
6
8o
0o
N
α
NOTES:
MIN
A2
e
A2
A1
MILLIMETERS
MIN
28
0o
28
7
8o
Rev. 1 3/95
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Small Outline Plastic Packages (SOIC)
M28.3 (JEDEC MS-013-AE ISSUE C)
N
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
0.25(0.010) M
H
B M
INCHES
E
-B1
2
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
MIN
MAX
MIN
MAX
NOTES
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.6969
0.7125
17.70
18.10
3
E
0.2914
0.2992
7.40
7.60
4
e
µα
B S
0.05 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.01
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
8o
0o
N
α
NOTES:
MILLIMETERS
SYMBOL
28
0o
28
7
8o
Rev. 0 12/93
71. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
72. Dimensioning and tolerancing per ANSI Y14.5M-1982.
73. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
74. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
75. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
76. “L” is the length of terminal for soldering to a substrate.
77. “N” is the number of terminal positions.
78. Terminal numbers are shown for reference only.
79. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
80. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable.
However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its
use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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28
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