LTC1069-6 Single Supply, Very Low Power, Elliptic Lowpass Filter U DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 8th Order Elliptic Filter in SO-8 Package Single 3V Operation: Supply Current: 1mA (Typ) fCUTOFF: 14kHz (Max) S/N Ratio: 72dB Single 5V Operation: Supply Current: 1.2mA (Typ) fCUTOFF: 20kHz (Max) S/N Ratio: 79dB ±0.1dB Passband Ripple Up to 0.9fCUTOFF (Typ) 42dB Attenuation at 1.3fCUTOFF 66dB Attenuation at 2.0fCUTOFF 70dB Attenuation at 2.1fCUTOFF Wide Dynamic Range, 75dB or More (S/N + THD), Under Single 5V Operation Wideband Noise: 120µVRMS Clock-to-fCUTOFF Ratio: 50:1 Internal Sample Rate: 100:1 U APPLICATIONS ■ ■ ■ ■ ■ ■ The LTC®1069-6 is a monolithic low power, 8th order lowpass filter optimized for single 3V or single 5V supply operation. The LTC1069-6 typically consumes 1mA under single 3V supply operation and 1.2mA under 5V operation. The cutoff frequency of the LTC1069-6 is clock tunable and it is equal to the clock frequency divided by 50. The input signal is sampled twice per clock cycle to lower the risk of aliasing. The typical passband ripple is ±0.1dB up to 0.9fCUTOFF. The gain at fCUTOFF is – 0.7dB. The transition band of the LTC1069-6 features progressive attenuation reaching 42dB at 1.3fCUTOFF and 70dB at 2.1fCUTOFF. The maximum stopband attenuation is 72dB. The LTC1069-6 can be clock tuned for cutoff frequencies up to 20kHz (single 5V supply) and for cutoff frequencies up to 14kHz (single 3V supply). The low power feature of the LTC1069-6 does not penalize the device’s dynamic range. With single 5V supply and an input range of 0.4VRMS to 1.4VRMS, the Signal-to-(Noise + THD) ratio is ≥ 70dB. The wideband noise of the LTC1069-6 is 125µVRMS. Handheld Instruments Telecommunication Filters Antialiasing Filters Smoothing Filters Audio Multimedia Other filter responses with higher speed can be obtained. Please contact LTC Marketing for details. The LTC1069-6 is available in an 8-pin SO package. , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATION Frequency Response 10 Single 3V Supply 10kHz Elliptic Lowpass Filter VIN = 500mVRMS 0 –10 AGND VOUT –20 V+ 0.1µF GAIN (dB) 3V 0.47µF V– LTC1069-6 NC NC –30 –40 –50 VIN CLK fCLK = 500kHz –60 1069-6 TA01 –70 –80 5 10 20 15 FREQUENCY (kHz) 25 1069-6 TA02 1 LTC1069-6 W U U W W W Total Supply Voltage (V + to V –) .............................. 12V Operating Temperature Range LTC1069-6C ............................................ 0°C to 70°C LTC1069-6I ........................................ – 40°C to 85°C Storage Temperature ............................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C U ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION ORDER PART NUMBER TOP VIEW AGND 1 8 VOUT V+ 2 7 V– NC 3 6 NC VIN 4 5 CLK LTC1069-6CS8 LTC1069-6IS8 S8 PART MARKING S8 PACKAGE 8-LEAD PLASTIC SO 10696 10696I TJMAX = 125°C, θJA = 110°C/ W Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS fCUTOFF is the filter’s cutoff frequency and is equal to fCLK/50. The fCLK signal level is TTL or CMOS (clock rise or fall time ≤ 1µs) RL = 10k, VS = 5V, TA = 25°C, unless otherwise specified. All AC gains are measured relative to the passband gain. PARAMETER CONDITIONS Passband Gain (fIN ≤ 0.2fCUTOFF) VS = 5V, fCLK = 200kHz fTEST = 0.25kHz, VIN = 1VRMS Gain at 0.50fCUTOFF Gain at 0.75fCUTOFF Gain at 0.90fCUTOFF Gain at 0.95fCUTOFF Gain at fCUTOFF Gain at 1.30fCUTOFF 2 MIN TYP MAX UNITS ● – 0.25 – 0.30 0.1 0.1 0.45 0.50 dB dB VS = 3V, fCLK = 200kHz fTEST = 0.25kHz, VIN = 0.5VRMS ● – 0.25 – 0.30 0.1 0.1 0.45 0.50 dB dB VS = 5V, fCLK = 200kHz fTEST = 2.0kHz, VIN = 1VRMS ● – 0.10 – 0.15 0.07 0.07 0.25 0.30 dB dB VS = 3V, fCLK = 200kHz fTEST = 2.0kHz, VIN = 0.5VRMS ● – 0.15 – 0.20 0.07 0.07 0.25 0.30 dB dB VS = 5V, fCLK = 200kHz fTEST = 3.0kHz, VIN = 1VRMS ● – 0.25 – 0.30 0 0 0.25 0.30 dB dB VS = 3V, fCLK = 200kHz fTEST = 3.0kHz, VIN = 0.5VRMS ● – 0.25 – 0.30 0 0 0.25 0.30 dB dB VS = 5V, fCLK = 200kHz fTEST = 3.6kHz, VIN = 1VRMS ● – 0.25 – 0.25 0.1 0.1 0.45 0.45 dB dB VS = 3V, fCLK = 200kHz fTEST = 3.6kHz, VIN = 0.5VRMS ● – 0.25 – 0.30 0.1 0.1 0.45 0.50 dB dB VS = 5V, fCLK = 200kHz fTEST = 3.8kHz, VIN = 1VRMS ● – 0.35 – 0.45 0.05 0.05 0.25 0.25 dB dB VS = 3V, fCLK = 200kHz fTEST = 3.8kHz, VIN = 0.5VRMS ● – 0.45 – 0.55 0.05 0.05 0.25 0.35 dB dB VS = 5V, fCLK = 200kHz fTEST = 4.0kHz, VIN = 1VRMS ● – 1.50 – 0.07 – 1.65 – 0.07 – 0.20 – 0.25 dB dB VS = 3V, fCLK = 200kHz fTEST = 4.0kHz, VIN = 0.5VRMS ● – 1.5 – 1.7 – 0.07 – 0.07 0 0 dB dB VS = 5V, fCLK = 200kHz fTEST = 5.2kHz, VIN = 1VRMS ● – 42 – 42 – 40 – 39 dB dB VS = 3V, fCLK = 200kHz fTEST = 5.2kHz, VIN = 0.5VRMS ● – 41 – 41 – 38 – 37 dB dB LTC1069-6 ELECTRICAL CHARACTERISTICS fCUTOFF is the filter’s cutoff frequency and is equal to fCLK/50. The fCLK signal level is TTL or CMOS (clock rise or fall time ≤ 1µs) RL = 10k, VS = 5V, TA = 25°C, unless otherwise specified. All AC gains are measured relative to the passband gain. PARAMETER CONDITIONS MIN Gain at 2.00fCUTOFF VS = 5V, fCLK = 200kHz fTEST = 8.0kHz, VIN = 1VRMS VS = 3V, fCLK = 200kHz fTEST = 8.0kHz, VIN = 0.5VRMS Gain at 0.95fCUTOFF VS = 5V, fCLK = 400kHz, fTEST = 7.6kHz, VIN = 1VRMS VS = 3V, fCLK = 400kHz, fTEST = 7.6kHz, VIN = 0.5VRMS Output DC Offset (Note 1) VS = 5V, fCLK = 100kHz VS = 3V, fCLK = 100kHz Output DC Offset Tempco VS = 5V, VS = 3V Output Voltage Swing (Note 2) VS = 5V, fCLK = 100kHz TYP MAX UNITS ● –66 –66 –61 –60 dB dB ● –66 –66 –60 –59 dB dB 0.15 0 0.5 0.5 dB dB 50 30 175 135 mV mV – 0.5 – 0.5 30 µV/°C ● 3.4 3.2 4.2 4.2 VP-P VP-P ● 1.6 1.5 2.0 2.0 VP-P VP-P VS = 3V, fCLK = 100kHz Power Supply Current VS = 5V, fCLK = 100kHz 1.2 1.60 1.65 mA mA 1.0 1.40 1.55 mA mA ● VS = 3V, fCLK = 100kHz ● Maximum Clock Frequency VS = 5V VS = 3V 1.0 0.7 Input Frequency Range 0 Input Resistance 35 Operating Supply Voltage (Note 3) 3 The ● denotes specifications which apply over the full operating temperature range. Note 1: The input offset voltage is measured with respect to AGND (Pin 1). The input (Pin 4) is also shorted to the AGND pin. The analog ground pin potential is internally set to (0.437)(VSUPPLY). MHz MHz <(fCLK – 2fC) 50 80 kΩ 10 V Note 2: The input voltage can swing to either rail (V + or ground); the output typically swings 50mV from ground and 0.8V from V +. Note 3: The LTC1069-6 is optimized for 3V and 5V operation. Although the device can operate with a single 10V supply or ±5V, the total harmonic distortion will be degraded. For single 10V or ±5V supply operation we recommend to use the LTC1069-1. U W TYPICAL PERFORMANCE CHARACTERISTICS Passband Gain vs Frequency Transition Band Gain vs Frequency 2 10 VS = SINGLE 3V fCLK = 500kHz fCUTOFF = 10kHz VIN = 0.5VRMS 1 VS = SINGLE 3V fCLK = 500kHz fCUTOFF = 10kHz VIN = 0.5VRMS 0 –10 0 –1 1 3 7 5 FREQUENCY (kHz) 9 11 1069-6 G01 – 62 – 64 –30 – 40 – 50 – 68 –70 –72 – 60 –74 –70 –76 – 80 –78 – 90 – 80 10 12 16 14 FREQUENCY (kHz) 18 VS = SINGLE 3V fCLK = 500kHz fCUTOFF = 10kHz VIN = 0.5VRMS – 66 GAIN (dB) GAIN (dB) GAIN (dB) –20 –2 Stopband Gain vs Frequency – 60 20 1069-6 G02 20 40 80 60 FREQUENCY (kHz) 100 1069-6 G03 3 LTC1069-6 U W TYPICAL PERFORMANCE CHARACTERISTICS Passband Gain vs Clock Frequency 2 2 10 VS = SINGLE 3V VIN = 0.5VRMS fCLK = 500kHz fCUTOFF = 10kHz 1 3 5 –10 GAIN (db) –20 0 –1 0 –1 –2 7 9 11 13 15 17 19 21 FREQUENCY (kHz) fCLK 500kHz fCUTOFF 10kHz fCLK 750kHz fCUTOFF 15kHz – 70 fCUTOFF 20kHz – 80 3 5 7 9 11 13 15 17 19 21 FREQUENCY (kHz) VS = SINGLE 5V fCLK = 500kHz fCUTOFF = 10kHz – 450 – 540 – 630 1069-6 G06 Transient Response 3.00E-04 2.50E-04 2.00E-04 1.50E-04 1.00E-04 –720 – 900 0.00E+00 2 4 8 10 6 FREQUENCY (kHz) 12 14 0 2 4 8 6 FREQUENCY (kHz) 10 1069-6 G07 Dynamic Range THD + Noise vs Input Voltage – 40 THD + Noise vs Frequency – 40 – 40 fCLK = 170kHz – 45 fCUTOFF = 3.4kHz f = 1kHz – 50 IN THD + NOISE (dB) VIN = 2.945VP-P – 60 – 65 – 70 – 75 fCLK = 500kHz – 45 fIN = 1kHz – 50 fCLK = 500kHz – 45 fCUTOFF = 10kHz – 50 – 55 – 55 – 60 – 65 VS = SINGLE 3V VS = SINGLE 5V – 70 – 75 – 65 – 70 – 75 – 80 – 80 – 85 – 85 – 85 1 INPUT/OUTPUT VOLTAGE (VP-P) 3 1069-6 G14 – 90 0.1 VS = SINGLE 3V VIN = 0.5VRMS – 60 – 80 – 90 0.1 1069-6 G09 1069-6 G08 Dynamic Range THD + Noise vs Input/Output Voltage – 55 12 THD + NOISE (dB) 0 THD + NOISE (dB) VS = SINGLE 5V 0.1ms/DIV fCLK = 1MHz fIN = 1kHz 2VP-P SQUAREWAVE 5.00E-05 – 810 4 100 0.5V/DIV GROUP DELAY (SEC) – 360 10 FREQUENCY (kHz) VS = SINGLE 5V fCLK = 500kHz fCUTOFF = 10kHz 3.50E-04 – 270 SINGLE 3V 1 Group Delay vs Frequency 4.00E-04 –180 SINGLE 5V – 90 1 Phase vs Frequency PHASE (DEG) –50 – 60 1069-6 G05 90 – 90 – 30 – 40 fCLK 1MHz 1069-6 G04 0 fCLK = 500kHz VIN = 0.5VRMS 0 1 GAIN (dB) GAIN (dB) VS = SINGLE 5V VIN = 1VRMS fCLK = 750kHz fCUTOFF = 15kHz 1 –2 Amplitude Response vs Supply Voltage Passband Gain vs Clock Frequency VS = SINGLE 5V VIN = 1VRMS – 90 0.5 0.76 1 1.43 INPUT VOLTAGE (VRMS) 5 1069-6 G10 1 5 FREQUENCY (kHz) 10 1069-6 G11 LTC1069-6 U W TYPICAL PERFORMANCE CHARACTERISTICS Output Voltage Swing vs Temperature Supply Current vs Supply Voltage POSITIVE SWING (V) 5 3 RL = 10k VS = SINGLE 5V 4.0 2.5 VS = SINGLE 3V 2.0 85°C 25°C 2 – 40°C 1 0 0 8 6 4 10 12 14 TOTAL SUPPLY VOLTAGE (V) 2 16 NEGATIVE SWING (mV) SUPPLY CURRENT (mA) 4 4.5 80 60 VS = SINGLE 3V 40 20 VS = SINGLE 5V 0 – 40 –20 0 20 40 60 AMBIENT TEMPERATURE (°C) 1069-6 G12 80 1069-6 G13 U U U PIN FUNCTIONS AGND (Pin 1): Analog Ground. The quality of the analog signal ground can affect the filter performance. For either single or dual supply operation, an analog ground plane surrounding the package is recommended. The analog ground plane should be connected to any digital ground at a single point. For single supply operation, Pin 1 should be bypassed to the analog ground plane with a 0.47µF capacitor or larger. An internal resistive divider biases Pin 1 to 0.4366 times the total power supply of the device (Figure 1). That is, with a single 5V supply, the potential at Pin 1 is 2.183V ±1%. As the LTC1069-6 is optimized for single supply operation, the internal biasing of Pin 1 allows optimum output swing. The AGND pin should be buffered if used to bias other ICs. Figure 2 shows the connections for single supply operation. V +, V – (Pins 2, 7): Power Supply Pins. The V + (Pin 2) and the V – (Pin 7, if used) should be bypassed with a 0.1µF capacitor to an adequate analog ground. The filter’s power supplies should be isolated from other digital or high voltage analog supplies. A low noise linear supply is recommended. Switching power supplies will lower the signal-to-noise ratio of the filter. Unlike previous monolithic filters, the power supplies can be applied in any order, that is, the positive supply can be applied before the negative supply and vice versa. Figure 3 shows the connection for dual supply operation. 1 0.47µF V+ 2 AGND V+ 0.1µF 1 AGND 2 V+ VOUT V– 7 11.325k 8.775k 3 4 NC NC LTC1069-6 VIN CLK 3 8 6 5 1069-6 F01 Figure 1. Internal Biasing of the Analog Ground (Pin 1) 4 VIN VOUT V– LTC1069-6 NC NC VIN CLK 8 VOUT 7 6 5 ANALOG GROUND PLANE STAR SYSTEM GROUND DIGITAL GROUND PLANE 1k CLOCK SOURCE 1069-6 F02 Figure 2. Connections for Single Supply Operation 5 LTC1069-6 U U U PIN FUNCTIONS 1 2 V+ 0.1µF 3 4 VIN AGND VOUT V+ V– LTC1069-6 NC NC VIN CLK 8 7 VOUT V– 0.1µF 6 5 ANALOG GROUND PLANE STAR SYSTEM GROUND DIGITAL GROUND PLANE 1k CLOCK SOURCE 1069-6 F03 Figure 3. Connections for Dual Supply Operation NC (Pins 3, 6): No Connection. Pins 3 and 6 are not connected to any internal circuitry; they should be tied to ground. VIN (Pin 4): Filter Input Pin. The Filter Input pin is internally connected to the inverting input of an op amp through a 50k resistor. CLK (Pin 5): Clock Input Pin. Any TTL or CMOS clock source with a square wave output and 50% duty cycle (±10%) is an adequate clock source for the device. The power supply for the clock source should not necessarily be the filter’s power supply. The analog ground of the filter should be connected to the clock’s ground at a single point only. Table 1 shows the clock’s low and high level threshold value for a dual or single supply operation. A pulse generator can be used as a clock source provided the high level ON time is greater than 0.42µs (VS = ±5V). Sine waves less than 100kHz are not recommended for clock frequencies because, excessive slow clock rise or fall times generate internal clock jitter. The maximum clock rise or fall time is 1µs. The clock signal should be routed from the right side of the IC package to avoid coupling into any input or output analog signal path. A 1k resistor between the clock source and the Clock Input (Pin 5) will slow down the rise and fall times of the clock to further reduce charge coupling (Figure 1). Table 1. Clock Source High and Low Thresholds POWER SUPPLY HIGH LEVEL LOW LEVEL Dual Supply = ±5V 1.5V 0.5V Single Supply = 10V 6.5V 5.5V Single Supply = 5V 1.5V 0.5V Single Supply = 3.3V 1.2V 0.5V VOUT (Pin 8): Filter Output Pin. Pin 8 is the output of the filter, and it can source 8mA or sink 1mA. The total harmonic distortion of the filter will degrade when driving coaxial cables or loads less than 20k without an output buffer. U W U U APPLICATIONS INFORMATION 2 Temperature Behavior 1 GAIN (dB) The power supply current of the LTC1069-6 has a positive temperature coefficient. The GBW product of its internal op amps is nearly constant and the speed of the device does not degrade at high temperatures. Figures 4a, 4b and 4c show the behavior of the passband of the device for various supplies and temperatures. The filter has a passband behavior which is temperature independent. VS = SINGLE 3V VIN = 0.5VRMS 85°C 0 – 40°C fCLK = 500kHz fCUTOFF = 10kHz –1 –2 1 3 5 7 9 11 13 15 17 19 21 FREQUENCY (kHz) 1069-6 F04a Figure 4a 6 LTC1069-6 U U W U APPLICATIONS INFORMATION 2 quency contents much higher than the applied clock; their amplitude strongly depends on scope probing techniques as well as grounding and power supply bypassing. The clock feedthrough can be reduced by adding a single RC lowpass filter at the Output (Pin 8). VS = SINGLE 5V VIN = 1VRMS GAIN (dB) 1 85°C 0 – 40°C –2 Wideband Noise fCLK = 750kHz fCUTOFF = 15kHz –1 1 3 5 7 9 11 13 15 17 19 21 FREQUENCY (kHz) 1069-6 F04a Figure 4b 2 VS = ± 5V VIN = 1.5VRMS GAIN (dB) 1 The wideband noise of the filter is the total RMS value of the device’s noise spectral density and determines the operating signal-to-noise ratio. The frequency contents of the wideband noise lie within the filter’s passband. The wideband noise cannot be reduced by adding post filtering. The total wideband noise is nearly independent of the clock frequency and depends slightly on the power supply voltage (see Table 3). The clock feedthrough specifications are not part of the wideband noise. Table 3. Wideband Noise 85°C 0 – 40°C fCLK = 1MHz fCUTOFF = 20kHz –1 –2 1 4 7 10 13 16 19 22 25 28 31 FREQUENCY (kHz) 1069-6 F04c Figure 4c Clock Feedthrough The clock feedthrough is defined as the RMS value of the clock frequency and its harmonics that are present at the filter’s Output (Pin 8). The clock feedthrough is tested with the Input (Pin 4) shorted to AGND (Pin 1) and depends on PC board layout and on the value of the power supplies. With proper layout techniques the values of the clock feedthrough are shown in Table 2. Table 2. Clock Feedthrough VS WIDEBAND NOISE 3.3V 118µVRMS 5V 123µVRMS ±5V 127µVRMS Aliasing Aliasing is an inherent phenomenon of sampled data systems and occurs for input frequencies approaching the sampling frequency. The internal sampling frequency of the LTC1069-6 is 100 times its cutoff frequency. For instance, if a 98.5kHz, 100mVRMS signal is applied at the input of an LTC1069-6 operating with a 50kHz clock, a 1.5kHz, 484µVRMS alias signal will appear at the filter output. Table 4 shows details. Table 4. Aliasing (fCLK = 50kHz) INPUT FREQUENCY (VIN = 1VRMS) (kHz) OUTPUT LEVEL (Relative to Input) (dB) OUTPUT FREQUENCY (Aliased Frequency) (kHz) fCLK/fC = 50:1, fCUTOFF = 1kHz VS CLOCK FEEDTHROUGH 3.3V 100µVRMS 96 (or 104) –78.3 4.0 5V 170µVRMS 97 (or 103) –70.4 3.0 10V 350µVRMS Any parasitic switching transients during the rising and falling edges of the incoming clock are not part of the clock feedthrough specifications. Switching transients have fre- 98 (or 102) – 80.6 2.0 98.5 (or 101.5) – 46.3 1.5 99 (or 101) – 2.8 1.0 99.5 (or 100.5) – 1.38 0.5 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7 LTC1069-6 U TYPICAL APPLICATIONS Single 3V Supply Operation with Output Buffer Single 5V Operation with Power Shutdown 3.3V 5V ON SHUTDOWN 1 AGND 0.1µF 8 VOUT VOUT 7 V– V+ LTC1069-6 3 6 NC NC 0.1µF VIN 4 VIN 0.47µF 7 V– V+ LTC1069-6 3 6 NC NC 6 fCLK ≤ 750kHz 5V 0V AGND VOUT 2 0.1µF 5 CLK 8 1 2 0.47µF 5 VIN 4 VIN 8 1/2 LT1366 fCLK 500kHz 5 CLK + 1069-6 TA03 – 3.3V 0V 7 VOUT 4 1069-6 TA04 Single 3V Supply Voice Band Lowpass Filter with Rail-to-Rail Input and Output 3V 8 5 7 V– V+ LTC1069-6 3 6 NC NC 6 1 1µF 3V 0.1µF 3 270pF VIN CLK 5 0.1µF 8 + 1/2 LT1366 7 – 10k 170kHz 1069-6 TA05 40.2k – 1/2 LT1366 10k VOUT 2 4 2 AGND + 1 4 40.2k U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.053 – 0.069 (1.346 – 1.752) 8 0.004 – 0.010 (0.101 – 0.254) 7 6 5 0°– 8° TYP 0.016 – 0.050 0.406 – 1.270 0.014 – 0.019 (0.355 – 0.483) *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.050 (1.270) BSC 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) SO8 0695 1 2 3 4 RELATED PARTS PART NUMBER LTC1068 LTC1069-1 LTC1164-5 LTC1164-6 LTC1164-7 8 DESCRIPTON Very Low Noise, High Accuracy, Quad Universal Filter Building Block Low Power, Progressive Elliptic LPF Low Power 8th Order Butterworth LPF Low Power 8th Order Elliptic LPF Low Power 8th Order Linear Phase LPF Linear Technology Corporation COMMENTS User-Configurable, SSOP Package fCLK/fC Ratio 100:1, 8-Pin SO Package fCLK/fC Ratio 100:1 and 50:1 fCLK/fC Ratio 100:1 and 50:1 fCLK/fC Ratio 100:1 and 50:1 LT/GP 1196 7K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977 LINEAR TECHNOLOGY CORPORATION 1996