RENESAS M35080FP

To all our customers
Regarding the change of names mentioned in the document, such as Mitsubishi
Electric and Mitsubishi XX, to Renesas Technology Corp.
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi
Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names
have in fact all been changed to Renesas Technology Corp. Thank you for your understanding.
Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been
made to the contents of the document, and these changes do not constitute any alteration to the
contents of the document itself.
Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices
and power devices.
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DESCRIPTION
PIN CONFIGURATION (TOP VIEW)
LP 1
AC 3
23 VDD2
22 ROUT/G2
CS 4
21 GOUT/G1
SCK 5
SIN 6
TCK 7
FEATURES
• Pixel composition ............ Eight kinds (Can be chosen from the following)
•
•
•
•
•
•
•
........................ horizontal 128 dots ✕ verical 96 dots ✕ 2 pages
........................ horizontal 192 dots ✕ verical 64 dots ✕ 2 pages
........................ horizontal 256 dots ✕ verical 48 dots ✕ 2 pages
........................ horizontal 384 dots ✕ verical 32 dots ✕ 2 pages
........................ horizontal 32 dots ✕ verical 384 dots ✕ 2 pages
........................ horizontal 48 dots ✕ verical 256 dots ✕ 2 pages
........................ horizontal 64 dots ✕ verical 192 dots ✕ 2 pages
........................ horizontal 96 dots ✕ verical 128 dots ✕ 2 pages
RGB output ....................................................................................
Analog RGB output ...................................... ROUT, GOUT,BOUT
Number of colors displayed ........................................................
double-screen display (3 bits each of RGB) : 512 colors
one-screen display (6 bits each of RGB) : 260 K colors
Digital RGB output .......................... R0 to R2, G0 to G2, B0 to B2,
Number of colors displayed ........................................................
one and double-screen display (3 bits each of RGB) : 512 colors
Bit map RAM ....................................................... 1000h to 3AFFh
.............................. 128 ✕ 96 ✕ 9 plans (R, G, B every 3 bit) ✕ 2
.................................................................. 221184 bit (27 Kbyte)
Display input frequency range .......................................................
................................... external input FOSC = 3.3 MHz to 20 MHz
Horizontal synchronous input frequency
.......................................................... H.sync = 10 kHz to 20 kHz
Output ports (Combination port output) ........................................
................. 4 ports (Switches with R0, R1, R2 and BLNK output)
DAC ................................................................. 6 bits ✕ 3 (R, G, B)
Operating voltage .................................................... 2.7 V to 3.3 V
APPLICATION
Liquid crystal display, Plasma display, Multi-scan monitor
Rev.1.0
24 NC
VSS2 2
VDD1 8
P0/BLNK 9
M35080FP
The M35080FP is a bitmap pattern display control IC can display
on the screen. Display frequency can operate in 3.3MHz to
20MHz, and is equipped with the analog RGB output (512 colors /
260k colors) and the digital RGB output (512 colors) function.
Moreover, 2 pages (horizontal 128 dot ✕ vertical 96 dots/page)
display can be simultaneously performed on 1 screen.It uses a
silicon gate CMOS process and it housed in a 24-pin shrink SOP
package.
20 BOUT/G0
19 IREF/B2
18 VG2/B1
17 VG1/B0
16 BIN
P1/R2 10
P2/R1 11
15 VSS1
14 VERT
P3/R0 12
13 HOR
Outline 24P2Q-A
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
PIN DESCRIPTION
Symbol
Pin name
Input/
Output
LP
Test output
Output
VSS2
Earthing pin
–
Function
Test pin. Open this pin.
Connect to GND.
__
Auto-clear input
Input
When “L”, this pin resets the internal IC circuit. Hysteresis input. Built-in pull-up resistor.
CS
Chip select input
Input
This is the pin for chip select input. Set “L” level at serial data transmission. Hysteresis input.
SCK
Serial clock input
Input
At CS pin is “L” level, SDA pin serial data is taken in when SCL rises. Hysteresis input. Built-in
pull-up resistor.
SIN
Serial data input
Input
This is the pin for serial input of display control register and display RAM data. Also, this pin
output acknowledge signal. Hysteresis input. Nch open-drain output.
TCK
External clock
Input
This is the pin for external clock input.
VDD1
Power pin
P0/BLNK
Port P0 output
AC
__
__
–
Output
Port P1 output
Output
Port P2 output
Output
Port P3 output
This is the output port output at analog RGB output.
Outputs R1 signal at digital RGB output.
R1
P3/R0
This is the output port output at analog RGB output.
Outputs R2 signal at digital RGB output.
R2
P2/R1
This is a general purpose port output at analog RGB output. Outputs port output or BLNK signal.
Outputs BLNK signal at digital RGB output.
BLNK
P1/R2
Digital power supply. Connect to +3V with the power pin.
Output
This is the output port output at analog RGB output.
R0
Outputs R0 signal at digital RGB output.
HOR
Horizontal synchronous signal input
Input
Input horizontal synchronous signal. (Hysteresis input.)
VERT
Vertical synchronous signal input
Input
Input vertical synchronous signal. (Hysteresis input.)
VSS1
Earthing pin
–
Connect to GND.
BIN
Test pin
–
Test pin. Connect to GND.
VG1/B0
Reference voltage
output 1
Output
B0
VG2/B1
Reference voltage
output 1
Output B0 signal at digital RGB output.
Output
B1
IREF/B2
Reference voltage
output 2
Analog B signal output
Analog G signal output
Analog R signal output
Output analog B signal at analog RGB output(Current output). Connect to load resistance.
Output G0 signal at digital RGB output.
Output
Output analog G signal at analog RGB output(Current output). Connect to load resistance.
Output G1 signal at digital RGB output.
G1
ROUT/G2
The pin connects resistors which convert voltage current at analog RGB output.
Output B2 signal at digital RGB output.
Output
G0
GOUT/G1
Use reference voltage output 2 of DAC for analog RGB output at analog RGB output. Connect
to capacitor.
Output B1 signal at digital RGB output.
Output
B2
BOUT/G0
Use reference voltage output 1 of DAC for analog RGB output at analog RGB output. Connect
to capacitor.
Output
Output analog R signal at analog RGB output(Current output). Connect to load resistance.
Output G2 signal at digital RGB output.
G2
VDD2
Power pin
–
Digital power supply. Connect to +3V with the power pin.
NC
NC
–
NC pin. Open.
2
5
6
8
SCK
SIN
VDD1
3
AC
BIN 16
2
VSS2
VSS1 15
VDD2 23
4
CS
Bit map RAM
(page A)
Data
control
circuit
Input
control
circuit
BLOCK DIAGRAM
Bit map RAM
(page B)
Display
control
register
Address
control
circuit
1
7
Shift register
Read-out
control
circuit
Timing
generator
LP
TCK
Display
control
circuit
Display position
detection circuit
H counter
Synchronous signal
switching circuit
Port output
control
circuit
18
VG2
/B1
19
IREF
/B2
VG1
/B0
17
Output control
circuit
(DAC)
14
VERT
Polality switching circuit
13
HOR
P0/BLNK
20 BOUT/G0
21 GOUT/G1
22 ROUT/G2
12 P3/R0
11 P2/R1
10 P1/R2
9
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
3
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
of the memory for page A, and the memory for page B. Registers
PAGEONA and PAGEONB perform page control at the time of
writing in data. For detail, refer to "DATA INPUT EXAMPLE".
Memory constitution is shown in Figure 1 to 10.
MEMORY CONSTITUTION
Address 0000 16 to 000716 are assigned to the display RAM, address 100016 to 3AFF16 are assigned to bitmap RAM. The internal
circuit is reset and all display control registers (address 000016 to
000716 ) are set to "0" when the AC pin level is "L". And then, bit
map RAM is not erased and be undefinited. This memory has 2page composition (an address is Page A and page B community)
Address
DAF
DAE
DAD
DAC
DAB
DAA
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
000016
–
–
–
–
–
–
–
–
–
–
–
–
–
–
000116
–
–
–
–
–
YM2
YM1
YM0 BLANK1 BLANK0 ALLON DSPON
000216
–
–
–
–
VP9
VP8
VP7
VP6
VP5
VP4
VP3
VP2
VP1
VP0
000316
–
–
–
–
HP9
HP8
HP7
HP6
HP5
HP4
HP3
HP2
HP1
HP0
000416
–
TEST
–
–
–
–
–
000516
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
000616
–
DACON
–
–
–
–
–
–
–
–
–
–
–
–
–
–
000716
–
–
–
–
–
–
–
–
VSIZE1 VSIZE0
–
–
ANADIG2 ANADIG1 ANADIG0 SYNCCK
–
DA1
DA0
PAGEONB PAGEONA
WIDTH2 WIDTH1 WIDTH0
POLV POLH MODE2 MODE1 MODE0
SBLANK3 SBLANK2 SBLANK1 SBLANK0
PTD3 PTD2 PTD1 PTD0
Fig.1 Memory constitution (Display Control register)
Note : Address 0000 16 and 000416 to 000716 are Page A and B common registers. The writing of data is made regardless of registers PAGEONA and
PAGEONB. As for addresses 000116 to 000316, register of Page A and Page B exists for every page (common to an address.)
When write data in the memory for page A, and write data in the memory for page B, set it as register PAGEONA = “1” at register PAGEONB = “1.”
When both of PAGEONA and PAGEONB are set to “1”, data can be simultaneously written in both the memory for page A, and the memory for page B.
Address 0XXX16 other than addresses 000016 to 000716 are write-protected.
4
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Dot composition (DAF to DA0)
at 128 dots ✕ 96 dots
100016
Dot 1 to 16 of line 1
100116
Dot 17 to 32 of line 1
100216
Dot 33 to 48 of line 1
100316
Dot 49 to 64 of line 1
100416
Dot 65 to 80 of line 1
100516
Dot 81 to 96 of line 1
100616
Dot 97 to 112 of line 1
100716
Dot 113 to 128 of line 1
100816
Dot 1 to 16 of line 2
100916
Dot 17 to 32 of line 2
100A16
Dot 33 to 48 of line 2
………
………
Bit map RAM (R0) data
120616
Dot 81 to 96 of line 95
120716
Dot 97 to 112 of line 95
120816
Dot 113 to 128 of line 95
12F916
Dot 1 to 16 of line 96
12FA16
Dot 17 to 32 of line 96
12FB16
Dot 33 to 48 of line 96
12FC16
Dot 49 to 64 of line 96
12FD16
Dot 65 to 80 of line 96
12FE16
Dot 81 to 96 of line 96
12FF16
Dot 97 to 112 of line 96
130016
………
unused area
13FF16
Fig.2 Memory constitution (Bit map RAM (R0))
Notes : Bit map RAM (Addresses 100016 to 3AFF16) has 2-page composition of the memory for page A, and the memory for page B.
When write data in the memory for page A, and write data in the memory for page B, set it as register PAGEONA = “1” at register PAGEONB = “1.”
When both of PAGEONA and PAGEONB are set to “1”, data can be simultaneously written in both the memory for page A, and the memory for page B.
5
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Dot composition (DAF to DA0)
at 128 dots ✕ 96 dots
140016
Dot 1 to 16 of line 1
140116
Dot 17 to 32 of line 1
………
………
Bit map RAM (R1) data
16FE16
Dot 81 to 96 of line 96
16FF16
Dot 97 to 112 of line 96
170016
………
unused area
17FF16
Fig.3 Memory constitution (Bit map RAM (R1))
Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots
180016
Dot 1 to 16 of line 1
180116
Dot 17 to 32 of line 1
………
………
Bit map RAM (R2) data
1AFE16
Dot 81 to 96 of line 96
1AFF16
Dot 97 to 112 of line 96
1B0016
………
1FFF16
Fig.4 Memory constitution (Bit map RAM (R2))
6
Dot composition (DAF to DA0)
unused area
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Dot composition (DAF to DA0)
at 128 dots ✕ 96 dots
200016
Dot 1 to 16 of line 1
200116
Dot 17 to 32 of line 1
………
………
Bit map RAM (G0) data
22FE16
Dot 81 to 96 of line 96
22FF16
Dot 97 to 112 of line 96
230016
………
unused area
23FF16
Fig.5 Memory constitution (Bit map RAM (G0))
Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Dot composition (DAF to DA0)
at 128 dots ✕ 96 dots
240016
Dot 1 to 16 of line 1
240116
Dot 17 to 32 of line 1
………
………
Bit map RAM (G1) data
26FE16
Dot 81 to 96 of line 96
26FF16
Dot 97 to 112 of line 96
270016
………
unused area
27FF16
Fig.6 Memory constitution (Bit map RAM (G1))
Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Dot composition (DAF to DA0)
at 128 dots ✕ 96 dots
280016
Dot 1 to 16 of line 1
280116
Dot 17 to 32 of line 1
………
………
Bit map RAM (G2) data
2AFE16
Dot 81 to 96 of line 96
2AFF16
Dot 97 to 112 of line 96
2B0016
………
unused area
2FFF16
Fig.7 Memory constitution (Bit map RAM (G2))
7
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address
DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Dot composition (DAF to DA0)
at 128 dots ✕ 96 dots
300016
Dot 1 to 16 of line 1
300116
Dot 17 to 32 of line 1
………
………
Bit map RAM (B0) data
32FE16
Dot 81 to 96 of line 96
32FF16
Dot 97 to 112 of line 96
330016
………
unused area
33FF16
Fig.8 Memory constitution (Bit map RAM (B0))
Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Dot composition (DAF to DA0)
at 128 dots ✕ 96 dots
340016
Dot 1 to 16 of line 1
340116
Dot 17 to 32 of line 1
………
………
Bit map RAM (B1) data
36FE16
Dot 81 to 96 of line 96
36FF16
Dot 97 to 112 of line 96
370016
………
unused area
37FF16
Fig.9 Memory constitution (Bit map RAM (B1))
Address DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
at 128 dots ✕ 96 dots
380016
Dot 1 to 16 of line 1
380116
Dot 17 to 32 of line 1
………
………
Bit map RAM (B2) data
3AFE16
Dot 81 to 96 of line 96
3AFF16
Dot 97 to 112 of line 96
3B0016
………
3FFF16
Fig.10 Memory constitution (Bit map RAM (B2))
8
Dot composition (DAF to DA0)
unused area
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Pixel composition
in Fig. 11. And, the bit map RAM address corresponding to dot
composition in case pixel composition is 64 dot x192 dot is shown
in Fig. 12. In other pixel composition, the bit map RAM is similarly
assigned in an order from the dots 1 to 16 of line 1.
Each bit of a bit map display consists of nine bit map RAM (R0 to
R2, G0 to G2, and B0 to B2.) Color setup can be specified out of
512 kinds per dot. The bit map RAM address corresponding to dot
composition in case pixel composition is 128 dot x 96 dot is shown
Dots
Lines
1
2
3
4
5
6
1 to 16
17 to 32 33 to 48 49 to 64 65 to 80 81 to 96 97 to 112113 to 128
00016
00816
01016
01816
02016
02816
00116
00916
01116
01916
02116
02916
00416
00C16
01416
01C16
02416
02C16
00516
00D16
01516
01D16
02516
02D16
00616
00E16
01616
01E16
02616
02E16
00716
00F16
01716
01F16
02716
02F16
……
……
……
……
……
2D116
2D916
2E2E6
2E916
2F116
2F916
00316
00B16
01316
01B16
02316
02B16
……
……
2D016
2D816
2E016
2E816
2F016
2F816
……
……
91
92
93
94
95
96
00216
00A16
01216
01A16
02216
02A16
2D216
2DA16
2E216
2EA16
2F216
2FA16
2D316
2DB16
2E316
2EB16
2F316
2FB16
2D416
2DC16
2E416
2EC16
2F416
2FC16
2D516
2DD16
2E516
2ED16
2F516
2FD16
2D616
2DE16
2E616
2EE16
2F616
2FE16
2D716
2DF16
2E716
2EF16
2F716
2FF16
* The numerical value in a thick frame corresponds to lower 10-bits of bit map RAM (R0 to R2, G0
to G2, B0 to B2) address. (n RAM character number : 0 to 7)
Dot composition in 1 address (16 bits) is MSB....................LSB
Fig.11 Pixel composition (at 128 dots ✕ 96 dots)
Dots
Lines
1
2
3
4
5
6
1 to 16
17 to 32 33 to 48 49 to 64
00016
00416
00816
00C16
01016
01416
00116
00516
00916
00D16
01116
01516
00216
00616
00A16
00E16
01216
01616
00316
00716
00B16
00F16
01316
01716
……
……
……
……
……
187
188
189
190
191
192
2E816
2EC16
2F016
2F416
2F816
2FC16
2E916
2ED16
2F116
2F516
2F916
2FD16
2EA16
2EE16
2F216
2F616
2FA16
2FE16
2EB16
2EF16
2F316
2F716
2FB16
2FF16
* The numerical value in a thick frame corresponds to lower 10-bits of bit map RAM (R0 to R2, G0
to G2, B0 to B2) address. (n RAM character number : 0 to 7)
Dot composition in 1 address (16 bits) is MSB....................LSB
Fig.12 Pixel composition (at 64 dots ✕ 192 dots)
9
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Register
Address 000016
DA
Register
Contents
Status
0
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
10
PAGEONA
Function
Writing to the memory(display control registers and Bit map RAM)
for page A is disapproval.
1
Writing to the memory(display control registers and Bit map RAM)
for page A is permission.
0
Writing to the memory(display control registers and Bit map RAM)
for page B is disapproval.
1
Writing to the memory(display control registers and Bit map RAM)
for page B is permission.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
PAGEONB
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Remarks
Memory writing control for page A.
Memory writing control for page B.
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address 000116
DA
Register
0
WIDTH0
Contents
0
1
0
1
WIDTH1
1
0
2
WIDTH2
1
3
4
5
0
Set "0" to this bit.
1
Can not be used.
0
Display OFF
1
Display ON
0
Set "0" to this bit.
1
Can not be used.
–
BLANK0
0
BLANK1
1
0
8
Pixel (Horizontal ✕ Vertical)
128 ✕ 96 dots
192 ✕ 64 dots
256 ✕ 48 dots
384 ✕ 32 dots
32 ✕ 384 dots
48 ✕ 256 dots
64 ✕ 192 dots
96 ✕ 128 dots
Set the pixel composition.
The BLNK signal of the range set up by
this register is outputted at the time of
BLANK1, 0 = 0, and 0 (normal) setup.
DSPON
1
7
WIDTH2 WIDTH1 WIDTH0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
–
0
6
Remarks
Function
Status
YM0
1
BLANK1 BLANK0
Blank signal
0
0
Normal(Control by register WIDTH 0 to 2)
0
1
Control by Bit map RAM(R0)
1
0
Control by Bit map RAM(G0)
1
1
Control by Bit map RAM(B0)
2
2
n=0
n=0
R = Σ 2nRn – Σ 2nYMn
The measure against a character bend
(test bit)
Control of blank signal.
(a blank setup in a bit unit is possible).
Note 2
Control of R, G and B output luminosity
0
9
A
YM1
1
when set to R < 0, R = 0.
0
Same as G output and B output.
YM2
1
B
C
D
E
F
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
–
–
–
–
–
Notes 1 : This register is consisted of 2 pages (address community) of the register for page A, and the register for page B.
Writing control to each page is performed by registers PAGEONA and PAGEONB (address 000016).
2 : The bit map RAM used for blank signal control is not applicable to color setup.
11
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address 000216
DA
Contents
Register
0
0
VP0
1
1
0
VP1
Remarks
Function
Status
If VS is the vertical display start location,
Setting vertical start location
9
VS = H ✕
Σ
n=0
2nVPn
H: Cycle with the horizonal synchronizing pulse
1
2
0
VP2
1
3
0
HOR
VP3
1
4
0
VP4
VS
1
0
VERT
5
Note 2
VP5
HS
1
6
Display area
Note 2
Note 2
0
Note 2
VP6
1
Monitor display
7
0
VP7
1
8
0
VP8
1
9
0
VP9
1
A
B
C
0
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
–
–
0
VSIZE0
1
D
0
VSIZE1
1
E
F
.
VSIZE1 VSIZE0 Vertical direction size
0
1H/dot
0
1
2H/dot
0
0
3H/dot
1
1
4H/dot
1
Setting vertical direction dot size
H : Synchronous of horizontal direction pulse
0
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
–
–
Notes 1 : This register is consisted of 2 pages (address community) of the register for page A, and the register for page B. Writing control to each page is performed
by registers PAGEONA and PAGEONB (address 000016).
2 : Set up the horizontal and vertical display start location so that display range may not exceed it.
Set the character code "1FF16" (blank without background) for the display RAM of the part which the display range exceeds.
12
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address 000316
DA
Register
0
HP0
Contents
Remarks
Function
Status
0
If HS is the horizontal display start location,
1
0
1
HP1
1
Setting horizontal start location
9
HS = T ✕
Σ
n=0
2nHPn
T: Display clock
0
2
HP2
1
HOR
0
3
HP3
1
0
VS
HP4
Note 2
1
VERT
4
0
5
HS
HP5
1
Note 2
Note 2
0
6
Display area
Note 2
HP6
Monitor display
1
0
7
HP7
1
0
8
HP8
1
0
9
HP9
1
A
B
C
D
0
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
–
–
–
–
E
–
F
–
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
Notes 1 : This register is consisted of 2 pages (address community) of the register for page A, and the register for page B. Writing control to each page is performed
by registers PAGEONA and PAGEONB (address 000016).
2 : Set up the horizontal and vertical display start location so that display range may not exceed it.
Set the character code "1FF16" (blank without background) for the display RAM of the part which the display range exceeds.
13
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address 000416
DA
Register
0
MODE0
Contents
Remarks
Function
Status
0
1
0
1
MODE1
MODE1 MODE0
Display mode
0
0
Priority is given to Page A
1
0
Priority is given to Page B
1
0
260 K colors display
1
1
The average of Page A and Page B
1
2
3
4
5
6
7
8
9
A
0
Set "0" to this bit.
1
Can not be used.
0
HOR pin is negative polarity
1
HOR pin is positive polarity
0
VERT pin is negative polarity
1
VERT pin is positive polarity
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
–
–
–
–
–
–
SBLANK0
0
SBLANK1
1
D
E
F
14
Test bit
TEST
1
C
Polarity of VERT pin
POLV
0
B
Polarity of HOR pin
POLH
PTC13
–
–
It synchronizes with a display CK rising and is port output (at the
time of digital output setup).
It synchronizes with a display CK falling and is port output (at the
time of analog output setup).
SBLANK1 SBLANK2
0
0
1
0
0
1
1
1
P0/BLNK pin output
BLNK signal output timing control (BLNK
signal). Effective at the time of SBLANK1,
2 = 1, and 1 (BLNK output) setup.
P0/BLNK pin output control.
Port P0 output
Can not be used
SBLANK2 : address 000716
Can not be used
BLNK output
0
Port P1 to P3 output (at the time of analog RGB output setup "L"
fixation)
1
R0 to R2 output (at the time of digital RGB output setup "H" fixation)
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
P1 to P3 output control
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address 000516
DA
Register
0
–
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Contents
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Function
Status
Remarks
15
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address 000616
DA
Register
0
–
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
16
Contents
Remarks
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
1
DAC OFF (at the time of digital RGB output setup "L" fixation)
DAC ON/OFF,
Digital RGB output mode (G0 to G2, B0 to B2 signal output)
and digital RGB/analog RGB output
DAC ON (at the time of analog RGB output setup "H" fixation). Analog RGB change
output mode (VG1, VG2, IREF, ROUT, GOUT, and BOUT signal output)
0
Set "0" to this bit.
1
Can not be used.
–
–
–
–
–
–
–
–
–
–
–
–
–
DACON
–
Function
Status
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Address 000716
DA
Register
0
PTD0
1
2
3
Contents
Function
Status
0
"L" fixation at port output, negative polarity at BLNK output.
1
"H" fixation at port output, positive polarity at BLNK output.
0
"L" fixation at port output.
1
"H" fixation at port output.
0
"L" fixation at port output.
1
"H" fixation at port output.
0
"L" fixation at port output.
1
"H" fixation at port output.
PTD1
PTD2
PTD3
SBLANK2
Data control of P0 pin
Data control of P1 pin
Data control of P2 pin
Data control of P3 pin
Output control of P0/BLNK pin
0
4
Remarks
Refer to SBLANK1(000416).
1
5
6
7
8
9
A
B
C
D
E
F
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
0
Set "0" to this bit.
1
Can not be used.
–
–
–
–
–
–
–
–
–
–
–
0
1
Set "0" to this bit.
Can not be used.
17
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DISPLAY FORM
M35080FP can display two pages, Page A and Page B, simultaneously, as shown in Figure 13.
And,1 page of 260K color display can be displayed by piling up
two pages completely.
 Page A: register PAGEONA (address 000016) Set up by = "1." 


 Page B: register PAGEONB (address 000016) Set up by = "1." 
Example 1
Example 2
Page A (128 dots ✕ 96 dots)
Page A (128 dots ✕ 96 dots)
Page B (128 dots ✕ 96 dots)
Page B (128 dots ✕ 96 dots)
Monitor display
Monitor display
Fig. 13 The example of a display at the time of a 2-page display
Notes 1: Setup of display position, display size, etc. can be freely performed for every page. Two pages can be displayed side by side vertically and horizon
tally.
2: when the display area of two pages overlaps on the monitoring screen, registers MODE0 and MODE1 (address 000416) can perform four displays as
follows.
MODE1 MODE0
Display mode
0
0
Priority is given to Page A
1
0
Priority is given to Page B
0
1
260 K colors display(Note 1)
1
1
The average of Page A and Page B
Display number of pages
2 pages
2 pages
1 page
2 pages
(1) Priority is given to Page A ................... The overlaped part gives priority to Page A, and Page B is not displayed.
(2) Priority is given to Page B .................. The overlaped part gives priority to Page B, and Page A is not displayed.
(3) 260 K colors display ............................ By overlaping two pages completely, 1 page of 260K color is displayed.
RGB output is 6-bit(Note 2)each setup.
(4) The average of Page A and Page B ... The overlaped part averages and outputs the RGB output of two pages.
Notes 1. It becomes 512 color displays at the time of digital RGB output setup.
2. Assignment of 6 bits each of RGB is as follows.
R
MSB
R2 R1
R0
R2
Page A
G
G2 G1
B
B2
Page A
18
LSB
R0
Page B
G0
G2
B0
B2
Page A
B1
R1
G1
G0
Page B
B1
Page B
B0
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DATA INPUT EXAMPLE
Data of Bit map RAM and display control registers can be set by
the 16-bit serial input function. Example of data setting is shown in
Figure 14.
Address/Data
DAF DAE DAD DAC DAB DAA
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
Remarks
Address 000016
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Address setting
Data
000016
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Page A and B writing setting
(Note 1)
Data
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Page A and B display OFF
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Address setting
Data
000016
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Page A writing setting
Data
000216
0
0
0
0
VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0
Data
000316
0
0
0
0
0
0
HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0
Data
000416
0
0
0
0
0
0
0
0
0
0
0
Data
000516
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Data
000616
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Data
000716
0
0
0
0
0
0
0
0
SBLANK
3
SBLANK
2
SBLANK
1
Address 100016
0
0
0
1
0
0
0
0
0
0
0
0
0
0
Data
100016
Data
100116
VSIZE1 VSIZE0
POLV POLH MODE2 MODE1 MODE0
0
0
3AFF16
Display form setting
—
DAC setting
Address setting
Page A
............
3AFE16
Horizontal display
location setting
Bit map setting
Bit map RAM (Page A)
Data
Vertical display
location setting
SBLANK 0 PTD3 Port output setting
(R0,R1,R2,G0,G1,G2,B0,B1,B2)
Data
Page A
000116
Address 000016
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Address setting
Data
000016
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
Page B writing setting
Data
000216
0
0
0
0
VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0
Data
000316
0
0
0
0
0
0
HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0
Address 100016
0
0
0
1
0
0
Data
100116
0
0
0
0
0
0
0
0
0
0
(R0,R1,R2,G0,G1,G2,B0,B1,B2)
3AFF16
Data
3AFF16
Horizontal display
location setting
Address setting
Bit map setting
Bit map RAM (PageB)
Data
Vertical display
location setting
Page B
100016
............
Data
VSIZE1 VSIZE0
Page B
Address 000016
Address 000016
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Address setting
Data
000016
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Page A and B writing setting
Data
000116
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
Display ON
Notes 1. Registers PAGEONA and PAGEONB perform writing control of data.
2. Input the clock with which the cycle was fixed and continued from the TCK pin. Moreover, input horizontal synchronized signal into HOR pin,
and input vertical synchronized signal into VERT pin.
Fig. 14 Example of data setting
19
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Horizontal synchronors signal (3V)
Synchronous signal
generator
Output buffer
+3V
Vertical synchronors signal (3V)
1
24
1F
— +
4
5
ROUT/G2
CS
GOUT/G1
SCK
BOUT/G0
SIN
7
TCK
8
VDD1
9
IREF/B2
VG2/B1
VG1/B0
P0/BLNK
10
11
12
+3V
AC
M35080FP
6
External clock
VDD2
VSS2
3
Microcomputer
NC
LP
2
BIN
P1/R2
VSS1
P2/R1
VERT
P3/R0
HOR
R
23
300‰
22
21
20
19
1.2K‰
18
0.1 F
17 0.1 F
Mixing
video pre-amp
G
16
15
14
B
13
100 F
+ —
100 F
— +
1F
1F
0.01 F
0.01 F
BLANK
Fig.15 Example of the M35080FP peripheral circuit (at analog RGB output setting)
Horizontal synchronors signal (3V)
Synchronous signal
generator
+3V
Vertical synchronors signal (3V)
24
1
2
1µF
– +
3
4
5
6
7
External clock
8
9
10
11
12
+3V
VSS2
VDD2
AC
ROUT/G2
CS
GOUT/G1
SCK
BOUT/G0
SIN
TCK
VDD1
P0/BLNK
M35080FP
Microcomputer
NC
LP
IREF/B2
VG2/B1
VG1/B0
BIN
P1/R2
VSS1
P2/R1
VERT
P3/R0
HOR
23
22
G2
21
G1
20
G0
19
B2
18
B1
17
B0
16
R0
15
R1
14
R2
13
BLANK
100µF
+ –
100µF
– +
1µF
1µF
0.01µF
0.01µF
Fig.16 Example of the M35080FP peripheral circuit (at digital RGB output setting)
20
Mixing
video pre-amp
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DATA INPUT
SERIAL DATA INPUT TIMING
(1) Serial data should be input with the LSB first.
(2) The address consists of 16 bits.
(3) The data consists of 16 bits.
__
(4) The 16 bits in the SCK after the CS signal has fallen are the
address, and for succeeding input data, the address is
incremented every 16 bits. Therefore, it is not necessary to
input the address from the second data.
CS
SCK
SIN
LSB
MSB LSB
Address(16 bits)
MSB
Data(16 bits)
N
LSB
MSB
Data(16 bits)
N+1
N = 1,2,3………
Fig.17 Serial input timing
21
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
TIMING REQUIREMENTS (VDD = 3 ± 0.30 V, Ta = –20 to +85°C, unless otherwise noted)
Serial data input
Limits
Parameter
Symbol
tw(SCK)
SCK width
___
Unit
Max.
Typ.
Max.
200
–
–
200
–
–
ns
ns
____
tsu(CS)
CS setup time
___
____
th(CS)
CS hold time
2
–
–
µs
tsu(SIN)
SIN setup time
200
–
–
ns
th(SIN)
SIN hold time
200
–
–
ns
tword
1 word write time
10
–
–
µs
tw(CS)
1µs (min.)
CS
tsu(CS)
tw(SCK)
tw(SCK)
tsu(SIN)
th(SIN)
th(CS)
SCK
SIN
CS
tword
more than 2 µs
SCK
1
Fig.18 Serial input timing
22
Remarks
2
… 12
13
14
15
16
1
… 12
13
14
15
16
Refer to
fig 18
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
ABSOLUTE MAXIMUM RATINGS (VDD = 3.00V, Ta = –20 to +85°C, unless otherwise noted)
Parameter
Symbol
Conditions
Ratings
Unit
–0.3 to +4.2
V
VSS –0.3 ≤ VI ≤ VDD +0.3
V
VSS ≤ VO ≤ VDD
V
+70
mW
Operating temperature
–20 to +85
°C
Storage temperature
–40 to +125
VDD
Supply voltage
With respect to VSS.
VI
Input voltage
VO
Output voltage
Pd
Power dissipation
Topr
Tstg
Ta = +25 °C
°C
RECOMMENDED OPERATING CONDITIONS (VDD = 3.00V, Ta = –20 to +85°C, unless otherwise noted)
Symbol
Limits
Parameter
VDD
Supply voltage
VIH
"H" level input voltage
__ __
SIN, SCK, CS, AC, HOR, VERT
Unit
Min.
Typ.
Max.
2.7
3.00
3.3
V
0.8 ✕ VDD
VDD
VDD
V
__ __
VIL
"L" level input voltage
0
0
0.2 ✕ VDD
V
FOSC
Oscillating frequency for display
10.0
–
20.0
MHz
H.sync
Horizontal synchronous signal input frequeney
10.0
–
20.0
kHz
SIN, SCK, CS, AC, HOR, VERT
ELECTRICAL CHARACTERISTICS (VDD = 3.00V, Ta = 25°C, unless otherwise noted)
Parameter
Symbol
Limits
Test conditions
Typ.
Max.
2.70
3.00
3.30
V
–
15
25
mA
2.2
–
–
V
VDD = 2.70V, IOL = 1mA
–
–
0.5
V
VDD = 3.00V
10
–
100
kΩ
0.7 ✕ VDD
–
VDD
V
–
1.0
–
Vp-p
–
–
±2.0
LSB
VDD
Supply voltage
Ta = –20 to +70°C
IDD
Supply current (at analog output)
VDD = 3.00V
VOH
“H” level output voltage
VOL
“L” level output voltage
RI
Pull-up resistance AC
VTCK
External clock input width
P0 to P7,R0 to R2
G0 to G2,B0 to B2
VDD = 2.70V, IOH = –1mA
P0 to P7,R0 to R2
G0 to G2,B0 to B2
Unit
Min.
__
VDAO
NL
Full scale width
ROUT,GOUT,BOUT
RIREF=1.2KΩ, RL=300Ω
Nonlinear nature error
ROUT,GOUT,BOUT
RIREF=1.2KΩ, RL=300Ω
23
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
NOTE FOR SUPPLYING__POWER
(1) Timing of power supplying to AC pin
The internal circuit __
of M35080FP is reset when the level of the
auto clear input pin AC is “L”. This pin in hysteresis input with the
pull-up resistor.
__
The timing about power supplying of AC pin is shown in Figure below.
After supplying the power (VDD and VSS) to M35080FP and the
supply voltage becomes
more than 0.8 ✕ VDD, it needs to keep
__
VIL time; tw of the AC pin for more than 1ms.
__
Start inputting from microcomputer after AC pin supply voltage
becomes more than 0.8 ✕ VDD and keeping 200ms wait time.
(2) Timing of power supplying to VDD1 and VDD2.
Supply power to VDD1 and VDD2 at the same time.
Voltage [V]
Data input disable
VDD
Supply voltage
VAC
(AC pin input voltage)
0.8 ✕ VDD
0.2 ✕ VDD
Time t [s]
tW
__
Fig.19 Timing of power supplying to AC pin
PRECAUTION FOR USE
Notes on noise and latch-up
In order to avoid noise and latch-up, connect a bypass capacitor
(≈0.1µF) directly between the V DD1 pin and VSS1 pin, and the
VDD2 pin and VSS2 pin using a heavy wire.
Notes on the time of external clock input to TCK pin
Input the continuous external clock which cycle is fixed and synchronized with horizontal synchronized signal from TCK pin. And,
input continuous horizontal synchronized signal which cycle is
fixed from HOR pin. Do not stop clock input absolutely during display.
24
tS
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
PACKAGE OUTLINE
MMP
24P2Q-A
EIAJ Package Code
SSOP24-P-300-0.80
Plastic 24pin 300mil SSOP
JEDEC Code
–
Weight(g)
0.2
e
b2
13
E
F
Recommended Mount Pad
Symbol
1
12
A
D
G
A2
e
y
A1
b
L
L1
HE
e1
I2
24
Lead Material
Cu Alloy
c
z
Z1
Detail G
Detail F
A
A1
A2
b
c
D
E
e
HE
L
L1
z
Z1
y
b2
e1
I2
Dimension in Millimeters
Min
Nom
Max
2.1
–
–
0.2
0.1
0
–
1.8
–
0.45
0.35
0.3
0.25
0.2
0.18
10.2
10.1
10.0
5.4
5.3
5.2
–
0.8
–
8.1
7.8
7.5
0.8
0.6
0.4
–
1.25
–
–
0.65
–
–
–
0.8
0.1
–
–
0°
–
8°
–
0.5
–
–
7.62
–
–
1.27
–
25
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Notes regarding these materials
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© 2002 MITSUBISHI ELECTRIC CORP.
New publication, effective MAR. 2002.
Specifications subject to change without notice.
M35080FP Data Sheet
REVISION DESCRIPTION LIST
Rev.
No.
1.0
Revision Description
First Edition
Rev.
date
0203
(1/1)